1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Subtarget Enumeration Source Fragment *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | |
10 | #ifdef GET_SUBTARGETINFO_ENUM |
11 | #undef GET_SUBTARGETINFO_ENUM |
12 | |
13 | namespace llvm { |
14 | namespace AMDGPU { |
15 | enum { |
16 | Feature1_5xVGPRs = 0, |
17 | Feature16BitInsts = 1, |
18 | FeatureA16 = 2, |
19 | FeatureAddNoCarryInsts = 3, |
20 | FeatureAddressableLocalMemorySize32768 = 4, |
21 | FeatureAddressableLocalMemorySize65536 = 5, |
22 | FeatureAddressableLocalMemorySize163840 = 6, |
23 | FeatureAgentScopeFineGrainedRemoteMemoryAtomics = 7, |
24 | FeatureApertureRegs = 8, |
25 | FeatureArchitectedFlatScratch = 9, |
26 | FeatureArchitectedSGPRs = 10, |
27 | FeatureAshrPkInsts = 11, |
28 | FeatureAtomicBufferGlobalPkAddF16Insts = 12, |
29 | FeatureAtomicBufferGlobalPkAddF16NoRtnInsts = 13, |
30 | FeatureAtomicBufferPkAddBF16Inst = 14, |
31 | FeatureAtomicCSubNoRtnInsts = 15, |
32 | FeatureAtomicDsPkAdd16Insts = 16, |
33 | FeatureAtomicFMinFMaxF32FlatInsts = 17, |
34 | FeatureAtomicFMinFMaxF32GlobalInsts = 18, |
35 | FeatureAtomicFMinFMaxF64FlatInsts = 19, |
36 | FeatureAtomicFMinFMaxF64GlobalInsts = 20, |
37 | FeatureAtomicFaddNoRtnInsts = 21, |
38 | FeatureAtomicFaddRtnInsts = 22, |
39 | FeatureAtomicFlatPkAdd16Insts = 23, |
40 | FeatureAtomicGlobalPkAddBF16Inst = 24, |
41 | FeatureAutoWaitcntBeforeBarrier = 25, |
42 | FeatureBF8ConversionScaleInsts = 26, |
43 | FeatureBF16ConversionInsts = 27, |
44 | FeatureBVHDualAndBVH8Insts = 28, |
45 | FeatureBackOffBarrier = 29, |
46 | FeatureBitOp3Insts = 30, |
47 | FeatureCIInsts = 31, |
48 | FeatureCuMode = 32, |
49 | FeatureCvtFP8VOP1Bug = 33, |
50 | FeatureCvtPkF16F32Inst = 34, |
51 | FeatureDLInsts = 35, |
52 | FeatureDPALU_DPP = 36, |
53 | FeatureDPP = 37, |
54 | FeatureDPP8 = 38, |
55 | FeatureDPPSrc1SGPR = 39, |
56 | FeatureDefaultComponentBroadcast = 40, |
57 | FeatureDefaultComponentZero = 41, |
58 | FeatureDisable = 42, |
59 | FeatureDot1Insts = 43, |
60 | FeatureDot2Insts = 44, |
61 | FeatureDot3Insts = 45, |
62 | FeatureDot4Insts = 46, |
63 | FeatureDot5Insts = 47, |
64 | FeatureDot6Insts = 48, |
65 | FeatureDot7Insts = 49, |
66 | FeatureDot8Insts = 50, |
67 | FeatureDot9Insts = 51, |
68 | FeatureDot10Insts = 52, |
69 | FeatureDot11Insts = 53, |
70 | FeatureDot12Insts = 54, |
71 | FeatureDot13Insts = 55, |
72 | FeatureDsSrc2Insts = 56, |
73 | FeatureDumpCode = 57, |
74 | FeatureDumpCodeLower = 58, |
75 | FeatureDynamicVGPR = 59, |
76 | FeatureDynamicVGPRBlockSize32 = 60, |
77 | FeatureEnableDS128 = 61, |
78 | FeatureEnableFlatScratch = 62, |
79 | FeatureEnableLoadStoreOpt = 63, |
80 | FeatureEnablePRTStrictNull = 64, |
81 | FeatureEnableSIScheduler = 65, |
82 | FeatureEnableUnsafeDSOffsetFolding = 66, |
83 | FeatureExtendedImageInsts = 67, |
84 | FeatureF16BF16ToFP6BF6ConversionScaleInsts = 68, |
85 | FeatureF32ToF16BF16ConversionSRInsts = 69, |
86 | FeatureFMA = 70, |
87 | FeatureFP4ConversionScaleInsts = 71, |
88 | FeatureFP6BF6ConversionScaleInsts = 72, |
89 | FeatureFP8ConversionInsts = 73, |
90 | FeatureFP8ConversionScaleInsts = 74, |
91 | FeatureFP8Insts = 75, |
92 | FeatureFP64 = 76, |
93 | FeatureFastDenormalF32 = 77, |
94 | FeatureFastFMAF32 = 78, |
95 | FeatureFlatAddressSpace = 79, |
96 | FeatureFlatAtomicFaddF32Inst = 80, |
97 | FeatureFlatBufferGlobalAtomicFaddF64Inst = 81, |
98 | FeatureFlatForGlobal = 82, |
99 | FeatureFlatGlobalInsts = 83, |
100 | FeatureFlatInstOffsets = 84, |
101 | FeatureFlatScratchInsts = 85, |
102 | FeatureFlatSegmentOffsetBug = 86, |
103 | FeatureFmaMixInsts = 87, |
104 | FeatureFmacF64Inst = 88, |
105 | FeatureG16 = 89, |
106 | FeatureGCN3Encoding = 90, |
107 | FeatureGDS = 91, |
108 | FeatureGFX7GFX8GFX9Insts = 92, |
109 | FeatureGFX8Insts = 93, |
110 | FeatureGFX9 = 94, |
111 | FeatureGFX9Insts = 95, |
112 | FeatureGFX10 = 96, |
113 | FeatureGFX10Insts = 97, |
114 | FeatureGFX10_3Insts = 98, |
115 | FeatureGFX10_AEncoding = 99, |
116 | FeatureGFX10_BEncoding = 100, |
117 | FeatureGFX11 = 101, |
118 | FeatureGFX11Insts = 102, |
119 | FeatureGFX12 = 103, |
120 | FeatureGFX12Insts = 104, |
121 | FeatureGFX90AInsts = 105, |
122 | FeatureGFX940Insts = 106, |
123 | FeatureGFX950Insts = 107, |
124 | FeatureGFX1250Insts = 108, |
125 | FeatureGWS = 109, |
126 | FeatureGetWaveIdInst = 110, |
127 | FeatureHasRestrictedSOffset = 111, |
128 | FeatureImageGather4D16Bug = 112, |
129 | FeatureImageInsts = 113, |
130 | FeatureImageStoreD16Bug = 114, |
131 | FeatureInstFwdPrefetchBug = 115, |
132 | FeatureIntClamp = 116, |
133 | FeatureInv2PiInlineImm = 117, |
134 | FeatureKernargPreload = 118, |
135 | FeatureLDSBankCount16 = 119, |
136 | FeatureLDSBankCount32 = 120, |
137 | FeatureLdsBarrierArriveAtomic = 121, |
138 | FeatureLdsBranchVmemWARHazard = 122, |
139 | FeatureLdsMisalignedBug = 123, |
140 | FeatureLshlAddU64Inst = 124, |
141 | FeatureMADIntraFwdBug = 125, |
142 | FeatureMAIInsts = 126, |
143 | FeatureMFMAInlineLiteralBug = 127, |
144 | FeatureMIMG_R128 = 128, |
145 | FeatureMSAALoadDstSelBug = 129, |
146 | FeatureMadMacF32Insts = 130, |
147 | FeatureMadMixInsts = 131, |
148 | FeatureMaxHardClauseLength32 = 132, |
149 | FeatureMaxHardClauseLength63 = 133, |
150 | FeatureMaxPrivateElementSize4 = 134, |
151 | FeatureMaxPrivateElementSize8 = 135, |
152 | FeatureMaxPrivateElementSize16 = 136, |
153 | FeatureMemToLDSLoad = 137, |
154 | FeatureMemoryAtomicFAddF32DenormalSupport = 138, |
155 | FeatureMinimum3Maximum3F16 = 139, |
156 | FeatureMinimum3Maximum3F32 = 140, |
157 | FeatureMinimum3Maximum3PKF16 = 141, |
158 | FeatureMovrel = 142, |
159 | FeatureNSAClauseBug = 143, |
160 | FeatureNSAEncoding = 144, |
161 | FeatureNSAtoVMEMBug = 145, |
162 | FeatureNegativeScratchOffsetBug = 146, |
163 | FeatureNegativeUnalignedScratchOffsetBug = 147, |
164 | FeatureNoDataDepHazard = 148, |
165 | FeatureNoSdstCMPX = 149, |
166 | FeatureOffset3fBug = 150, |
167 | FeaturePackedFP32Ops = 151, |
168 | FeaturePackedTID = 152, |
169 | FeaturePartialNSAEncoding = 153, |
170 | FeaturePermlane16Swap = 154, |
171 | FeaturePermlane32Swap = 155, |
172 | FeaturePkFmacF16Inst = 156, |
173 | FeaturePointSampleAccel = 157, |
174 | FeaturePreciseMemory = 158, |
175 | FeaturePrivEnabledTrap2NopBug = 159, |
176 | FeaturePrngInst = 160, |
177 | FeaturePromoteAlloca = 161, |
178 | FeaturePseudoScalarTrans = 162, |
179 | FeatureR128A16 = 163, |
180 | FeatureRealTrue16Insts = 164, |
181 | FeatureRelaxedBufferOOBMode = 165, |
182 | FeatureRequiredExportPriority = 166, |
183 | FeatureRequiresCOV6 = 167, |
184 | FeatureSALUFloatInsts = 168, |
185 | FeatureSDWA = 169, |
186 | FeatureSDWAMac = 170, |
187 | FeatureSDWAOmod = 171, |
188 | FeatureSDWAOutModsVOPC = 172, |
189 | FeatureSDWAScalar = 173, |
190 | FeatureSDWASdst = 174, |
191 | FeatureSGPRInitBug = 175, |
192 | FeatureSMEMtoVectorWriteHazard = 176, |
193 | FeatureSMemRealTime = 177, |
194 | FeatureSMemTimeInst = 178, |
195 | FeatureSRAMECC = 179, |
196 | FeatureSafeSmemPrefetch = 180, |
197 | FeatureScalarAtomics = 181, |
198 | FeatureScalarDwordx3Loads = 182, |
199 | FeatureScalarFlatScratchInsts = 183, |
200 | FeatureScalarStores = 184, |
201 | FeatureSeaIslands = 185, |
202 | FeatureSetPrioIncWgInst = 186, |
203 | FeatureShaderCyclesHiLoRegisters = 187, |
204 | FeatureShaderCyclesRegister = 188, |
205 | FeatureSouthernIslands = 189, |
206 | FeatureSupportsSRAMECC = 190, |
207 | FeatureSupportsXNACK = 191, |
208 | FeatureTgSplit = 192, |
209 | FeatureTransposeLoadF4F6Insts = 193, |
210 | FeatureTrapHandler = 194, |
211 | FeatureTrigReducedRange = 195, |
212 | FeatureTrue16BitInsts = 196, |
213 | FeatureUnalignedAccessMode = 197, |
214 | FeatureUnalignedBufferAccess = 198, |
215 | FeatureUnalignedDSAccess = 199, |
216 | FeatureUnalignedScratchAccess = 200, |
217 | FeatureUnpackedD16VMem = 201, |
218 | FeatureUseBlockVGPROpsForCSR = 202, |
219 | FeatureUserSGPRInit16Bug = 203, |
220 | FeatureVALUTransUseHazard = 204, |
221 | FeatureVGPRIndexMode = 205, |
222 | FeatureVMEMtoScalarWriteHazard = 206, |
223 | FeatureVOP3Literal = 207, |
224 | FeatureVOP3P = 208, |
225 | FeatureVOPD = 209, |
226 | FeatureVcmpxExecWARHazard = 210, |
227 | FeatureVcmpxPermlaneHazard = 211, |
228 | FeatureVmemWriteVgprInOrder = 212, |
229 | FeatureVolcanicIslands = 213, |
230 | FeatureVscnt = 214, |
231 | FeatureWaitXcnt = 215, |
232 | FeatureWavefrontSize16 = 216, |
233 | FeatureWavefrontSize32 = 217, |
234 | FeatureWavefrontSize64 = 218, |
235 | FeatureXF32Insts = 219, |
236 | FeatureXNACK = 220, |
237 | FullRate64Ops = 221, |
238 | HalfRate64Ops = 222, |
239 | NumSubtargetFeatures = 223 |
240 | }; |
241 | } // end namespace AMDGPU |
242 | } // end namespace llvm |
243 | |
244 | #endif // GET_SUBTARGETINFO_ENUM |
245 | |
246 | |
247 | #ifdef GET_SUBTARGETINFO_MACRO |
248 | GET_SUBTARGETINFO_MACRO(AddNoCarryInsts, false, addNoCarryInsts) |
249 | GET_SUBTARGETINFO_MACRO(AutoWaitcntBeforeBarrier, false, autoWaitcntBeforeBarrier) |
250 | GET_SUBTARGETINFO_MACRO(BackOffBarrier, false, backOffBarrier) |
251 | GET_SUBTARGETINFO_MACRO(CIInsts, false, cIInsts) |
252 | GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode) |
253 | GET_SUBTARGETINFO_MACRO(DumpCode, false, dumpCode) |
254 | GET_SUBTARGETINFO_MACRO(DynamicVGPR, false, dynamicVGPR) |
255 | GET_SUBTARGETINFO_MACRO(DynamicVGPRBlockSize32, false, dynamicVGPRBlockSize32) |
256 | GET_SUBTARGETINFO_MACRO(EnableCuMode, false, enableCuMode) |
257 | GET_SUBTARGETINFO_MACRO(EnableDS128, false, enableDS128) |
258 | GET_SUBTARGETINFO_MACRO(EnableFlatScratch, false, enableFlatScratch) |
259 | GET_SUBTARGETINFO_MACRO(EnableLoadStoreOpt, false, enableLoadStoreOpt) |
260 | GET_SUBTARGETINFO_MACRO(EnablePRTStrictNull, false, enablePRTStrictNull) |
261 | GET_SUBTARGETINFO_MACRO(EnablePreciseMemory, false, enablePreciseMemory) |
262 | GET_SUBTARGETINFO_MACRO(EnablePromoteAlloca, false, enablePromoteAlloca) |
263 | GET_SUBTARGETINFO_MACRO(EnableRealTrue16Insts, false, enableRealTrue16Insts) |
264 | GET_SUBTARGETINFO_MACRO(EnableSIScheduler, false, enableSIScheduler) |
265 | GET_SUBTARGETINFO_MACRO(EnableSRAMECC, false, enableSRAMECC) |
266 | GET_SUBTARGETINFO_MACRO(EnableTgSplit, false, enableTgSplit) |
267 | GET_SUBTARGETINFO_MACRO(EnableUnsafeDSOffsetFolding, false, enableUnsafeDSOffsetFolding) |
268 | GET_SUBTARGETINFO_MACRO(EnableXNACK, false, enableXNACK) |
269 | GET_SUBTARGETINFO_MACRO(FMA, false, fMA) |
270 | GET_SUBTARGETINFO_MACRO(FP64, false, fP64) |
271 | GET_SUBTARGETINFO_MACRO(FastDenormalF32, false, fastDenormalF32) |
272 | GET_SUBTARGETINFO_MACRO(FastFMAF32, false, fastFMAF32) |
273 | GET_SUBTARGETINFO_MACRO(FeatureDisable, false, featureDisable) |
274 | GET_SUBTARGETINFO_MACRO(FlatAddressSpace, false, flatAddressSpace) |
275 | GET_SUBTARGETINFO_MACRO(FlatForGlobal, false, flatForGlobal) |
276 | GET_SUBTARGETINFO_MACRO(FlatGlobalInsts, false, flatGlobalInsts) |
277 | GET_SUBTARGETINFO_MACRO(FlatInstOffsets, false, flatInstOffsets) |
278 | GET_SUBTARGETINFO_MACRO(FlatScratchInsts, false, flatScratchInsts) |
279 | GET_SUBTARGETINFO_MACRO(FullRate64Ops, false, fullRate64Ops) |
280 | GET_SUBTARGETINFO_MACRO(GCN3Encoding, false, gCN3Encoding) |
281 | GET_SUBTARGETINFO_MACRO(GFX10Insts, false, gFX10Insts) |
282 | GET_SUBTARGETINFO_MACRO(GFX10_3Insts, false, gFX10_3Insts) |
283 | GET_SUBTARGETINFO_MACRO(GFX10_AEncoding, false, gFX10_AEncoding) |
284 | GET_SUBTARGETINFO_MACRO(GFX10_BEncoding, false, gFX10_BEncoding) |
285 | GET_SUBTARGETINFO_MACRO(GFX11Insts, false, gFX11Insts) |
286 | GET_SUBTARGETINFO_MACRO(GFX1250Insts, false, gFX1250Insts) |
287 | GET_SUBTARGETINFO_MACRO(GFX12Insts, false, gFX12Insts) |
288 | GET_SUBTARGETINFO_MACRO(GFX7GFX8GFX9Insts, false, gFX7GFX8GFX9Insts) |
289 | GET_SUBTARGETINFO_MACRO(GFX8Insts, false, gFX8Insts) |
290 | GET_SUBTARGETINFO_MACRO(GFX90AInsts, false, gFX90AInsts) |
291 | GET_SUBTARGETINFO_MACRO(GFX940Insts, false, gFX940Insts) |
292 | GET_SUBTARGETINFO_MACRO(GFX950Insts, false, gFX950Insts) |
293 | GET_SUBTARGETINFO_MACRO(GFX9Insts, false, gFX9Insts) |
294 | GET_SUBTARGETINFO_MACRO(HalfRate64Ops, false, halfRate64Ops) |
295 | GET_SUBTARGETINFO_MACRO(Has16BitInsts, false, has16BitInsts) |
296 | GET_SUBTARGETINFO_MACRO(Has1_5xVGPRs, false, has1_5xVGPRs) |
297 | GET_SUBTARGETINFO_MACRO(HasA16, false, hasA16) |
298 | GET_SUBTARGETINFO_MACRO(HasAgentScopeFineGrainedRemoteMemoryAtomics, false, hasAgentScopeFineGrainedRemoteMemoryAtomics) |
299 | GET_SUBTARGETINFO_MACRO(HasApertureRegs, false, hasApertureRegs) |
300 | GET_SUBTARGETINFO_MACRO(HasArchitectedFlatScratch, false, hasArchitectedFlatScratch) |
301 | GET_SUBTARGETINFO_MACRO(HasArchitectedSGPRs, false, hasArchitectedSGPRs) |
302 | GET_SUBTARGETINFO_MACRO(HasAshrPkInsts, false, hasAshrPkInsts) |
303 | GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16Insts, false, hasAtomicBufferGlobalPkAddF16Insts) |
304 | GET_SUBTARGETINFO_MACRO(HasAtomicBufferGlobalPkAddF16NoRtnInsts, false, hasAtomicBufferGlobalPkAddF16NoRtnInsts) |
305 | GET_SUBTARGETINFO_MACRO(HasAtomicBufferPkAddBF16Inst, false, hasAtomicBufferPkAddBF16Inst) |
306 | GET_SUBTARGETINFO_MACRO(HasAtomicCSubNoRtnInsts, false, hasAtomicCSubNoRtnInsts) |
307 | GET_SUBTARGETINFO_MACRO(HasAtomicDsPkAdd16Insts, false, hasAtomicDsPkAdd16Insts) |
308 | GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32FlatInsts, false, hasAtomicFMinFMaxF32FlatInsts) |
309 | GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF32GlobalInsts, false, hasAtomicFMinFMaxF32GlobalInsts) |
310 | GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64FlatInsts, false, hasAtomicFMinFMaxF64FlatInsts) |
311 | GET_SUBTARGETINFO_MACRO(HasAtomicFMinFMaxF64GlobalInsts, false, hasAtomicFMinFMaxF64GlobalInsts) |
312 | GET_SUBTARGETINFO_MACRO(HasAtomicFaddNoRtnInsts, false, hasAtomicFaddNoRtnInsts) |
313 | GET_SUBTARGETINFO_MACRO(HasAtomicFaddRtnInsts, false, hasAtomicFaddRtnInsts) |
314 | GET_SUBTARGETINFO_MACRO(HasAtomicFlatPkAdd16Insts, false, hasAtomicFlatPkAdd16Insts) |
315 | GET_SUBTARGETINFO_MACRO(HasAtomicGlobalPkAddBF16Inst, false, hasAtomicGlobalPkAddBF16Inst) |
316 | GET_SUBTARGETINFO_MACRO(HasBF16ConversionInsts, false, hasBF16ConversionInsts) |
317 | GET_SUBTARGETINFO_MACRO(HasBF8ConversionScaleInsts, false, hasBF8ConversionScaleInsts) |
318 | GET_SUBTARGETINFO_MACRO(HasBVHDualAndBVH8Insts, false, hasBVHDualAndBVH8Insts) |
319 | GET_SUBTARGETINFO_MACRO(HasBitOp3Insts, false, hasBitOp3Insts) |
320 | GET_SUBTARGETINFO_MACRO(HasCvtFP8Vop1Bug, false, hasCvtFP8Vop1Bug) |
321 | GET_SUBTARGETINFO_MACRO(HasCvtPkF16F32Inst, false, hasCvtPkF16F32Inst) |
322 | GET_SUBTARGETINFO_MACRO(HasDLInsts, false, hasDLInsts) |
323 | GET_SUBTARGETINFO_MACRO(HasDPALU_DPP, false, hasDPALU_DPP) |
324 | GET_SUBTARGETINFO_MACRO(HasDPP, false, hasDPP) |
325 | GET_SUBTARGETINFO_MACRO(HasDPP8, false, hasDPP8) |
326 | GET_SUBTARGETINFO_MACRO(HasDPPSrc1SGPR, false, hasDPPSrc1SGPR) |
327 | GET_SUBTARGETINFO_MACRO(HasDefaultComponentBroadcast, false, hasDefaultComponentBroadcast) |
328 | GET_SUBTARGETINFO_MACRO(HasDefaultComponentZero, false, hasDefaultComponentZero) |
329 | GET_SUBTARGETINFO_MACRO(HasDot10Insts, false, hasDot10Insts) |
330 | GET_SUBTARGETINFO_MACRO(HasDot11Insts, false, hasDot11Insts) |
331 | GET_SUBTARGETINFO_MACRO(HasDot12Insts, false, hasDot12Insts) |
332 | GET_SUBTARGETINFO_MACRO(HasDot13Insts, false, hasDot13Insts) |
333 | GET_SUBTARGETINFO_MACRO(HasDot1Insts, false, hasDot1Insts) |
334 | GET_SUBTARGETINFO_MACRO(HasDot2Insts, false, hasDot2Insts) |
335 | GET_SUBTARGETINFO_MACRO(HasDot3Insts, false, hasDot3Insts) |
336 | GET_SUBTARGETINFO_MACRO(HasDot4Insts, false, hasDot4Insts) |
337 | GET_SUBTARGETINFO_MACRO(HasDot5Insts, false, hasDot5Insts) |
338 | GET_SUBTARGETINFO_MACRO(HasDot6Insts, false, hasDot6Insts) |
339 | GET_SUBTARGETINFO_MACRO(HasDot7Insts, false, hasDot7Insts) |
340 | GET_SUBTARGETINFO_MACRO(HasDot8Insts, false, hasDot8Insts) |
341 | GET_SUBTARGETINFO_MACRO(HasDot9Insts, false, hasDot9Insts) |
342 | GET_SUBTARGETINFO_MACRO(HasDsSrc2Insts, false, hasDsSrc2Insts) |
343 | GET_SUBTARGETINFO_MACRO(HasExtendedImageInsts, false, hasExtendedImageInsts) |
344 | GET_SUBTARGETINFO_MACRO(HasF16BF16ToFP6BF6ConversionScaleInsts, false, hasF16BF16ToFP6BF6ConversionScaleInsts) |
345 | GET_SUBTARGETINFO_MACRO(HasF32ToF16BF16ConversionSRInsts, false, hasF32ToF16BF16ConversionSRInsts) |
346 | GET_SUBTARGETINFO_MACRO(HasFP4ConversionScaleInsts, false, hasFP4ConversionScaleInsts) |
347 | GET_SUBTARGETINFO_MACRO(HasFP6BF6ConversionScaleInsts, false, hasFP6BF6ConversionScaleInsts) |
348 | GET_SUBTARGETINFO_MACRO(HasFP8ConversionInsts, false, hasFP8ConversionInsts) |
349 | GET_SUBTARGETINFO_MACRO(HasFP8ConversionScaleInsts, false, hasFP8ConversionScaleInsts) |
350 | GET_SUBTARGETINFO_MACRO(HasFP8Insts, false, hasFP8Insts) |
351 | GET_SUBTARGETINFO_MACRO(HasFlatAtomicFaddF32Inst, false, hasFlatAtomicFaddF32Inst) |
352 | GET_SUBTARGETINFO_MACRO(HasFlatBufferGlobalAtomicFaddF64Inst, false, hasFlatBufferGlobalAtomicFaddF64Inst) |
353 | GET_SUBTARGETINFO_MACRO(HasFlatSegmentOffsetBug, false, hasFlatSegmentOffsetBug) |
354 | GET_SUBTARGETINFO_MACRO(HasFmaMixInsts, false, hasFmaMixInsts) |
355 | GET_SUBTARGETINFO_MACRO(HasFmacF64Inst, false, hasFmacF64Inst) |
356 | GET_SUBTARGETINFO_MACRO(HasG16, false, hasG16) |
357 | GET_SUBTARGETINFO_MACRO(HasGDS, false, hasGDS) |
358 | GET_SUBTARGETINFO_MACRO(HasGWS, false, hasGWS) |
359 | GET_SUBTARGETINFO_MACRO(HasGetWaveIdInst, false, hasGetWaveIdInst) |
360 | GET_SUBTARGETINFO_MACRO(HasImageGather4D16Bug, false, hasImageGather4D16Bug) |
361 | GET_SUBTARGETINFO_MACRO(HasImageInsts, false, hasImageInsts) |
362 | GET_SUBTARGETINFO_MACRO(HasImageStoreD16Bug, false, hasImageStoreD16Bug) |
363 | GET_SUBTARGETINFO_MACRO(HasInstFwdPrefetchBug, false, hasInstFwdPrefetchBug) |
364 | GET_SUBTARGETINFO_MACRO(HasIntClamp, false, hasIntClamp) |
365 | GET_SUBTARGETINFO_MACRO(HasInv2PiInlineImm, false, hasInv2PiInlineImm) |
366 | GET_SUBTARGETINFO_MACRO(HasLdsBarrierArriveAtomic, false, hasLdsBarrierArriveAtomic) |
367 | GET_SUBTARGETINFO_MACRO(HasLdsBranchVmemWARHazard, false, hasLdsBranchVmemWARHazard) |
368 | GET_SUBTARGETINFO_MACRO(HasLshlAddU64Inst, false, hasLshlAddU64Inst) |
369 | GET_SUBTARGETINFO_MACRO(HasMADIntraFwdBug, false, hasMADIntraFwdBug) |
370 | GET_SUBTARGETINFO_MACRO(HasMAIInsts, false, hasMAIInsts) |
371 | GET_SUBTARGETINFO_MACRO(HasMFMAInlineLiteralBug, false, hasMFMAInlineLiteralBug) |
372 | GET_SUBTARGETINFO_MACRO(HasMSAALoadDstSelBug, false, hasMSAALoadDstSelBug) |
373 | GET_SUBTARGETINFO_MACRO(HasMadMacF32Insts, false, hasMadMacF32Insts) |
374 | GET_SUBTARGETINFO_MACRO(HasMadMixInsts, false, hasMadMixInsts) |
375 | GET_SUBTARGETINFO_MACRO(HasMemoryAtomicFaddF32DenormalSupport, false, hasMemoryAtomicFaddF32DenormalSupport) |
376 | GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F16, false, hasMinimum3Maximum3F16) |
377 | GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3F32, false, hasMinimum3Maximum3F32) |
378 | GET_SUBTARGETINFO_MACRO(HasMinimum3Maximum3PKF16, false, hasMinimum3Maximum3PKF16) |
379 | GET_SUBTARGETINFO_MACRO(HasMovrel, false, hasMovrel) |
380 | GET_SUBTARGETINFO_MACRO(HasNSAClauseBug, false, hasNSAClauseBug) |
381 | GET_SUBTARGETINFO_MACRO(HasNSAEncoding, false, hasNSAEncoding) |
382 | GET_SUBTARGETINFO_MACRO(HasNSAtoVMEMBug, false, hasNSAtoVMEMBug) |
383 | GET_SUBTARGETINFO_MACRO(HasNoDataDepHazard, false, hasNoDataDepHazard) |
384 | GET_SUBTARGETINFO_MACRO(HasNoSdstCMPX, false, hasNoSdstCMPX) |
385 | GET_SUBTARGETINFO_MACRO(HasOffset3fBug, false, hasOffset3fBug) |
386 | GET_SUBTARGETINFO_MACRO(HasPackedFP32Ops, false, hasPackedFP32Ops) |
387 | GET_SUBTARGETINFO_MACRO(HasPackedTID, false, hasPackedTID) |
388 | GET_SUBTARGETINFO_MACRO(HasPartialNSAEncoding, false, hasPartialNSAEncoding) |
389 | GET_SUBTARGETINFO_MACRO(HasPermlane16Swap, false, hasPermlane16Swap) |
390 | GET_SUBTARGETINFO_MACRO(HasPermlane32Swap, false, hasPermlane32Swap) |
391 | GET_SUBTARGETINFO_MACRO(HasPkFmacF16Inst, false, hasPkFmacF16Inst) |
392 | GET_SUBTARGETINFO_MACRO(HasPointSampleAccel, false, hasPointSampleAccel) |
393 | GET_SUBTARGETINFO_MACRO(HasPrivEnabledTrap2NopBug, false, hasPrivEnabledTrap2NopBug) |
394 | GET_SUBTARGETINFO_MACRO(HasPrngInst, false, hasPrngInst) |
395 | GET_SUBTARGETINFO_MACRO(HasPseudoScalarTrans, false, hasPseudoScalarTrans) |
396 | GET_SUBTARGETINFO_MACRO(HasR128A16, false, hasR128A16) |
397 | GET_SUBTARGETINFO_MACRO(HasRequiredExportPriority, false, hasRequiredExportPriority) |
398 | GET_SUBTARGETINFO_MACRO(HasRestrictedSOffset, false, hasRestrictedSOffset) |
399 | GET_SUBTARGETINFO_MACRO(HasSALUFloatInsts, false, hasSALUFloatInsts) |
400 | GET_SUBTARGETINFO_MACRO(HasSDWA, false, hasSDWA) |
401 | GET_SUBTARGETINFO_MACRO(HasSDWAMac, false, hasSDWAMac) |
402 | GET_SUBTARGETINFO_MACRO(HasSDWAOmod, false, hasSDWAOmod) |
403 | GET_SUBTARGETINFO_MACRO(HasSDWAOutModsVOPC, false, hasSDWAOutModsVOPC) |
404 | GET_SUBTARGETINFO_MACRO(HasSDWAScalar, false, hasSDWAScalar) |
405 | GET_SUBTARGETINFO_MACRO(HasSDWASdst, false, hasSDWASdst) |
406 | GET_SUBTARGETINFO_MACRO(HasSMEMtoVectorWriteHazard, false, hasSMEMtoVectorWriteHazard) |
407 | GET_SUBTARGETINFO_MACRO(HasSMemRealTime, false, hasSMemRealTime) |
408 | GET_SUBTARGETINFO_MACRO(HasSMemTimeInst, false, hasSMemTimeInst) |
409 | GET_SUBTARGETINFO_MACRO(HasSafeSmemPrefetch, false, hasSafeSmemPrefetch) |
410 | GET_SUBTARGETINFO_MACRO(HasScalarAtomics, false, hasScalarAtomics) |
411 | GET_SUBTARGETINFO_MACRO(HasScalarDwordx3Loads, false, hasScalarDwordx3Loads) |
412 | GET_SUBTARGETINFO_MACRO(HasScalarStores, false, hasScalarStores) |
413 | GET_SUBTARGETINFO_MACRO(HasSetPrioIncWgInst, false, hasSetPrioIncWgInst) |
414 | GET_SUBTARGETINFO_MACRO(HasShaderCyclesHiLoRegisters, false, hasShaderCyclesHiLoRegisters) |
415 | GET_SUBTARGETINFO_MACRO(HasShaderCyclesRegister, false, hasShaderCyclesRegister) |
416 | GET_SUBTARGETINFO_MACRO(HasTransposeLoadF4F6Insts, false, hasTransposeLoadF4F6Insts) |
417 | GET_SUBTARGETINFO_MACRO(HasTrigReducedRange, false, hasTrigReducedRange) |
418 | GET_SUBTARGETINFO_MACRO(HasTrue16BitInsts, false, hasTrue16BitInsts) |
419 | GET_SUBTARGETINFO_MACRO(HasUnpackedD16VMem, false, hasUnpackedD16VMem) |
420 | GET_SUBTARGETINFO_MACRO(HasVALUTransUseHazard, false, hasVALUTransUseHazard) |
421 | GET_SUBTARGETINFO_MACRO(HasVGPRIndexMode, false, hasVGPRIndexMode) |
422 | GET_SUBTARGETINFO_MACRO(HasVMEMtoScalarWriteHazard, false, hasVMEMtoScalarWriteHazard) |
423 | GET_SUBTARGETINFO_MACRO(HasVMemToLDSLoad, false, hasVMemToLDSLoad) |
424 | GET_SUBTARGETINFO_MACRO(HasVOP3Literal, false, hasVOP3Literal) |
425 | GET_SUBTARGETINFO_MACRO(HasVOP3PInsts, false, hasVOP3PInsts) |
426 | GET_SUBTARGETINFO_MACRO(HasVOPDInsts, false, hasVOPDInsts) |
427 | GET_SUBTARGETINFO_MACRO(HasVcmpxExecWARHazard, false, hasVcmpxExecWARHazard) |
428 | GET_SUBTARGETINFO_MACRO(HasVcmpxPermlaneHazard, false, hasVcmpxPermlaneHazard) |
429 | GET_SUBTARGETINFO_MACRO(HasVmemWriteVgprInOrder, false, hasVmemWriteVgprInOrder) |
430 | GET_SUBTARGETINFO_MACRO(HasVscnt, false, hasVscnt) |
431 | GET_SUBTARGETINFO_MACRO(HasWaitXcnt, false, hasWaitXcnt) |
432 | GET_SUBTARGETINFO_MACRO(HasXF32Insts, false, hasXF32Insts) |
433 | GET_SUBTARGETINFO_MACRO(KernargPreload, false, kernargPreload) |
434 | GET_SUBTARGETINFO_MACRO(LDSMisalignedBug, false, lDSMisalignedBug) |
435 | GET_SUBTARGETINFO_MACRO(MIMG_R128, false, mIMG_R128) |
436 | GET_SUBTARGETINFO_MACRO(NegativeScratchOffsetBug, false, negativeScratchOffsetBug) |
437 | GET_SUBTARGETINFO_MACRO(NegativeUnalignedScratchOffsetBug, false, negativeUnalignedScratchOffsetBug) |
438 | GET_SUBTARGETINFO_MACRO(RelaxedBufferOOBMode, false, relaxedBufferOOBMode) |
439 | GET_SUBTARGETINFO_MACRO(RequiresCOV6, false, requiresCOV6) |
440 | GET_SUBTARGETINFO_MACRO(SGPRInitBug, false, sGPRInitBug) |
441 | GET_SUBTARGETINFO_MACRO(ScalarFlatScratchInsts, false, scalarFlatScratchInsts) |
442 | GET_SUBTARGETINFO_MACRO(SupportsSRAMECC, false, supportsSRAMECC) |
443 | GET_SUBTARGETINFO_MACRO(SupportsXNACK, false, supportsXNACK) |
444 | GET_SUBTARGETINFO_MACRO(TrapHandler, false, trapHandler) |
445 | GET_SUBTARGETINFO_MACRO(UnalignedAccessMode, false, unalignedAccessMode) |
446 | GET_SUBTARGETINFO_MACRO(UnalignedBufferAccess, false, unalignedBufferAccess) |
447 | GET_SUBTARGETINFO_MACRO(UnalignedDSAccess, false, unalignedDSAccess) |
448 | GET_SUBTARGETINFO_MACRO(UnalignedScratchAccess, false, unalignedScratchAccess) |
449 | GET_SUBTARGETINFO_MACRO(UseBlockVGPROpsForCSR, false, useBlockVGPROpsForCSR) |
450 | GET_SUBTARGETINFO_MACRO(UserSGPRInit16Bug, false, userSGPRInit16Bug) |
451 | #undef GET_SUBTARGETINFO_MACRO |
452 | #endif // GET_SUBTARGETINFO_MACRO |
453 | |
454 | |
455 | #ifdef GET_SUBTARGETINFO_MC_DESC |
456 | #undef GET_SUBTARGETINFO_MC_DESC |
457 | |
458 | namespace llvm { |
459 | // Sorted (by key) array of values for CPU features. |
460 | extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[] = { |
461 | { "16-bit-insts" , "Has i16/f16 instructions" , AMDGPU::Feature16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
462 | { "DumpCode" , "Dump MachineInstrs in the CodeEmitter" , AMDGPU::FeatureDumpCode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
463 | { "a16" , "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands" , AMDGPU::FeatureA16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
464 | { "add-no-carry-insts" , "Have VALU add/sub instructions without carry out" , AMDGPU::FeatureAddNoCarryInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
465 | { "addressablelocalmemorysize163840" , "The size of local memory in bytes" , AMDGPU::FeatureAddressableLocalMemorySize163840, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
466 | { "addressablelocalmemorysize32768" , "The size of local memory in bytes" , AMDGPU::FeatureAddressableLocalMemorySize32768, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
467 | { "addressablelocalmemorysize65536" , "The size of local memory in bytes" , AMDGPU::FeatureAddressableLocalMemorySize65536, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
468 | { "agent-scope-fine-grained-remote-memory-atomics" , "Agent (device) scoped atomic operations, excluding those directly supported by PCIe (i.e. integer atomic add, exchange, and compare-and-swap), are functional for allocations in host or peer device memory." , AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
469 | { "allocate1_5xvgprs" , "Has 50% more physical VGPRs and 50% larger allocation granule" , AMDGPU::Feature1_5xVGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
470 | { "aperture-regs" , "Has Memory Aperture Base and Size Registers" , AMDGPU::FeatureApertureRegs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
471 | { "architected-flat-scratch" , "Flat Scratch register is a readonly SPI initialized architected register" , AMDGPU::FeatureArchitectedFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
472 | { "architected-sgprs" , "Enable the architected SGPRs" , AMDGPU::FeatureArchitectedSGPRs, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
473 | { "ashr-pk-insts" , "Has Arithmetic Shift Pack instructions" , AMDGPU::FeatureAshrPkInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
474 | { "atomic-buffer-global-pk-add-f16-insts" , "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that can return original value" , AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts, { { { 0x0ULL, 0x80000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
475 | { "atomic-buffer-global-pk-add-f16-no-rtn-insts" , "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that don't return original value" , AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, { { { 0x0ULL, 0x80000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
476 | { "atomic-buffer-pk-add-bf16-inst" , "Has buffer_atomic_pk_add_bf16 instruction" , AMDGPU::FeatureAtomicBufferPkAddBF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
477 | { "atomic-csub-no-rtn-insts" , "Has buffer_atomic_csub and global_atomic_csub instructions that don't return original value" , AMDGPU::FeatureAtomicCSubNoRtnInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
478 | { "atomic-ds-pk-add-16-insts" , "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, ds_pk_add_rtn_f16 instructions" , AMDGPU::FeatureAtomicDsPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
479 | { "atomic-fadd-no-rtn-insts" , "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that don't return original value" , AMDGPU::FeatureAtomicFaddNoRtnInsts, { { { 0x0ULL, 0x80000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
480 | { "atomic-fadd-rtn-insts" , "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that return original value" , AMDGPU::FeatureAtomicFaddRtnInsts, { { { 0x0ULL, 0x80000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
481 | { "atomic-flat-pk-add-16-insts" , "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions" , AMDGPU::FeatureAtomicFlatPkAdd16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
482 | { "atomic-fmin-fmax-flat-f32" , "Has flat memory instructions for atomicrmw fmin/fmax for float" , AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
483 | { "atomic-fmin-fmax-flat-f64" , "Has flat memory instructions for atomicrmw fmin/fmax for double" , AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
484 | { "atomic-fmin-fmax-global-f32" , "Has global/buffer instructions for atomicrmw fmin/fmax for float" , AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
485 | { "atomic-fmin-fmax-global-f64" , "Has global/buffer instructions for atomicrmw fmin/fmax for float" , AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
486 | { "atomic-global-pk-add-bf16-inst" , "Has global_atomic_pk_add_bf16 instruction" , AMDGPU::FeatureAtomicGlobalPkAddBF16Inst, { { { 0x0ULL, 0x80000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
487 | { "auto-waitcnt-before-barrier" , "Hardware automatically inserts waitcnt before barrier" , AMDGPU::FeatureAutoWaitcntBeforeBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
488 | { "back-off-barrier" , "Hardware supports backing off s_barrier if an exception occurs" , AMDGPU::FeatureBackOffBarrier, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
489 | { "bf16-cvt-insts" , "Has bf16 conversion instructions" , AMDGPU::FeatureBF16ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
490 | { "bf8-cvt-scale-insts" , "Has bf8 conversion scale instructions" , AMDGPU::FeatureBF8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
491 | { "bitop3-insts" , "Has v_bitop3_b32/v_bitop3_b16 instructions" , AMDGPU::FeatureBitOp3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
492 | { "block-vgpr-csr" , "Use block load/store for VGPR callee saved registers" , AMDGPU::FeatureUseBlockVGPROpsForCSR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
493 | { "bvh-dual-bvh-8-insts" , "Has image_bvh_dual_intersect_ray and image_bvh8_intersect_ray instructions" , AMDGPU::FeatureBVHDualAndBVH8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
494 | { "ci-insts" , "Additional instructions for CI+" , AMDGPU::FeatureCIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
495 | { "cumode" , "Enable CU wavefront execution mode" , AMDGPU::FeatureCuMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
496 | { "cvt-fp8-vop1-bug" , "FP8/BF8 VOP1 form of conversion to F32 is unreliable" , AMDGPU::FeatureCvtFP8VOP1Bug, { { { 0x0ULL, 0x200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
497 | { "cvt-pk-f16-f32-inst" , "Has cvt_pk_f16_f32 instruction" , AMDGPU::FeatureCvtPkF16F32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
498 | { "default-component-broadcast" , "BUFFER/IMAGE store instructions set unspecified components to x component (GFX12)" , AMDGPU::FeatureDefaultComponentBroadcast, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
499 | { "default-component-zero" , "BUFFER/IMAGE store instructions set unspecified components to zero (before GFX12)" , AMDGPU::FeatureDefaultComponentZero, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
500 | { "dl-insts" , "Has v_fmac_f32 and v_xnor_b32 instructions" , AMDGPU::FeatureDLInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
501 | { "dot1-insts" , "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions" , AMDGPU::FeatureDot1Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
502 | { "dot10-insts" , "Has v_dot2_f32_f16 instruction" , AMDGPU::FeatureDot10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
503 | { "dot11-insts" , "Has v_dot4_f32_fp8_fp8, v_dot4_f32_fp8_bf8, v_dot4_f32_bf8_fp8, v_dot4_f32_bf8_bf8 instructions" , AMDGPU::FeatureDot11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
504 | { "dot12-insts" , "Has v_dot2_f32_bf16 instructions" , AMDGPU::FeatureDot12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
505 | { "dot13-insts" , "Has v_dot2c_f32_bf16 instructions" , AMDGPU::FeatureDot13Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
506 | { "dot2-insts" , "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions" , AMDGPU::FeatureDot2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
507 | { "dot3-insts" , "Has v_dot8c_i32_i4 instruction" , AMDGPU::FeatureDot3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
508 | { "dot4-insts" , "Has v_dot2c_i32_i16 instruction" , AMDGPU::FeatureDot4Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
509 | { "dot5-insts" , "Has v_dot2c_f32_f16 instruction" , AMDGPU::FeatureDot5Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
510 | { "dot6-insts" , "Has v_dot4c_i32_i8 instruction" , AMDGPU::FeatureDot6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
511 | { "dot7-insts" , "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions" , AMDGPU::FeatureDot7Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
512 | { "dot8-insts" , "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions" , AMDGPU::FeatureDot8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
513 | { "dot9-insts" , "Has v_dot2_f16_f16, v_dot2_bf16_bf16 instructions" , AMDGPU::FeatureDot9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
514 | { "dpp" , "Support DPP (Data Parallel Primitives) extension" , AMDGPU::FeatureDPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
515 | { "dpp-64bit" , "Support DPP (Data Parallel Primitives) extension in DP ALU" , AMDGPU::FeatureDPALU_DPP, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
516 | { "dpp-src1-sgpr" , "Support SGPR for Src1 of DPP instructions" , AMDGPU::FeatureDPPSrc1SGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
517 | { "dpp8" , "Support DPP8 (Data Parallel Primitives) extension" , AMDGPU::FeatureDPP8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
518 | { "ds-src2-insts" , "Has ds_*_src2 instructions" , AMDGPU::FeatureDsSrc2Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
519 | { "dumpcode" , "Dump MachineInstrs in the CodeEmitter" , AMDGPU::FeatureDumpCodeLower, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
520 | { "dynamic-vgpr" , "Enable dynamic VGPR mode" , AMDGPU::FeatureDynamicVGPR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
521 | { "dynamic-vgpr-block-size-32" , "Use a block size of 32 for dynamic VGPR allocation (default is 16)" , AMDGPU::FeatureDynamicVGPRBlockSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
522 | { "enable-ds128" , "Use ds_{read|write}_b128" , AMDGPU::FeatureEnableDS128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
523 | { "enable-flat-scratch" , "Use scratch_* flat memory instructions to access scratch" , AMDGPU::FeatureEnableFlatScratch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
524 | { "enable-prt-strict-null" , "Enable zeroing of result registers for sparse texture fetches" , AMDGPU::FeatureEnablePRTStrictNull, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
525 | { "extended-image-insts" , "Support mips != 0, lod != 0, gather4, and get_lod" , AMDGPU::FeatureExtendedImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
526 | { "f16bf16-to-fp6bf6-cvt-scale-insts" , "Has f16bf16 to fp6bf6 conversion scale instructions" , AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
527 | { "f32-to-f16bf16-cvt-sr-insts" , "Has f32 to f16bf16 conversion scale instructions" , AMDGPU::FeatureF32ToF16BF16ConversionSRInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
528 | { "fast-denormal-f32" , "Enabling denormals does not cause f32 instructions to run at f64 rates" , AMDGPU::FeatureFastDenormalF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
529 | { "fast-fmaf" , "Assuming f32 fma is at least as fast as mul + add" , AMDGPU::FeatureFastFMAF32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
530 | { "flat-address-space" , "Support flat address space" , AMDGPU::FeatureFlatAddressSpace, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
531 | { "flat-atomic-fadd-f32-inst" , "Has flat_atomic_add_f32 instruction" , AMDGPU::FeatureFlatAtomicFaddF32Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
532 | { "flat-buffer-global-fadd-f64-inst" , "Has flat, buffer, and global instructions for f64 atomic fadd" , AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
533 | { "flat-for-global" , "Force to generate flat instruction for global" , AMDGPU::FeatureFlatForGlobal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
534 | { "flat-global-insts" , "Have global_* flat memory instructions" , AMDGPU::FeatureFlatGlobalInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
535 | { "flat-inst-offsets" , "Flat instructions have immediate offset addressing mode" , AMDGPU::FeatureFlatInstOffsets, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
536 | { "flat-scratch-insts" , "Have scratch_* flat memory instructions" , AMDGPU::FeatureFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
537 | { "flat-segment-offset-bug" , "GFX10 bug where inst_offset is ignored when flat instructions access global memory" , AMDGPU::FeatureFlatSegmentOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
538 | { "fma-mix-insts" , "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions" , AMDGPU::FeatureFmaMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
539 | { "fmacf64-inst" , "Has v_fmac_f64 instruction" , AMDGPU::FeatureFmacF64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
540 | { "fmaf" , "Enable single precision FMA (not as fast as mul+add, but fused)" , AMDGPU::FeatureFMA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
541 | { "fp4-cvt-scale-insts" , "Has fp4 conversion scale instructions" , AMDGPU::FeatureFP4ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
542 | { "fp64" , "Enable double precision operations" , AMDGPU::FeatureFP64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
543 | { "fp6bf6-cvt-scale-insts" , "Has fp6 and bf6 conversion scale instructions" , AMDGPU::FeatureFP6BF6ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
544 | { "fp8-conversion-insts" , "Has fp8 and bf8 conversion instructions" , AMDGPU::FeatureFP8ConversionInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
545 | { "fp8-cvt-scale-insts" , "Has fp8 conversion scale instructions" , AMDGPU::FeatureFP8ConversionScaleInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
546 | { "fp8-insts" , "Has fp8 and bf8 instructions" , AMDGPU::FeatureFP8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
547 | { "full-rate-64-ops" , "Most fp64 instructions are full rate" , AMDGPU::FullRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
548 | { "g16" , "Support G16 for 16-bit gradient image operands" , AMDGPU::FeatureG16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
549 | { "gcn3-encoding" , "Encoding format for VI" , AMDGPU::FeatureGCN3Encoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
550 | { "gds" , "Has Global Data Share" , AMDGPU::FeatureGDS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
551 | { "get-wave-id-inst" , "Has s_get_waveid_in_workgroup instruction" , AMDGPU::FeatureGetWaveIdInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
552 | { "gfx10" , "GFX10 GPU generation" , AMDGPU::FeatureGFX10, { { { 0x260801e012eULL, 0x322002aab8f008ULL, 0x66a0010304221ULL, 0x5181c0ULL, 0x0ULL, 0x0ULL, } } } }, |
553 | { "gfx10-3-insts" , "Additional instructions for GFX10.3" , AMDGPU::FeatureGFX10_3Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
554 | { "gfx10-insts" , "Additional instructions for GFX10+" , AMDGPU::FeatureGFX10Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
555 | { "gfx10_a-encoding" , "Has BVH ray tracing instructions" , AMDGPU::FeatureGFX10_AEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
556 | { "gfx10_b-encoding" , "Encoding format GFX10_B" , AMDGPU::FeatureGFX10_BEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
557 | { "gfx11" , "GFX11 GPU generation" , AMDGPU::FeatureGFX11, { { { 0x2608006012eULL, 0x30205eaab8f008ULL, 0x10304011ULL, 0x5381d0ULL, 0x0ULL, 0x0ULL, } } } }, |
558 | { "gfx11-insts" , "Additional instructions for GFX11+" , AMDGPU::FeatureGFX11Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
559 | { "gfx12" , "GFX12 GPU generation" , AMDGPU::FeatureGFX12, { { { 0x160800601aeULL, 0x30015ea2b8f000ULL, 0x10305811ULL, 0x4381d0ULL, 0x0ULL, 0x0ULL, } } } }, |
560 | { "gfx12-insts" , "Additional instructions for GFX12+" , AMDGPU::FeatureGFX12Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
561 | { "gfx1250-insts" , "Additional instructions for GFX1250+" , AMDGPU::FeatureGFX1250Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
562 | { "gfx7-gfx8-gfx9-insts" , "Instructions shared in GFX7, GFX8, GFX9" , AMDGPU::FeatureGFX7GFX8GFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
563 | { "gfx8-insts" , "Additional instructions for GFX8+" , AMDGPU::FeatureGFX8Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
564 | { "gfx9" , "GFX9 GPU generation" , AMDGPU::FeatureGFX9, { { { 0x2208000010eULL, 0x302000b438f000ULL, 0x81a66a0800040200ULL, 0x41121c0ULL, 0x0ULL, 0x0ULL, } } } }, |
565 | { "gfx9-insts" , "Additional instructions for GFX9+" , AMDGPU::FeatureGFX9Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
566 | { "gfx90a-insts" , "Additional instructions for GFX90A+" , AMDGPU::FeatureGFX90AInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
567 | { "gfx940-insts" , "Additional instructions for GFX940+" , AMDGPU::FeatureGFX940Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
568 | { "gfx950-insts" , "Additional instructions for GFX950+" , AMDGPU::FeatureGFX950Insts, { { { 0x404000800ULL, 0x5b0ULL, 0xc003000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
569 | { "gws" , "Has Global Wave Sync" , AMDGPU::FeatureGWS, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
570 | { "half-rate-64-ops" , "Most fp64 instructions are half rate instead of quarter" , AMDGPU::HalfRate64Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
571 | { "image-gather4-d16-bug" , "Image Gather4 D16 hardware bug" , AMDGPU::FeatureImageGather4D16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
572 | { "image-insts" , "Support image instructions" , AMDGPU::FeatureImageInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
573 | { "image-store-d16-bug" , "Image Store D16 hardware bug" , AMDGPU::FeatureImageStoreD16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
574 | { "inst-fwd-prefetch-bug" , "S_INST_PREFETCH instruction causes shader to hang" , AMDGPU::FeatureInstFwdPrefetchBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
575 | { "int-clamp-insts" , "Support clamp for integer destination" , AMDGPU::FeatureIntClamp, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
576 | { "inv-2pi-inline-imm" , "Has 1 / (2 * pi) as inline immediate" , AMDGPU::FeatureInv2PiInlineImm, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
577 | { "kernarg-preload" , "Hardware supports preloading of kernel arguments in user SGPRs." , AMDGPU::FeatureKernargPreload, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
578 | { "lds-barrier-arrive-atomic" , "Has LDS barrier-arrive atomic instructions" , AMDGPU::FeatureLdsBarrierArriveAtomic, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
579 | { "lds-branch-vmem-war-hazard" , "Switching between LDS and VMEM-tex not waiting VM_VSRC=0" , AMDGPU::FeatureLdsBranchVmemWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
580 | { "lds-misaligned-bug" , "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode" , AMDGPU::FeatureLdsMisalignedBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
581 | { "ldsbankcount16" , "The number of LDS banks per compute unit." , AMDGPU::FeatureLDSBankCount16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
582 | { "ldsbankcount32" , "The number of LDS banks per compute unit." , AMDGPU::FeatureLDSBankCount32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
583 | { "load-store-opt" , "Enable SI load/store optimizer pass" , AMDGPU::FeatureEnableLoadStoreOpt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
584 | { "lshl-add-u64-inst" , "Has v_lshl_add_u64 instruction" , AMDGPU::FeatureLshlAddU64Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
585 | { "mad-intra-fwd-bug" , "MAD_U64/I64 intra instruction forwarding bug" , AMDGPU::FeatureMADIntraFwdBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
586 | { "mad-mac-f32-insts" , "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions" , AMDGPU::FeatureMadMacF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
587 | { "mad-mix-insts" , "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions" , AMDGPU::FeatureMadMixInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
588 | { "mai-insts" , "Has mAI instructions" , AMDGPU::FeatureMAIInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
589 | { "max-hard-clause-length-32" , "Maximum number of instructions in an explicit S_CLAUSE is 32" , AMDGPU::FeatureMaxHardClauseLength32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
590 | { "max-hard-clause-length-63" , "Maximum number of instructions in an explicit S_CLAUSE is 63" , AMDGPU::FeatureMaxHardClauseLength63, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
591 | { "max-private-element-size-16" , "Maximum private access size may be 16" , AMDGPU::FeatureMaxPrivateElementSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
592 | { "max-private-element-size-4" , "Maximum private access size may be 4" , AMDGPU::FeatureMaxPrivateElementSize4, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
593 | { "max-private-element-size-8" , "Maximum private access size may be 8" , AMDGPU::FeatureMaxPrivateElementSize8, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
594 | { "memory-atomic-fadd-f32-denormal-support" , "global/flat/buffer atomic fadd for float supports denormal handling" , AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
595 | { "mfma-inline-literal-bug" , "MFMA cannot use inline literal as SrcC" , AMDGPU::FeatureMFMAInlineLiteralBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
596 | { "mimg-r128" , "Support 128-bit texture resources" , AMDGPU::FeatureMIMG_R128, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
597 | { "minimum3-maximum3-f16" , "Has v_minimum3_f16 and v_maximum3_f16 instructions" , AMDGPU::FeatureMinimum3Maximum3F16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
598 | { "minimum3-maximum3-f32" , "Has v_minimum3_f32 and v_maximum3_f32 instructions" , AMDGPU::FeatureMinimum3Maximum3F32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
599 | { "minimum3-maximum3-pkf16" , "Has v_pk_minimum3_f16 and v_pk_maximum3_f16 instructions" , AMDGPU::FeatureMinimum3Maximum3PKF16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
600 | { "movrel" , "Has v_movrel*_b32 instructions" , AMDGPU::FeatureMovrel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
601 | { "msaa-load-dst-sel-bug" , "MSAA loads not honoring dst_sel bug" , AMDGPU::FeatureMSAALoadDstSelBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
602 | { "negative-scratch-offset-bug" , "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9" , AMDGPU::FeatureNegativeScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
603 | { "negative-unaligned-scratch-offset-bug" , "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10" , AMDGPU::FeatureNegativeUnalignedScratchOffsetBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
604 | { "no-data-dep-hazard" , "Does not need SW waitstates" , AMDGPU::FeatureNoDataDepHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
605 | { "no-sdst-cmpx" , "V_CMPX does not write VCC/SGPR in addition to EXEC" , AMDGPU::FeatureNoSdstCMPX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
606 | { "nsa-clause-bug" , "MIMG-NSA in a hard clause has unpredictable results on GFX10.1" , AMDGPU::FeatureNSAClauseBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
607 | { "nsa-encoding" , "Support NSA encoding for image instructions" , AMDGPU::FeatureNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
608 | { "nsa-to-vmem-bug" , "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero" , AMDGPU::FeatureNSAtoVMEMBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
609 | { "offset-3f-bug" , "Branch offset of 3f hardware bug" , AMDGPU::FeatureOffset3fBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
610 | { "packed-fp32-ops" , "Support packed fp32 instructions" , AMDGPU::FeaturePackedFP32Ops, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
611 | { "packed-tid" , "Workitem IDs are packed into v0 at kernel launch" , AMDGPU::FeaturePackedTID, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
612 | { "partial-nsa-encoding" , "Support partial NSA encoding for image instructions" , AMDGPU::FeaturePartialNSAEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
613 | { "permlane16-swap" , "Has v_permlane16_swap_b32 instructions" , AMDGPU::FeaturePermlane16Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
614 | { "permlane32-swap" , "Has v_permlane32_swap_b32 instructions" , AMDGPU::FeaturePermlane32Swap, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
615 | { "pk-fmac-f16-inst" , "Has v_pk_fmac_f16 instruction" , AMDGPU::FeaturePkFmacF16Inst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
616 | { "point-sample-accel" , "Has point sample acceleration feature" , AMDGPU::FeaturePointSampleAccel, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
617 | { "precise-memory" , "Enable precise memory mode" , AMDGPU::FeaturePreciseMemory, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
618 | { "priv-enabled-trap2-nop-bug" , "Hardware that runs with PRIV=1 interpreting 's_trap 2' as a nop bug" , AMDGPU::FeaturePrivEnabledTrap2NopBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
619 | { "prng-inst" , "Has v_prng_b32 instruction" , AMDGPU::FeaturePrngInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
620 | { "promote-alloca" , "Enable promote alloca pass" , AMDGPU::FeaturePromoteAlloca, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
621 | { "pseudo-scalar-trans" , "Has Pseudo Scalar Transcendental instructions" , AMDGPU::FeaturePseudoScalarTrans, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
622 | { "r128-a16" , "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128" , AMDGPU::FeatureR128A16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
623 | { "real-true16" , "Use true 16-bit registers" , AMDGPU::FeatureRealTrue16Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
624 | { "relaxed-buffer-oob-mode" , "Disable strict out-of-bounds buffer guarantees. An OOB access may potentially cause an adjacent access to be treated as if it were also OOB" , AMDGPU::FeatureRelaxedBufferOOBMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
625 | { "required-export-priority" , "Export priority must be explicitly manipulated on GFX11.5" , AMDGPU::FeatureRequiredExportPriority, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
626 | { "requires-cov6" , "Target Requires Code Object V6" , AMDGPU::FeatureRequiresCOV6, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
627 | { "restricted-soffset" , "Has restricted SOffset (immediate not supported)." , AMDGPU::FeatureHasRestrictedSOffset, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
628 | { "s-memrealtime" , "Has s_memrealtime instruction" , AMDGPU::FeatureSMemRealTime, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
629 | { "s-memtime-inst" , "Has s_memtime instruction" , AMDGPU::FeatureSMemTimeInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
630 | { "safe-smem-prefetch" , "SMEM prefetches do not fail on illegal address" , AMDGPU::FeatureSafeSmemPrefetch, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
631 | { "salu-float" , "Has SALU floating point instructions" , AMDGPU::FeatureSALUFloatInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
632 | { "scalar-atomics" , "Has atomic scalar memory instructions" , AMDGPU::FeatureScalarAtomics, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
633 | { "scalar-dwordx3-loads" , "Has 96-bit scalar load instructions" , AMDGPU::FeatureScalarDwordx3Loads, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
634 | { "scalar-flat-scratch-insts" , "Have s_scratch_* flat memory instructions" , AMDGPU::FeatureScalarFlatScratchInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
635 | { "scalar-stores" , "Has store scalar memory instructions" , AMDGPU::FeatureScalarStores, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
636 | { "sdwa" , "Support SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWA, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
637 | { "sdwa-mav" , "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWAMac, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
638 | { "sdwa-omod" , "Support OMod with SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWAOmod, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
639 | { "sdwa-out-mods-vopc" , "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWAOutModsVOPC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
640 | { "sdwa-scalar" , "Support scalar register with SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWAScalar, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
641 | { "sdwa-sdst" , "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension" , AMDGPU::FeatureSDWASdst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
642 | { "sea-islands" , "SEA_ISLANDS GPU generation" , AMDGPU::FeatureSeaIslands, { { { 0x1000200801e0020ULL, 0x2200018009008ULL, 0x4000000004005ULL, 0x4100048ULL, 0x0ULL, 0x0ULL, } } } }, |
643 | { "setprio-inc-wg-inst" , "Has s_setprio_inc_wg instruction." , AMDGPU::FeatureSetPrioIncWgInst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
644 | { "sgpr-init-bug" , "VI SGPR initialization bug requiring a fixed SGPR allocation size" , AMDGPU::FeatureSGPRInitBug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
645 | { "shader-cycles-hi-lo-registers" , "Has SHADER_CYCLES_HI/LO hardware registers" , AMDGPU::FeatureShaderCyclesHiLoRegisters, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
646 | { "shader-cycles-register" , "Has SHADER_CYCLES hardware register" , AMDGPU::FeatureShaderCyclesRegister, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
647 | { "si-scheduler" , "Enable SI Machine Scheduler" , AMDGPU::FeatureEnableSIScheduler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
648 | { "smem-to-vector-write-hazard" , "s_load_dword followed by v_cmp page faults" , AMDGPU::FeatureSMEMtoVectorWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
649 | { "southern-islands" , "SOUTHERN_ISLANDS GPU generation" , AMDGPU::FeatureSouthernIslands, { { { 0x100020000140010ULL, 0x102200008001008ULL, 0x4000000004005ULL, 0x4100008ULL, 0x0ULL, 0x0ULL, } } } }, |
650 | { "sramecc" , "Enable SRAMECC" , AMDGPU::FeatureSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
651 | { "sramecc-support" , "Hardware supports SRAMECC" , AMDGPU::FeatureSupportsSRAMECC, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
652 | { "tgsplit" , "Enable threadgroup split execution" , AMDGPU::FeatureTgSplit, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
653 | { "transpose-load-f4f6-insts" , "Has ds_load_tr4/tr6 and global_load_tr4/tr6 instructions" , AMDGPU::FeatureTransposeLoadF4F6Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
654 | { "trap-handler" , "Trap handler support" , AMDGPU::FeatureTrapHandler, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
655 | { "trig-reduced-range" , "Requires use of fract on arguments to trig instructions" , AMDGPU::FeatureTrigReducedRange, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
656 | { "true16" , "True 16-bit operand instructions" , AMDGPU::FeatureTrue16BitInsts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
657 | { "unaligned-access-mode" , "Enable unaligned global, local and region loads and stores if the hardware supports it" , AMDGPU::FeatureUnalignedAccessMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
658 | { "unaligned-buffer-access" , "Hardware supports unaligned global loads and stores" , AMDGPU::FeatureUnalignedBufferAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
659 | { "unaligned-ds-access" , "Hardware supports unaligned local and region loads and stores" , AMDGPU::FeatureUnalignedDSAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
660 | { "unaligned-scratch-access" , "Support unaligned scratch loads and stores" , AMDGPU::FeatureUnalignedScratchAccess, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
661 | { "unpacked-d16-vmem" , "Has unpacked d16 vmem instructions" , AMDGPU::FeatureUnpackedD16VMem, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
662 | { "unsafe-ds-offset-folding" , "Force using DS instruction immediate offsets on SI" , AMDGPU::FeatureEnableUnsafeDSOffsetFolding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
663 | { "user-sgpr-init16-bug" , "Bug requiring at least 16 user+system SGPRs to be enabled" , AMDGPU::FeatureUserSGPRInit16Bug, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
664 | { "valu-trans-use-hazard" , "Hazard when TRANS instructions are closely followed by a use of the result" , AMDGPU::FeatureVALUTransUseHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
665 | { "vcmpx-exec-war-hazard" , "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)" , AMDGPU::FeatureVcmpxExecWARHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
666 | { "vcmpx-permlane-hazard" , "TODO: describe me" , AMDGPU::FeatureVcmpxPermlaneHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
667 | { "vgpr-index-mode" , "Has VGPR mode register indexing" , AMDGPU::FeatureVGPRIndexMode, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
668 | { "vmem-to-lds-load-insts" , "The platform has memory to lds instructions (global_load w/lds bit set, buffer_load w/lds bit set or global_load_lds. This does not include scratch_load_lds." , AMDGPU::FeatureMemToLDSLoad, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
669 | { "vmem-to-scalar-write-hazard" , "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution." , AMDGPU::FeatureVMEMtoScalarWriteHazard, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
670 | { "vmem-write-vgpr-in-order" , "VMEM instructions of the same type write VGPR results in order" , AMDGPU::FeatureVmemWriteVgprInOrder, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
671 | { "volcanic-islands" , "VOLCANIC_ISLANDS GPU generation" , AMDGPU::FeatureVolcanicIslands, { { { 0x100022080000022ULL, 0x3220003c00b008ULL, 0x106160000004005ULL, 0x4102048ULL, 0x0ULL, 0x0ULL, } } } }, |
672 | { "vop3-literal" , "Can use one literal in VOP3" , AMDGPU::FeatureVOP3Literal, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
673 | { "vop3p" , "Has VOP3P packed instructions" , AMDGPU::FeatureVOP3P, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
674 | { "vopd" , "Has VOPD dual issue wave32 instructions" , AMDGPU::FeatureVOPD, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
675 | { "vscnt" , "Has separate store vscnt counter" , AMDGPU::FeatureVscnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
676 | { "wait-xcnt" , "Has s_wait_xcnt instruction" , AMDGPU::FeatureWaitXcnt, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
677 | { "wavefrontsize16" , "The number of threads per wavefront" , AMDGPU::FeatureWavefrontSize16, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
678 | { "wavefrontsize32" , "The number of threads per wavefront" , AMDGPU::FeatureWavefrontSize32, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
679 | { "wavefrontsize64" , "The number of threads per wavefront" , AMDGPU::FeatureWavefrontSize64, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
680 | { "xf32-insts" , "Has instructions that support xf32 format, such as v_mfma_f32_16x16x8_xf32 and v_mfma_f32_32x32x4_xf32" , AMDGPU::FeatureXF32Insts, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
681 | { "xnack" , "Enable XNACK support" , AMDGPU::FeatureXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
682 | { "xnack-support" , "Hardware supports XNACK" , AMDGPU::FeatureSupportsXNACK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } }, |
683 | }; |
684 | |
685 | #ifdef DBGFIELD |
686 | #error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro" |
687 | #endif |
688 | #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
689 | #define DBGFIELD(x) x, |
690 | #define DBGVAL_OR_NULLPTR(x) x |
691 | #else |
692 | #define DBGFIELD(x) |
693 | #define DBGVAL_OR_NULLPTR(x) nullptr |
694 | #endif |
695 | |
696 | // =============================================================== |
697 | // Data tables for the new per-operand machine model. |
698 | |
699 | // {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle} |
700 | extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[] = { |
701 | { 0, 0, 0 }, // Invalid |
702 | { 4, 1, 0}, // #1 |
703 | { 5, 1, 0}, // #2 |
704 | { 6, 1, 0}, // #3 |
705 | { 3, 1, 0}, // #4 |
706 | { 3, 2, 0}, // #5 |
707 | { 2, 1, 0}, // #6 |
708 | { 3, 1, 0}, // #7 |
709 | { 6, 1, 0}, // #8 |
710 | { 1, 1, 0}, // #9 |
711 | { 5, 2, 0}, // #10 |
712 | { 6, 3, 0}, // #11 |
713 | { 7, 2, 0}, // #12 |
714 | { 7, 8, 0}, // #13 |
715 | { 7, 16, 0}, // #14 |
716 | { 4, 1, 0}, // #15 |
717 | { 7, 1, 0}, // #16 |
718 | { 4, 1, 0}, // #17 |
719 | { 8, 1, 0}, // #18 |
720 | { 3, 1, 0}, // #19 |
721 | { 4, 1, 0}, // #20 |
722 | { 3, 2, 0}, // #21 |
723 | { 4, 2, 0}, // #22 |
724 | { 2, 1, 0}, // #23 |
725 | { 4, 1, 0}, // #24 |
726 | { 3, 1, 0}, // #25 |
727 | { 4, 2, 0}, // #26 |
728 | { 8, 1, 0}, // #27 |
729 | { 4, 2, 0}, // #28 |
730 | { 5, 1, 0}, // #29 |
731 | { 7, 1, 0}, // #30 |
732 | { 4, 1, 0}, // #31 |
733 | { 6, 1, 0}, // #32 |
734 | { 4, 2, 0}, // #33 |
735 | { 7, 2, 0}, // #34 |
736 | { 4, 1, 0}, // #35 |
737 | { 6, 1, 0}, // #36 |
738 | { 7, 1, 0}, // #37 |
739 | { 4, 3, 0}, // #38 |
740 | { 8, 3, 0}, // #39 |
741 | { 3, 1, 0}, // #40 |
742 | { 4, 2, 0}, // #41 |
743 | { 7, 1, 0}, // #42 |
744 | { 4, 2, 0}, // #43 |
745 | { 5, 1, 0}, // #44 |
746 | { 6, 1, 0}, // #45 |
747 | { 4, 2, 0}, // #46 |
748 | { 6, 2, 0}, // #47 |
749 | { 4, 3, 0}, // #48 |
750 | { 7, 3, 0}, // #49 |
751 | { 5, 4, 0}, // #50 |
752 | { 5, 8, 0}, // #51 |
753 | { 7, 4, 0}, // #52 |
754 | { 5, 16, 0} // #53 |
755 | }; // AMDGPUWriteProcResTable |
756 | |
757 | // {Cycles, WriteResourceID} |
758 | extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[] = { |
759 | { 0, 0}, // Invalid |
760 | { 1, 0}, // #1 WriteSALU_Write32Bit_WriteFloatFMA_WriteDoubleAdd_Write64Bit_WriteDoubleCvt_WriteIntMul |
761 | {80, 0}, // #2 WriteVMEM |
762 | { 5, 0}, // #3 WriteLDS_WriteSMEM_Write32Bit_WriteFloatCvt_WriteFloatFMA |
763 | { 5, 0}, // #4 WriteLDS_Write32Bit |
764 | { 5, 0}, // #5 WriteLDS |
765 | { 4, 0}, // #6 WriteExport_WriteTrans32_WriteFloatCvt_WriteDoubleCvt_WriteQuarterRate32_WriteIntMul_WriteSFPU_WriteTrans64_Write4PassDGEMM_Write4PassMAI |
766 | { 8, 0}, // #7 WriteBranch_WriteDoubleAdd_Write8PassMAI_WriteQuarterRate32_WriteIntMul_WritePseudoScalarTrans_Write8PassDGEMM |
767 | {500, 0}, // #8 WriteBarrier |
768 | { 1, 0}, // #9 WriteSALU |
769 | { 2, 0}, // #10 Write64Bit_Write2PassMAI_WriteSALU_WriteDoubleAdd |
770 | { 1, 0}, // #11 Write32Bit_WriteFloatFMA_WriteSALU_WriteDouble_WriteIntMul_Write64Bit |
771 | { 1, 0}, // #12 WriteSALU_Write32Bit_Write64Bit |
772 | {16, 0}, // #13 WriteFloatFMA_WriteDouble_WriteTrans64_Write16PassMAI_WriteExport_Write16PassDGEMM |
773 | {16, 0}, // #14 WriteFloatFMA_WriteDouble |
774 | { 1, 0}, // #15 WriteSALU |
775 | { 4, 0}, // #16 WriteIntMul_WriteDouble |
776 | { 1, 0}, // #17 WriteSALU |
777 | { 2, 0}, // #18 Write64Bit |
778 | { 2, 0}, // #19 Write64Bit |
779 | {80, 0}, // #20 WriteVMEM |
780 | {80, 0}, // #21 WriteVMEM |
781 | {80, 0}, // #22 WriteVMEM |
782 | {320, 0}, // #23 WriteVMEM |
783 | {20, 0}, // #24 WriteLDS_WriteSMEM |
784 | {20, 0}, // #25 WriteLDS |
785 | {20, 0}, // #26 WriteLDS |
786 | {32, 0}, // #27 WriteBranch_WriteDoubleAdd_WriteDoubleCvt |
787 | {2000, 0}, // #28 WriteBarrier |
788 | { 2, 0}, // #29 WriteSALU |
789 | { 6, 0}, // #30 Write64Bit_WriteQuarterRate32 |
790 | { 5, 0}, // #31 Write32Bit_WriteFloatFMA |
791 | { 2, 0}, // #32 WriteSALU |
792 | {22, 0}, // #33 WriteDoubleAdd_WriteDoubleCvt |
793 | {10, 0}, // #34 WriteTrans32 |
794 | {22, 0}, // #35 WriteDouble |
795 | { 2, 0}, // #36 WriteSALU |
796 | { 8, 0}, // #37 WriteIntMul |
797 | { 2, 0}, // #38 WriteSALU |
798 | {24, 0}, // #39 WriteTrans64 |
799 | { 6, 0}, // #40 Write64Bit |
800 | { 6, 0}, // #41 Write64Bit |
801 | {320, 0}, // #42 WriteVMEM |
802 | {320, 0}, // #43 WriteVMEM |
803 | {320, 0}, // #44 WriteVMEM |
804 | {38, 0}, // #45 WriteDoubleAdd_WriteDoubleCvt_WriteTrans64 |
805 | {38, 0}, // #46 WriteDouble |
806 | { 2, 0}, // #47 WriteSALU |
807 | {40, 0}, // #48 WriteTrans64 |
808 | { 7, 0}, // #49 WritePseudoScalarTrans_Write64Bit_WriteTrans32 |
809 | { 2, 0}, // #50 WriteSALU |
810 | { 7, 0}, // #51 Write64Bit |
811 | {32, 0}, // #52 WriteDouble |
812 | { 2, 0}, // #53 WriteSALU |
813 | {11, 0}, // #54 WriteIntMul |
814 | { 2, 0}, // #55 WriteSALU |
815 | { 7, 0}, // #56 Write64Bit |
816 | { 7, 0} // #57 Write64Bit |
817 | }; // AMDGPUWriteLatencyTable |
818 | |
819 | // {UseIdx, WriteResourceID, Cycles} |
820 | extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[] = { |
821 | {0, 0, 0}, // Invalid |
822 | {0, 0, -4}, // #1 |
823 | {0, 0, -2} // #2 |
824 | }; // AMDGPUReadAdvanceTable |
825 | |
826 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
827 | static const llvm::MCSchedClassDesc SIQuarterSpeedModelSchedClasses[] = { |
828 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
829 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1 |
830 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2 |
831 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 3, 1, 2, 1, 0, 0}, // #3 |
832 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #4 |
833 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 5, 1, 4, 2, 0, 0}, // #5 |
834 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 6, 1, 6, 1, 0, 0}, // #6 |
835 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 7, 2, 2, 2, 0, 0}, // #7 |
836 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #8 |
837 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
838 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #10 |
839 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
840 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #12 |
841 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 8, 1, 0, 0}, // #13 |
842 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 1, 2, 9, 2, 0, 0}, // #14 |
843 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #15 |
844 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, true, 2, 1, 7, 1, 0, 0}, // #16 |
845 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #17 |
846 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #18 |
847 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #19 |
848 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #20 |
849 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #21 |
850 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #22 |
851 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 1, 2, 14, 2, 0, 0}, // #23 |
852 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 1, 2, 14, 2, 0, 0}, // #24 |
853 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 1, 2, 16, 2, 0, 0}, // #25 |
854 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #26 |
855 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #27 |
856 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #28 |
857 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 13, 1, 0, 0}, // #29 |
858 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 10, 1, 18, 2, 0, 0}, // #30 |
859 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
860 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 11, 1, 20, 3, 0, 0}, // #32 |
861 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
862 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #34 |
863 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #35 |
864 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #36 |
865 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #37 |
866 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #38 |
867 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #39 |
868 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #40 |
869 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #41 |
870 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #42 |
871 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #43 |
872 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #44 |
873 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #45 |
874 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #46 |
875 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #47 |
876 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48 |
877 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49 |
878 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #50 |
879 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #51 |
880 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #52 |
881 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53 |
882 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54 |
883 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55 |
884 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #56 |
885 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #57 |
886 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 1, false, false, true, 2, 1, 10, 1, 2, 1}, // #58 |
887 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #59 |
888 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
889 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
890 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
891 | }; // SIQuarterSpeedModelSchedClasses |
892 | |
893 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
894 | static const llvm::MCSchedClassDesc GFX10SpeedModelSchedClasses[] = { |
895 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
896 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 10, 1, 0, 0}, // #1 |
897 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #2 |
898 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 17, 2, 23, 1, 0, 0}, // #3 |
899 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 19, 2, 24, 1, 0, 0}, // #4 |
900 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 21, 2, 25, 2, 0, 0}, // #5 |
901 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 23, 2, 13, 1, 0, 0}, // #6 |
902 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 25, 3, 23, 2, 0, 0}, // #7 |
903 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 27, 1, 0, 0}, // #8 |
904 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
905 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 27, 1, 0, 0}, // #10 |
906 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
907 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 19, 2, 24, 1, 0, 0}, // #12 |
908 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 28, 1, 0, 0}, // #13 |
909 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 28, 3, 29, 2, 0, 0}, // #14 |
910 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 28, 3, 31, 2, 0, 0}, // #15 |
911 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, true, 15, 2, 33, 1, 0, 0}, // #16 |
912 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, true, 15, 2, 30, 1, 0, 0}, // #17 |
913 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 31, 2, 34, 1, 0, 0}, // #18 |
914 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #19 |
915 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, true, 15, 2, 33, 1, 0, 0}, // #20 |
916 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #21 |
917 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, true, 15, 2, 33, 1, 0, 0}, // #22 |
918 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 28, 3, 31, 2, 0, 0}, // #23 |
919 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 28, 3, 35, 2, 0, 0}, // #24 |
920 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 28, 3, 37, 2, 0, 0}, // #25 |
921 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 15, 2, 7, 1, 0, 0}, // #26 |
922 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, true, 15, 2, 7, 1, 0, 0}, // #27 |
923 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 33, 2, 3, 2, 0, 0}, // #28 |
924 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 35, 3, 39, 1, 0, 0}, // #29 |
925 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 33, 2, 40, 2, 0, 0}, // #30 |
926 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
927 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 38, 2, 42, 3, 0, 0}, // #32 |
928 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
929 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #34 |
930 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #35 |
931 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #36 |
932 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #37 |
933 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #38 |
934 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #39 |
935 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #40 |
936 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #41 |
937 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #42 |
938 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #43 |
939 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #44 |
940 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #45 |
941 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #46 |
942 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #47 |
943 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #48 |
944 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #49 |
945 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #50 |
946 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #51 |
947 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #52 |
948 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #53 |
949 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #54 |
950 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #55 |
951 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, true, 15, 2, 30, 1, 0, 0}, // #56 |
952 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 2, 10, 1, 0, 0}, // #57 |
953 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
954 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
955 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
956 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
957 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
958 | }; // GFX10SpeedModelSchedClasses |
959 | |
960 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
961 | static const llvm::MCSchedClassDesc GFX11SpeedModelSchedClasses[] = { |
962 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
963 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 2, 10, 1, 0, 0}, // #1 |
964 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #2 |
965 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 17, 2, 23, 1, 0, 0}, // #3 |
966 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 19, 2, 24, 1, 0, 0}, // #4 |
967 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 21, 2, 24, 2, 0, 0}, // #5 |
968 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 23, 2, 13, 1, 0, 0}, // #6 |
969 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 25, 3, 23, 2, 0, 0}, // #7 |
970 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 27, 1, 0, 0}, // #8 |
971 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
972 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 27, 1, 0, 0}, // #10 |
973 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 1, false, false, true, 1, 2, 6, 1, 0, 0}, // #11 |
974 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 19, 2, 24, 1, 0, 0}, // #12 |
975 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 28, 1, 0, 0}, // #13 |
976 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 28, 3, 29, 2, 0, 0}, // #14 |
977 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 28, 3, 31, 2, 0, 0}, // #15 |
978 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, true, 15, 2, 45, 1, 0, 0}, // #16 |
979 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, true, 15, 2, 30, 1, 0, 0}, // #17 |
980 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 31, 2, 34, 1, 0, 0}, // #18 |
981 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #19 |
982 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, true, 15, 2, 45, 1, 0, 0}, // #20 |
983 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #21 |
984 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, true, 15, 2, 45, 1, 0, 0}, // #22 |
985 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 28, 3, 31, 2, 0, 0}, // #23 |
986 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 28, 3, 46, 2, 0, 0}, // #24 |
987 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 28, 3, 37, 2, 0, 0}, // #25 |
988 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 15, 2, 7, 1, 0, 0}, // #26 |
989 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, true, 15, 2, 7, 1, 0, 0}, // #27 |
990 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 33, 2, 3, 2, 0, 0}, // #28 |
991 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 35, 3, 48, 1, 0, 0}, // #29 |
992 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 33, 2, 40, 2, 0, 0}, // #30 |
993 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
994 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 38, 2, 42, 3, 0, 0}, // #32 |
995 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
996 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #34 |
997 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #35 |
998 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #36 |
999 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #37 |
1000 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #38 |
1001 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #39 |
1002 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #40 |
1003 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #41 |
1004 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #42 |
1005 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #43 |
1006 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #44 |
1007 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #45 |
1008 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #46 |
1009 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #47 |
1010 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #48 |
1011 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #49 |
1012 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #50 |
1013 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #51 |
1014 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #52 |
1015 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #53 |
1016 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #54 |
1017 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 15, 2, 3, 1, 0, 0}, // #55 |
1018 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, true, 15, 2, 30, 1, 0, 0}, // #56 |
1019 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 2, 10, 1, 0, 0}, // #57 |
1020 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1021 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1022 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1023 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1024 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1025 | }; // GFX11SpeedModelSchedClasses |
1026 | |
1027 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1028 | static const llvm::MCSchedClassDesc GFX12SpeedModelSchedClasses[] = { |
1029 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1030 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 10, 1, 0, 0}, // #1 |
1031 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #2 |
1032 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, false, 15, 2, 23, 1, 0, 0}, // #3 |
1033 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, false, 19, 2, 24, 1, 0, 0}, // #4 |
1034 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, false, 21, 2, 24, 2, 0, 0}, // #5 |
1035 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, false, 23, 2, 13, 1, 0, 0}, // #6 |
1036 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, false, 40, 3, 23, 2, 0, 0}, // #7 |
1037 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, false, 9, 1, 27, 1, 0, 0}, // #8 |
1038 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1039 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, false, 9, 1, 27, 1, 0, 0}, // #10 |
1040 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 1, false, false, false, 1, 2, 6, 1, 0, 0}, // #11 |
1041 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, false, 19, 2, 24, 1, 0, 0}, // #12 |
1042 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, false, 9, 1, 28, 1, 0, 0}, // #13 |
1043 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, false, 43, 3, 29, 2, 0, 0}, // #14 |
1044 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, false, 43, 3, 31, 2, 0, 0}, // #15 |
1045 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, false, 31, 2, 45, 1, 0, 0}, // #16 |
1046 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, false, 31, 2, 30, 1, 0, 0}, // #17 |
1047 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, false, 31, 2, 34, 1, 0, 0}, // #18 |
1048 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #19 |
1049 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, false, 31, 2, 45, 1, 0, 0}, // #20 |
1050 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #21 |
1051 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, false, 31, 2, 45, 1, 0, 0}, // #22 |
1052 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, false, 43, 3, 31, 2, 0, 0}, // #23 |
1053 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, false, 43, 3, 46, 2, 0, 0}, // #24 |
1054 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, false, 43, 3, 37, 2, 0, 0}, // #25 |
1055 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, false, 31, 2, 7, 1, 0, 0}, // #26 |
1056 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, false, 31, 2, 7, 1, 0, 0}, // #27 |
1057 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, false, 46, 2, 3, 2, 0, 0}, // #28 |
1058 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 31, 2, 48, 1, 0, 0}, // #29 |
1059 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 46, 2, 40, 2, 0, 0}, // #30 |
1060 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 31, 2, 49, 1, 0, 0}, // #31 |
1061 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 48, 2, 42, 3, 0, 0}, // #32 |
1062 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1063 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #34 |
1064 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #35 |
1065 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #36 |
1066 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #37 |
1067 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #38 |
1068 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #39 |
1069 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #40 |
1070 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #41 |
1071 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #42 |
1072 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #43 |
1073 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #44 |
1074 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #45 |
1075 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #46 |
1076 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #47 |
1077 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #48 |
1078 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #49 |
1079 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #50 |
1080 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #51 |
1081 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #52 |
1082 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #53 |
1083 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #54 |
1084 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, false, 31, 2, 3, 1, 0, 0}, // #55 |
1085 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, false, 31, 2, 30, 1, 0, 0}, // #56 |
1086 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, false, 1, 2, 10, 1, 0, 0}, // #57 |
1087 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1088 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1089 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1090 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1091 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1092 | }; // GFX12SpeedModelSchedClasses |
1093 | |
1094 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1095 | static const llvm::MCSchedClassDesc GFX1250SpeedModelSchedClasses[] = { |
1096 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1097 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, false, 1, 2, 10, 1, 0, 0}, // #1 |
1098 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #2 |
1099 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, false, 17, 2, 23, 1, 0, 0}, // #3 |
1100 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, false, 19, 2, 24, 1, 0, 0}, // #4 |
1101 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, false, 21, 2, 24, 2, 0, 0}, // #5 |
1102 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, false, 23, 2, 13, 1, 0, 0}, // #6 |
1103 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, false, 25, 3, 23, 2, 0, 0}, // #7 |
1104 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, false, 9, 1, 27, 1, 0, 0}, // #8 |
1105 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1106 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, false, 9, 1, 27, 1, 0, 0}, // #10 |
1107 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 1, false, false, false, 1, 2, 6, 1, 0, 0}, // #11 |
1108 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, false, 19, 2, 24, 1, 0, 0}, // #12 |
1109 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, false, 9, 1, 28, 1, 0, 0}, // #13 |
1110 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, false, 28, 3, 50, 2, 0, 0}, // #14 |
1111 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, false, 28, 3, 31, 2, 0, 0}, // #15 |
1112 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, false, 15, 2, 27, 1, 0, 0}, // #16 |
1113 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, false, 15, 2, 49, 1, 0, 0}, // #17 |
1114 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, false, 31, 2, 49, 1, 0, 0}, // #18 |
1115 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #19 |
1116 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, false, 15, 2, 27, 1, 0, 0}, // #20 |
1117 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #21 |
1118 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, false, 15, 2, 27, 1, 0, 0}, // #22 |
1119 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, false, 28, 3, 31, 2, 0, 0}, // #23 |
1120 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, false, 28, 3, 52, 2, 0, 0}, // #24 |
1121 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, false, 28, 3, 54, 2, 0, 0}, // #25 |
1122 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, false, 15, 2, 30, 1, 0, 0}, // #26 |
1123 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, false, 15, 2, 54, 1, 0, 0}, // #27 |
1124 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, false, 33, 2, 3, 2, 0, 0}, // #28 |
1125 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 35, 3, 45, 1, 0, 0}, // #29 |
1126 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 33, 2, 56, 2, 0, 0}, // #30 |
1127 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 1, false, false, false, 15, 2, 7, 1, 0, 0}, // #31 |
1128 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, false, 38, 2, 42, 3, 0, 0}, // #32 |
1129 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1130 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #34 |
1131 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #35 |
1132 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #36 |
1133 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #37 |
1134 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #38 |
1135 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #39 |
1136 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #40 |
1137 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #41 |
1138 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #42 |
1139 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #43 |
1140 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #44 |
1141 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #45 |
1142 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #46 |
1143 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #47 |
1144 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #48 |
1145 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #49 |
1146 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #50 |
1147 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #51 |
1148 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #52 |
1149 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #53 |
1150 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #54 |
1151 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, false, 15, 2, 3, 1, 0, 0}, // #55 |
1152 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, false, 15, 2, 49, 1, 0, 0}, // #56 |
1153 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, false, 1, 2, 10, 1, 0, 0}, // #57 |
1154 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1155 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1156 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1157 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1158 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1159 | }; // GFX1250SpeedModelSchedClasses |
1160 | |
1161 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1162 | static const llvm::MCSchedClassDesc SIFullSpeedModelSchedClasses[] = { |
1163 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1164 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1 |
1165 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2 |
1166 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 3, 1, 2, 1, 0, 0}, // #3 |
1167 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #4 |
1168 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 5, 1, 3, 2, 0, 0}, // #5 |
1169 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 6, 1, 6, 1, 0, 0}, // #6 |
1170 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 7, 2, 2, 2, 0, 0}, // #7 |
1171 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #8 |
1172 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1173 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #10 |
1174 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
1175 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #12 |
1176 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 8, 1, 0, 0}, // #13 |
1177 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 1, 2, 9, 2, 0, 0}, // #14 |
1178 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #15 |
1179 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #16 |
1180 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #17 |
1181 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #18 |
1182 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #19 |
1183 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #20 |
1184 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #21 |
1185 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #22 |
1186 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #23 |
1187 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 1, 2, 16, 2, 0, 0}, // #24 |
1188 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 1, 2, 16, 2, 0, 0}, // #25 |
1189 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #26 |
1190 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #27 |
1191 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #28 |
1192 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #29 |
1193 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 10, 1, 18, 2, 0, 0}, // #30 |
1194 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
1195 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 11, 1, 20, 3, 0, 0}, // #32 |
1196 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1197 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #34 |
1198 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #35 |
1199 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #36 |
1200 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #37 |
1201 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #38 |
1202 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39 |
1203 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #40 |
1204 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #41 |
1205 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #42 |
1206 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #43 |
1207 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #44 |
1208 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #45 |
1209 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #46 |
1210 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #47 |
1211 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48 |
1212 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49 |
1213 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50 |
1214 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51 |
1215 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52 |
1216 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53 |
1217 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54 |
1218 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55 |
1219 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, true, 2, 1, 10, 1, 0, 0}, // #56 |
1220 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #57 |
1221 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1222 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1223 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1224 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1225 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1226 | }; // SIFullSpeedModelSchedClasses |
1227 | |
1228 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1229 | static const llvm::MCSchedClassDesc SIDPGFX942FullSpeedModelSchedClasses[] = { |
1230 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1231 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1 |
1232 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2 |
1233 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 3, 1, 2, 1, 0, 0}, // #3 |
1234 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #4 |
1235 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 5, 1, 3, 2, 0, 0}, // #5 |
1236 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 6, 1, 6, 1, 0, 0}, // #6 |
1237 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 7, 2, 2, 2, 0, 0}, // #7 |
1238 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #8 |
1239 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1240 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #10 |
1241 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
1242 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #12 |
1243 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 8, 1, 0, 0}, // #13 |
1244 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #14 |
1245 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #15 |
1246 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #16 |
1247 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17 |
1248 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #18 |
1249 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #19 |
1250 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #20 |
1251 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21 |
1252 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22 |
1253 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #23 |
1254 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #24 |
1255 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #25 |
1256 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #26 |
1257 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27 |
1258 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #28 |
1259 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 6, 1, 0, 0}, // #29 |
1260 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 10, 1, 11, 2, 0, 0}, // #30 |
1261 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
1262 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 11, 1, 20, 3, 0, 0}, // #32 |
1263 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1264 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #34 |
1265 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 50, 1, 6, 1, 1, 1}, // #35 |
1266 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 51, 1, 7, 1, 1, 1}, // #36 |
1267 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #37 |
1268 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #38 |
1269 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39 |
1270 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #40 |
1271 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #41 |
1272 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #42 |
1273 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #43 |
1274 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #44 |
1275 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #45 |
1276 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #46 |
1277 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #47 |
1278 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #48 |
1279 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #49 |
1280 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #50 |
1281 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #51 |
1282 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #52 |
1283 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53 |
1284 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54 |
1285 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55 |
1286 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #56 |
1287 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #57 |
1288 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1289 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1290 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1291 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1292 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1293 | }; // SIDPGFX942FullSpeedModelSchedClasses |
1294 | |
1295 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1296 | static const llvm::MCSchedClassDesc SIDPFullSpeedModelSchedClasses[] = { |
1297 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1298 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1 |
1299 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2 |
1300 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 3, 1, 2, 1, 0, 0}, // #3 |
1301 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #4 |
1302 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 5, 1, 3, 2, 0, 0}, // #5 |
1303 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 6, 1, 6, 1, 0, 0}, // #6 |
1304 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 7, 2, 2, 2, 0, 0}, // #7 |
1305 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #8 |
1306 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1307 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #10 |
1308 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
1309 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #12 |
1310 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 8, 1, 0, 0}, // #13 |
1311 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #14 |
1312 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #15 |
1313 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #16 |
1314 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #17 |
1315 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #18 |
1316 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #19 |
1317 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #20 |
1318 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #21 |
1319 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #22 |
1320 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #23 |
1321 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #24 |
1322 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #25 |
1323 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #26 |
1324 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #27 |
1325 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #28 |
1326 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #29 |
1327 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #30 |
1328 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
1329 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 11, 1, 20, 3, 0, 0}, // #32 |
1330 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1331 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #34 |
1332 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 50, 1, 6, 1, 1, 1}, // #35 |
1333 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 51, 1, 7, 1, 1, 1}, // #36 |
1334 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #37 |
1335 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #38 |
1336 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #39 |
1337 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #40 |
1338 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #41 |
1339 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #42 |
1340 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #43 |
1341 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #44 |
1342 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #45 |
1343 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #46 |
1344 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #47 |
1345 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #48 |
1346 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #49 |
1347 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #50 |
1348 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #51 |
1349 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #52 |
1350 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #53 |
1351 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #54 |
1352 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55 |
1353 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #56 |
1354 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #57 |
1355 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1356 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1357 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #60 |
1358 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #61 |
1359 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #62 |
1360 | }; // SIDPFullSpeedModelSchedClasses |
1361 | |
1362 | // {Name, NumMicroOps, BeginGroup, EndGroup, RetireOOO, WriteProcResIdx,#, WriteLatencyIdx,#, ReadAdvanceIdx,#} |
1363 | static const llvm::MCSchedClassDesc SIDPGFX950FullSpeedModelSchedClasses[] = { |
1364 | {DBGFIELD(1) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, |
1365 | {DBGFIELD(/*NullALU_WriteSALU*/ 19) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #1 |
1366 | {DBGFIELD(/*NullALU_Write32Bit*/ 37) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #2 |
1367 | {DBGFIELD(/*NullALU_WriteVMEM*/ 56) 1, false, false, true, 3, 1, 2, 1, 0, 0}, // #3 |
1368 | {DBGFIELD(/*NullALU_WriteLDS*/ 74) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #4 |
1369 | {DBGFIELD(/*NullALU_WriteLDS_WriteLDS*/ 91) 2, false, false, true, 5, 1, 3, 2, 0, 0}, // #5 |
1370 | {DBGFIELD(/*NullALU_WriteExport*/ 117) 1, false, false, true, 6, 1, 6, 1, 0, 0}, // #6 |
1371 | {DBGFIELD(/*NullALU_WriteVMEM_WriteLDS*/ 137) 2, false, false, true, 7, 2, 2, 2, 0, 0}, // #7 |
1372 | {DBGFIELD(/*WriteBranch*/ 164) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #8 |
1373 | {DBGFIELD(/*NullALU*/ 176) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #9 |
1374 | {DBGFIELD(/*NullALU_WriteBranch*/ 184) 1, false, false, true, 9, 1, 7, 1, 0, 0}, // #10 |
1375 | {DBGFIELD(/*NullALU_WriteSFPU*/ 204) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #11 |
1376 | {DBGFIELD(/*NullALU_WriteSMEM*/ 222) 1, false, false, true, 4, 1, 3, 1, 0, 0}, // #12 |
1377 | {DBGFIELD(/*NullALU_WriteBarrier*/ 240) 1, false, false, true, 9, 1, 8, 1, 0, 0}, // #13 |
1378 | {DBGFIELD(/*NullALU_WriteSALU_Write64Bit*/ 261) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #14 |
1379 | {DBGFIELD(/*NullALU_Write32Bit_WriteSALU*/ 290) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #15 |
1380 | {DBGFIELD(/*NullALU_WriteDoubleAdd*/ 319) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #16 |
1381 | {DBGFIELD(/*NullALU_Write64Bit*/ 342) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #17 |
1382 | {DBGFIELD(/*NullALU_WriteTrans32*/ 361) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #18 |
1383 | {DBGFIELD(/*NullALU_WriteFloatCvt*/ 382) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #19 |
1384 | {DBGFIELD(/*NullALU_WriteDoubleCvt*/ 404) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #20 |
1385 | {DBGFIELD(/*NullALU_WriteFloatFMA*/ 427) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #21 |
1386 | {DBGFIELD(/*NullALU_WriteDouble*/ 449) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #22 |
1387 | {DBGFIELD(/*NullALU_WriteFloatFMA_WriteSALU*/ 469) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #23 |
1388 | {DBGFIELD(/*NullALU_WriteDouble_WriteSALU*/ 501) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #24 |
1389 | {DBGFIELD(/*NullALU_WriteIntMul_WriteSALU*/ 531) 2, false, false, true, 1, 2, 11, 2, 0, 0}, // #25 |
1390 | {DBGFIELD(/*NullALU_WriteQuarterRate32*/ 561) 1, false, false, true, 2, 1, 6, 1, 0, 0}, // #26 |
1391 | {DBGFIELD(/*NullALU_WriteIntMul*/ 588) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #27 |
1392 | {DBGFIELD(/*NullALU_Write32Bit_Write32Bit*/ 608) 2, false, false, true, 10, 1, 11, 2, 0, 0}, // #28 |
1393 | {DBGFIELD(/*NullALU_WriteTrans64*/ 638) 1, false, false, false, 2, 1, 6, 1, 0, 0}, // #29 |
1394 | {DBGFIELD(/*NullALU_Write64Bit_Write64Bit*/ 659) 2, false, false, false, 10, 1, 11, 2, 0, 0}, // #30 |
1395 | {DBGFIELD(/*NullALU_WritePseudoScalarTrans*/ 689) 8191, false, false, false, 0, 0, 0, 0, 0, 0}, // #31 |
1396 | {DBGFIELD(/*NullALU_WriteVMEM_WriteVMEM_WriteVMEM*/ 720) 3, false, false, true, 11, 1, 20, 3, 0, 0}, // #32 |
1397 | {DBGFIELD(/*COPY*/ 758) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #33 |
1398 | {DBGFIELD(/*V_ACCVGPR_WRITE_B32_e64*/ 763) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #34 |
1399 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 787) 1, false, false, true, 50, 1, 6, 1, 1, 1}, // #35 |
1400 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 1913) 1, false, false, true, 53, 1, 13, 1, 1, 1}, // #36 |
1401 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 7296) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #37 |
1402 | {DBGFIELD(/*V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi*/ 14176) 1, false, false, true, 12, 1, 10, 1, 1, 1}, // #38 |
1403 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 15123) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #39 |
1404 | {DBGFIELD(/*V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd*/ 20248) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #40 |
1405 | {DBGFIELD(/*V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi*/ 20377) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #41 |
1406 | {DBGFIELD(/*V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd*/ 20971) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #42 |
1407 | {DBGFIELD(/*V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi*/ 21962) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #43 |
1408 | {DBGFIELD(/*V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd*/ 23308) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #44 |
1409 | {DBGFIELD(/*V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi*/ 23506) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #45 |
1410 | {DBGFIELD(/*V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd*/ 24289) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #46 |
1411 | {DBGFIELD(/*V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi*/ 25807) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #47 |
1412 | {DBGFIELD(/*V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940*/ 27668) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #48 |
1413 | {DBGFIELD(/*V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940*/ 28624) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #49 |
1414 | {DBGFIELD(/*V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd*/ 29570) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #50 |
1415 | {DBGFIELD(/*V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd*/ 29699) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #51 |
1416 | {DBGFIELD(/*V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 29897) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #52 |
1417 | {DBGFIELD(/*V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd*/ 31454) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #53 |
1418 | {DBGFIELD(/*V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd*/ 33227) 8190, false, false, false, 0, 0, 0, 0, 0, 0}, // #54 |
1419 | {DBGFIELD(/*Write32Bit*/ 35873) 1, false, false, true, 2, 1, 1, 1, 0, 0}, // #55 |
1420 | {DBGFIELD(/*Write64Bit*/ 35884) 1, false, false, false, 2, 1, 1, 1, 0, 0}, // #56 |
1421 | {DBGFIELD(/*WriteSALU*/ 35895) 1, false, false, true, 1, 1, 1, 1, 0, 0}, // #57 |
1422 | {DBGFIELD(/*Write64Bit_MIVGPRRead*/ 35905) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #58 |
1423 | {DBGFIELD(/*Write64Bit_ReadDefault*/ 35927) 0, false, false, false, 0, 0, 0, 0, 0, 0}, // #59 |
1424 | {DBGFIELD(/*Write16PassMAI_MIMFMARead*/ 35950) 1, false, false, true, 14, 1, 13, 1, 1, 1}, // #60 |
1425 | {DBGFIELD(/*Write8PassMAI_MIMFMARead*/ 35976) 1, false, false, true, 13, 1, 7, 1, 1, 1}, // #61 |
1426 | {DBGFIELD(/*Write4PassMAI_MIMFMARead*/ 36001) 1, false, false, true, 52, 1, 6, 1, 1, 1}, // #62 |
1427 | }; // SIDPGFX950FullSpeedModelSchedClasses |
1428 | |
1429 | #ifdef __GNUC__ |
1430 | #pragma GCC diagnostic push |
1431 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
1432 | #endif |
1433 | static constexpr char AMDGPUSchedClassNamesStorage[] = |
1434 | "\0" |
1435 | "InvalidSchedClass\0" |
1436 | "NullALU_WriteSALU\0" |
1437 | "NullALU_Write32Bit\0" |
1438 | "NullALU_WriteVMEM\0" |
1439 | "NullALU_WriteLDS\0" |
1440 | "NullALU_WriteLDS_WriteLDS\0" |
1441 | "NullALU_WriteExport\0" |
1442 | "NullALU_WriteVMEM_WriteLDS\0" |
1443 | "WriteBranch\0" |
1444 | "NullALU\0" |
1445 | "NullALU_WriteBranch\0" |
1446 | "NullALU_WriteSFPU\0" |
1447 | "NullALU_WriteSMEM\0" |
1448 | "NullALU_WriteBarrier\0" |
1449 | "NullALU_WriteSALU_Write64Bit\0" |
1450 | "NullALU_Write32Bit_WriteSALU\0" |
1451 | "NullALU_WriteDoubleAdd\0" |
1452 | "NullALU_Write64Bit\0" |
1453 | "NullALU_WriteTrans32\0" |
1454 | "NullALU_WriteFloatCvt\0" |
1455 | "NullALU_WriteDoubleCvt\0" |
1456 | "NullALU_WriteFloatFMA\0" |
1457 | "NullALU_WriteDouble\0" |
1458 | "NullALU_WriteFloatFMA_WriteSALU\0" |
1459 | "NullALU_WriteDouble_WriteSALU\0" |
1460 | "NullALU_WriteIntMul_WriteSALU\0" |
1461 | "NullALU_WriteQuarterRate32\0" |
1462 | "NullALU_WriteIntMul\0" |
1463 | "NullALU_Write32Bit_Write32Bit\0" |
1464 | "NullALU_WriteTrans64\0" |
1465 | "NullALU_Write64Bit_Write64Bit\0" |
1466 | "NullALU_WritePseudoScalarTrans\0" |
1467 | "NullALU_WriteVMEM_WriteVMEM_WriteVMEM\0" |
1468 | "COPY\0" |
1469 | "V_ACCVGPR_WRITE_B32_e64\0" |
1470 | "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_F64_4X4X4F64_e64_V_MFMA_F64_4X4X4F64_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_F64_4X4X4F64_gfx90a_acd_V_MFMA_F64_4X4X4F64_gfx90a_vcd_V_MFMA_F64_4X4X4F64_gfx940_acd_V_MFMA_F64_4X4X4F64_gfx940_vcd_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0" |
1471 | "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F64_16X16X4F64_e64_V_MFMA_F64_16X16X4F64_mac_e64_V_MFMA_F64_16X16X4F64_mac_vgprcd_e64_V_MFMA_F64_16X16X4F64_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_F64_16X16X4F64_gfx90a_acd_V_MFMA_F64_16X16X4F64_gfx90a_vcd_V_MFMA_F64_16X16X4F64_gfx940_acd_V_MFMA_F64_16X16X4F64_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0" |
1472 | "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0" |
1473 | "V_MFMA_F32_4X4X1F32_e64_V_MFMA_F32_4X4X1F32_vgprcd_e64_V_MFMA_F32_4X4X2BF16_e64_V_MFMA_F32_4X4X2BF16_vgprcd_e64_V_MFMA_F32_4X4X4BF16_1K_e64_V_MFMA_F32_4X4X4BF16_1K_vgprcd_e64_V_MFMA_F32_4X4X4F16_e64_V_MFMA_F32_4X4X4F16_vgprcd_e64_V_MFMA_I32_4X4X4I8_e64_V_MFMA_I32_4X4X4I8_vgprcd_e64_V_MFMA_F32_4X4X1F32_gfx90a_acd_V_MFMA_F32_4X4X1F32_gfx90a_vcd_V_MFMA_F32_4X4X1F32_gfx940_acd_V_MFMA_F32_4X4X1F32_gfx940_vcd_V_MFMA_F32_4X4X1F32_vi_V_MFMA_F32_4X4X2BF16_gfx90a_acd_V_MFMA_F32_4X4X2BF16_gfx90a_vcd_V_MFMA_F32_4X4X2BF16_vi_V_MFMA_F32_4X4X4BF16_1K_gfx90a_acd_V_MFMA_F32_4X4X4BF16_1K_gfx90a_vcd_V_MFMA_F32_4X4X4BF16_1K_gfx940_acd_V_MFMA_F32_4X4X4BF16_1K_gfx940_vcd_V_MFMA_F32_4X4X4F16_gfx90a_acd_V_MFMA_F32_4X4X4F16_gfx90a_vcd_V_MFMA_F32_4X4X4F16_gfx940_acd_V_MFMA_F32_4X4X4F16_gfx940_vcd_V_MFMA_F32_4X4X4F16_vi_V_MFMA_I32_4X4X4I8_gfx90a_acd_V_MFMA_I32_4X4X4I8_gfx90a_vcd_V_MFMA_I32_4X4X4I8_gfx940_acd_V_MFMA_I32_4X4X4I8_gfx940_vcd_V_MFMA_I32_4X4X4I8_vi\0" |
1474 | "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X2BF16_e64_V_MFMA_F32_16X16X2BF16_mac_e64_V_MFMA_F32_16X16X2BF16_mac_vgprcd_e64_V_MFMA_F32_16X16X2BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_F32_16X16X8BF16_e64_V_MFMA_F32_16X16X8BF16_vgprcd_e64_V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X2BF16_gfx90a_acd_V_MFMA_F32_16X16X2BF16_gfx90a_vcd_V_MFMA_F32_16X16X2BF16_vi_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_F32_16X16X8BF16_gfx90a_acd_V_MFMA_F32_16X16X8BF16_gfx90a_vcd_V_MFMA_F32_16X16X8BF16_vi_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0" |
1475 | "V_MFMA_F32_16X16X8XF32_e64_V_MFMA_F32_16X16X8XF32_vgprcd_e64_V_MFMA_F32_16X16X8XF32_gfx940_acd_V_MFMA_F32_16X16X8XF32_gfx940_vcd\0" |
1476 | "V_MFMA_F32_16X16X16BF16_1K_e64_V_MFMA_F32_16X16X16BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X16F16_e64_V_MFMA_F32_16X16X16F16_vgprcd_e64_V_MFMA_I32_16X16X16I8_e64_V_MFMA_I32_16X16X16I8_vgprcd_e64_V_MFMA_F32_16X16X16BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X16BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X16BF16_1K_gfx940_acd_V_MFMA_F32_16X16X16BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X16F16_gfx90a_acd_V_MFMA_F32_16X16X16F16_gfx90a_vcd_V_MFMA_F32_16X16X16F16_gfx940_acd_V_MFMA_F32_16X16X16F16_gfx940_vcd_V_MFMA_F32_16X16X16F16_vi_V_MFMA_I32_16X16X16I8_gfx90a_acd_V_MFMA_I32_16X16X16I8_gfx90a_vcd_V_MFMA_I32_16X16X16I8_vi\0" |
1477 | "V_MFMA_F32_16X16X32_BF16_e64_V_MFMA_F32_16X16X32_BF16_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_BF8_e64_V_MFMA_F32_16X16X32_BF8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_BF8_FP8_e64_V_MFMA_F32_16X16X32_BF8_FP8_vgprcd_e64_V_MFMA_F32_16X16X32_F16_e64_V_MFMA_F32_16X16X32_F16_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_BF8_e64_V_MFMA_F32_16X16X32_FP8_BF8_vgprcd_e64_V_MFMA_F32_16X16X32_FP8_FP8_e64_V_MFMA_F32_16X16X32_FP8_FP8_vgprcd_e64_V_MFMA_I32_16X16X32I8_e64_V_MFMA_I32_16X16X32I8_vgprcd_e64_V_MFMA_F32_16X16X32_BF16_gfx940_acd_V_MFMA_F32_16X16X32_BF16_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_BF8_FP8_gfx940_vcd_V_MFMA_F32_16X16X32_F16_gfx940_acd_V_MFMA_F32_16X16X32_F16_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_BF8_gfx940_vcd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_acd_V_MFMA_F32_16X16X32_FP8_FP8_gfx940_vcd_V_MFMA_I32_16X16X32I8_gfx940_acd_V_MFMA_I32_16X16X32I8_gfx940_vcd\0" |
1478 | "V_MFMA_F32_16X16X1F32_e64_V_MFMA_F32_16X16X1F32_mac_e64_V_MFMA_F32_16X16X1F32_mac_vgprcd_e64_V_MFMA_F32_16X16X1F32_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_e64_V_MFMA_F32_16X16X4BF16_1K_mac_e64_V_MFMA_F32_16X16X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_16X16X4BF16_1K_vgprcd_e64_V_MFMA_F32_16X16X4F16_e64_V_MFMA_F32_16X16X4F16_mac_e64_V_MFMA_F32_16X16X4F16_mac_vgprcd_e64_V_MFMA_F32_16X16X4F16_vgprcd_e64_V_MFMA_F32_16X16X4F32_e64_V_MFMA_F32_16X16X4F32_vgprcd_e64_V_MFMA_I32_16X16X4I8_e64_V_MFMA_I32_16X16X4I8_mac_e64_V_MFMA_I32_16X16X4I8_mac_vgprcd_e64_V_MFMA_I32_16X16X4I8_vgprcd_e64_V_MFMA_F32_16X16X1F32_gfx90a_acd_V_MFMA_F32_16X16X1F32_gfx90a_vcd_V_MFMA_F32_16X16X1F32_gfx940_acd_V_MFMA_F32_16X16X1F32_gfx940_vcd_V_MFMA_F32_16X16X1F32_vi_V_MFMA_F32_16X16X4BF16_1K_gfx90a_acd_V_MFMA_F32_16X16X4BF16_1K_gfx90a_vcd_V_MFMA_F32_16X16X4BF16_1K_gfx940_acd_V_MFMA_F32_16X16X4BF16_1K_gfx940_vcd_V_MFMA_F32_16X16X4F16_gfx90a_acd_V_MFMA_F32_16X16X4F16_gfx90a_vcd_V_MFMA_F32_16X16X4F16_gfx940_acd_V_MFMA_F32_16X16X4F16_gfx940_vcd_V_MFMA_F32_16X16X4F16_vi_V_MFMA_F32_16X16X4F32_gfx90a_acd_V_MFMA_F32_16X16X4F32_gfx90a_vcd_V_MFMA_F32_16X16X4F32_gfx940_acd_V_MFMA_F32_16X16X4F32_gfx940_vcd_V_MFMA_F32_16X16X4F32_vi_V_MFMA_I32_16X16X4I8_gfx90a_acd_V_MFMA_I32_16X16X4I8_gfx90a_vcd_V_MFMA_I32_16X16X4I8_gfx940_acd_V_MFMA_I32_16X16X4I8_gfx940_vcd_V_MFMA_I32_16X16X4I8_vi\0" |
1479 | "V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd\0" |
1480 | "V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi\0" |
1481 | "V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd\0" |
1482 | "V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi\0" |
1483 | "V_SMFMAC_F32_16X16X128_BF8_BF8_e64_V_SMFMAC_F32_16X16X128_BF8_FP8_e64_V_SMFMAC_F32_16X16X128_FP8_BF8_e64_V_SMFMAC_F32_16X16X128_FP8_FP8_e64_V_SMFMAC_F32_16X16X32_BF16_e64_V_SMFMAC_F32_16X16X32_F16_e64_V_SMFMAC_F32_16X16X64_BF16_e64_V_SMFMAC_F32_16X16X64_BF8_BF8_e64_V_SMFMAC_F32_16X16X64_BF8_FP8_e64_V_SMFMAC_F32_16X16X64_F16_e64_V_SMFMAC_F32_16X16X64_FP8_BF8_e64_V_SMFMAC_F32_16X16X64_FP8_FP8_e64_V_SMFMAC_I32_16X16X128_I8_e64_V_SMFMAC_I32_16X16X64_I8_e64_V_SMFMAC_F32_16X16X128_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X128_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X128_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X128_FP8_FP8_gfx940_V_SMFMAC_F32_16X16X32_BF16_gfx940_V_SMFMAC_F32_16X16X32_F16_gfx940_V_SMFMAC_F32_16X16X64_BF16_gfx940_V_SMFMAC_F32_16X16X64_BF8_BF8_gfx940_V_SMFMAC_F32_16X16X64_BF8_FP8_gfx940_V_SMFMAC_F32_16X16X64_F16_gfx940_V_SMFMAC_F32_16X16X64_FP8_BF8_gfx940_V_SMFMAC_F32_16X16X64_FP8_FP8_gfx940_V_SMFMAC_I32_16X16X128_I8_gfx940_V_SMFMAC_I32_16X16X64_I8_gfx940\0" |
1484 | "V_SMFMAC_F32_32X32X16_BF16_e64_V_SMFMAC_F32_32X32X16_F16_e64_V_SMFMAC_F32_32X32X32_BF16_e64_V_SMFMAC_F32_32X32X32_BF8_BF8_e64_V_SMFMAC_F32_32X32X32_BF8_FP8_e64_V_SMFMAC_F32_32X32X32_F16_e64_V_SMFMAC_F32_32X32X32_FP8_BF8_e64_V_SMFMAC_F32_32X32X32_FP8_FP8_e64_V_SMFMAC_F32_32X32X64_BF8_BF8_e64_V_SMFMAC_F32_32X32X64_BF8_FP8_e64_V_SMFMAC_F32_32X32X64_FP8_BF8_e64_V_SMFMAC_F32_32X32X64_FP8_FP8_e64_V_SMFMAC_I32_32X32X32_I8_e64_V_SMFMAC_I32_32X32X64_I8_e64_V_SMFMAC_F32_32X32X16_BF16_gfx940_V_SMFMAC_F32_32X32X16_F16_gfx940_V_SMFMAC_F32_32X32X32_BF16_gfx940_V_SMFMAC_F32_32X32X32_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X32_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X32_F16_gfx940_V_SMFMAC_F32_32X32X32_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X32_FP8_FP8_gfx940_V_SMFMAC_F32_32X32X64_BF8_BF8_gfx940_V_SMFMAC_F32_32X32X64_BF8_FP8_gfx940_V_SMFMAC_F32_32X32X64_FP8_BF8_gfx940_V_SMFMAC_F32_32X32X64_FP8_FP8_gfx940_V_SMFMAC_I32_32X32X32_I8_gfx940_V_SMFMAC_I32_32X32X64_I8_gfx940\0" |
1485 | "V_MFMA_I32_16X16X64_I8_e64_V_MFMA_I32_16X16X64_I8_vgprcd_e64_V_MFMA_I32_16X16X64_I8_gfx940_acd_V_MFMA_I32_16X16X64_I8_gfx940_vcd\0" |
1486 | "V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd\0" |
1487 | "V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0" |
1488 | "V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd\0" |
1489 | "V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd\0" |
1490 | "Write32Bit\0" |
1491 | "Write64Bit\0" |
1492 | "WriteSALU\0" |
1493 | "Write64Bit_MIVGPRRead\0" |
1494 | "Write64Bit_ReadDefault\0" |
1495 | "Write16PassMAI_MIMFMARead\0" |
1496 | "Write8PassMAI_MIMFMARead\0" |
1497 | "Write4PassMAI_MIMFMARead\0" |
1498 | ; |
1499 | #ifdef __GNUC__ |
1500 | #pragma GCC diagnostic pop |
1501 | #endif |
1502 | |
1503 | static constexpr llvm::StringTable AMDGPUSchedClassNames = |
1504 | AMDGPUSchedClassNamesStorage; |
1505 | |
1506 | static const llvm::MCSchedModel NoSchedModel = { |
1507 | MCSchedModel::DefaultIssueWidth, |
1508 | MCSchedModel::DefaultMicroOpBufferSize, |
1509 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1510 | MCSchedModel::DefaultLoadLatency, |
1511 | MCSchedModel::DefaultHighLatency, |
1512 | MCSchedModel::DefaultMispredictPenalty, |
1513 | false, // PostRAScheduler |
1514 | false, // CompleteModel |
1515 | false, // EnableIntervals |
1516 | 0, // Processor ID |
1517 | nullptr, nullptr, 0, 0, // No instruction-level machine model. |
1518 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1519 | nullptr, // No Itinerary |
1520 | nullptr // No extra processor descriptor |
1521 | }; |
1522 | |
1523 | static const unsigned SIQuarterSpeedModelProcResourceSubUnits[] = { |
1524 | 0, // Invalid |
1525 | }; |
1526 | |
1527 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1528 | static const llvm::MCProcResourceDesc SIQuarterSpeedModelProcResources[] = { |
1529 | {"InvalidUnit" , 0, 0, 0, 0}, |
1530 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1531 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1532 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1533 | {"HWSALU" , 1, 0, 1, nullptr}, // #4 |
1534 | {"HWVALU" , 1, 0, 1, nullptr}, // #5 |
1535 | {"HWVMEM" , 1, 0, 1, nullptr}, // #6 |
1536 | {"HWXDL" , 1, 0, 0, nullptr}, // #7 |
1537 | }; |
1538 | |
1539 | static const llvm::MCSchedModel SIQuarterSpeedModel = { |
1540 | 1, // IssueWidth |
1541 | 1, // MicroOpBufferSize |
1542 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1543 | MCSchedModel::DefaultLoadLatency, |
1544 | MCSchedModel::DefaultHighLatency, |
1545 | 20, // MispredictPenalty |
1546 | true, // PostRAScheduler |
1547 | true, // CompleteModel |
1548 | false, // EnableIntervals |
1549 | 1, // Processor ID |
1550 | SIQuarterSpeedModelProcResources, |
1551 | SIQuarterSpeedModelSchedClasses, |
1552 | 8, |
1553 | 63, |
1554 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1555 | nullptr, // No Itinerary |
1556 | nullptr // No extra processor descriptor |
1557 | }; |
1558 | |
1559 | static const unsigned GFX10SpeedModelProcResourceSubUnits[] = { |
1560 | 0, // Invalid |
1561 | }; |
1562 | |
1563 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1564 | static const llvm::MCProcResourceDesc GFX10SpeedModelProcResources[] = { |
1565 | {"InvalidUnit" , 0, 0, 0, 0}, |
1566 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1567 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1568 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1569 | {"HWRC" , 1, 0, 1, nullptr}, // #4 |
1570 | {"HWSALU" , 1, 0, 1, nullptr}, // #5 |
1571 | {"HWTransVALU" , 1, 0, 1, nullptr}, // #6 |
1572 | {"HWVALU" , 1, 0, 1, nullptr}, // #7 |
1573 | {"HWVMEM" , 1, 0, 1, nullptr}, // #8 |
1574 | }; |
1575 | |
1576 | static const llvm::MCSchedModel GFX10SpeedModel = { |
1577 | 1, // IssueWidth |
1578 | 1, // MicroOpBufferSize |
1579 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1580 | MCSchedModel::DefaultLoadLatency, |
1581 | MCSchedModel::DefaultHighLatency, |
1582 | 20, // MispredictPenalty |
1583 | true, // PostRAScheduler |
1584 | true, // CompleteModel |
1585 | false, // EnableIntervals |
1586 | 2, // Processor ID |
1587 | GFX10SpeedModelProcResources, |
1588 | GFX10SpeedModelSchedClasses, |
1589 | 9, |
1590 | 63, |
1591 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1592 | nullptr, // No Itinerary |
1593 | nullptr // No extra processor descriptor |
1594 | }; |
1595 | |
1596 | static const unsigned GFX11SpeedModelProcResourceSubUnits[] = { |
1597 | 0, // Invalid |
1598 | }; |
1599 | |
1600 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1601 | static const llvm::MCProcResourceDesc GFX11SpeedModelProcResources[] = { |
1602 | {"InvalidUnit" , 0, 0, 0, 0}, |
1603 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1604 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1605 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1606 | {"HWRC" , 1, 0, 1, nullptr}, // #4 |
1607 | {"HWSALU" , 1, 0, 1, nullptr}, // #5 |
1608 | {"HWTransVALU" , 1, 0, 1, nullptr}, // #6 |
1609 | {"HWVALU" , 1, 0, 1, nullptr}, // #7 |
1610 | {"HWVMEM" , 1, 0, 1, nullptr}, // #8 |
1611 | }; |
1612 | |
1613 | static const llvm::MCSchedModel GFX11SpeedModel = { |
1614 | 1, // IssueWidth |
1615 | 1, // MicroOpBufferSize |
1616 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1617 | MCSchedModel::DefaultLoadLatency, |
1618 | MCSchedModel::DefaultHighLatency, |
1619 | 20, // MispredictPenalty |
1620 | true, // PostRAScheduler |
1621 | true, // CompleteModel |
1622 | false, // EnableIntervals |
1623 | 3, // Processor ID |
1624 | GFX11SpeedModelProcResources, |
1625 | GFX11SpeedModelSchedClasses, |
1626 | 9, |
1627 | 63, |
1628 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1629 | nullptr, // No Itinerary |
1630 | nullptr // No extra processor descriptor |
1631 | }; |
1632 | |
1633 | static const unsigned GFX12SpeedModelProcResourceSubUnits[] = { |
1634 | 0, // Invalid |
1635 | }; |
1636 | |
1637 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1638 | static const llvm::MCProcResourceDesc GFX12SpeedModelProcResources[] = { |
1639 | {"InvalidUnit" , 0, 0, 0, 0}, |
1640 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1641 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1642 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1643 | {"HWRC" , 1, 0, 1, nullptr}, // #4 |
1644 | {"HWSALU" , 1, 0, 1, nullptr}, // #5 |
1645 | {"HWVALU" , 1, 0, 1, nullptr}, // #6 |
1646 | {"HWVMEM" , 1, 0, 1, nullptr}, // #7 |
1647 | }; |
1648 | |
1649 | static const llvm::MCSchedModel GFX12SpeedModel = { |
1650 | 1, // IssueWidth |
1651 | 1, // MicroOpBufferSize |
1652 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1653 | MCSchedModel::DefaultLoadLatency, |
1654 | MCSchedModel::DefaultHighLatency, |
1655 | 20, // MispredictPenalty |
1656 | true, // PostRAScheduler |
1657 | true, // CompleteModel |
1658 | false, // EnableIntervals |
1659 | 4, // Processor ID |
1660 | GFX12SpeedModelProcResources, |
1661 | GFX12SpeedModelSchedClasses, |
1662 | 8, |
1663 | 63, |
1664 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1665 | nullptr, // No Itinerary |
1666 | nullptr // No extra processor descriptor |
1667 | }; |
1668 | |
1669 | static const unsigned GFX1250SpeedModelProcResourceSubUnits[] = { |
1670 | 0, // Invalid |
1671 | }; |
1672 | |
1673 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1674 | static const llvm::MCProcResourceDesc GFX1250SpeedModelProcResources[] = { |
1675 | {"InvalidUnit" , 0, 0, 0, 0}, |
1676 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1677 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1678 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1679 | {"HWRC" , 1, 0, 1, nullptr}, // #4 |
1680 | {"HWSALU" , 1, 0, 1, nullptr}, // #5 |
1681 | {"HWTransVALU" , 1, 0, 1, nullptr}, // #6 |
1682 | {"HWVALU" , 1, 0, 1, nullptr}, // #7 |
1683 | {"HWVMEM" , 1, 0, 1, nullptr}, // #8 |
1684 | }; |
1685 | |
1686 | static const llvm::MCSchedModel GFX1250SpeedModel = { |
1687 | 1, // IssueWidth |
1688 | 1, // MicroOpBufferSize |
1689 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1690 | MCSchedModel::DefaultLoadLatency, |
1691 | MCSchedModel::DefaultHighLatency, |
1692 | 20, // MispredictPenalty |
1693 | true, // PostRAScheduler |
1694 | true, // CompleteModel |
1695 | false, // EnableIntervals |
1696 | 5, // Processor ID |
1697 | GFX1250SpeedModelProcResources, |
1698 | GFX1250SpeedModelSchedClasses, |
1699 | 9, |
1700 | 63, |
1701 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1702 | nullptr, // No Itinerary |
1703 | nullptr // No extra processor descriptor |
1704 | }; |
1705 | |
1706 | static const unsigned SIFullSpeedModelProcResourceSubUnits[] = { |
1707 | 0, // Invalid |
1708 | }; |
1709 | |
1710 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1711 | static const llvm::MCProcResourceDesc SIFullSpeedModelProcResources[] = { |
1712 | {"InvalidUnit" , 0, 0, 0, 0}, |
1713 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1714 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1715 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1716 | {"HWSALU" , 1, 0, 1, nullptr}, // #4 |
1717 | {"HWVALU" , 1, 0, 1, nullptr}, // #5 |
1718 | {"HWVMEM" , 1, 0, 1, nullptr}, // #6 |
1719 | {"HWXDL" , 1, 0, 0, nullptr}, // #7 |
1720 | }; |
1721 | |
1722 | static const llvm::MCSchedModel SIFullSpeedModel = { |
1723 | 1, // IssueWidth |
1724 | 1, // MicroOpBufferSize |
1725 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1726 | MCSchedModel::DefaultLoadLatency, |
1727 | MCSchedModel::DefaultHighLatency, |
1728 | 20, // MispredictPenalty |
1729 | true, // PostRAScheduler |
1730 | true, // CompleteModel |
1731 | false, // EnableIntervals |
1732 | 6, // Processor ID |
1733 | SIFullSpeedModelProcResources, |
1734 | SIFullSpeedModelSchedClasses, |
1735 | 8, |
1736 | 63, |
1737 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1738 | nullptr, // No Itinerary |
1739 | nullptr // No extra processor descriptor |
1740 | }; |
1741 | |
1742 | static const unsigned SIDPGFX942FullSpeedModelProcResourceSubUnits[] = { |
1743 | 0, // Invalid |
1744 | }; |
1745 | |
1746 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1747 | static const llvm::MCProcResourceDesc SIDPGFX942FullSpeedModelProcResources[] = { |
1748 | {"InvalidUnit" , 0, 0, 0, 0}, |
1749 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1750 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1751 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1752 | {"HWSALU" , 1, 0, 1, nullptr}, // #4 |
1753 | {"HWVALU" , 1, 0, 1, nullptr}, // #5 |
1754 | {"HWVMEM" , 1, 0, 1, nullptr}, // #6 |
1755 | {"HWXDL" , 1, 0, 0, nullptr}, // #7 |
1756 | }; |
1757 | |
1758 | static const llvm::MCSchedModel SIDPGFX942FullSpeedModel = { |
1759 | 1, // IssueWidth |
1760 | 1, // MicroOpBufferSize |
1761 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1762 | MCSchedModel::DefaultLoadLatency, |
1763 | MCSchedModel::DefaultHighLatency, |
1764 | 20, // MispredictPenalty |
1765 | true, // PostRAScheduler |
1766 | true, // CompleteModel |
1767 | false, // EnableIntervals |
1768 | 7, // Processor ID |
1769 | SIDPGFX942FullSpeedModelProcResources, |
1770 | SIDPGFX942FullSpeedModelSchedClasses, |
1771 | 8, |
1772 | 63, |
1773 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1774 | nullptr, // No Itinerary |
1775 | nullptr // No extra processor descriptor |
1776 | }; |
1777 | |
1778 | static const unsigned SIDPFullSpeedModelProcResourceSubUnits[] = { |
1779 | 0, // Invalid |
1780 | }; |
1781 | |
1782 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1783 | static const llvm::MCProcResourceDesc SIDPFullSpeedModelProcResources[] = { |
1784 | {"InvalidUnit" , 0, 0, 0, 0}, |
1785 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1786 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1787 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1788 | {"HWSALU" , 1, 0, 1, nullptr}, // #4 |
1789 | {"HWVALU" , 1, 0, 1, nullptr}, // #5 |
1790 | {"HWVMEM" , 1, 0, 1, nullptr}, // #6 |
1791 | {"HWXDL" , 1, 0, 0, nullptr}, // #7 |
1792 | }; |
1793 | |
1794 | static const llvm::MCSchedModel SIDPFullSpeedModel = { |
1795 | 1, // IssueWidth |
1796 | 1, // MicroOpBufferSize |
1797 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1798 | MCSchedModel::DefaultLoadLatency, |
1799 | MCSchedModel::DefaultHighLatency, |
1800 | 20, // MispredictPenalty |
1801 | true, // PostRAScheduler |
1802 | true, // CompleteModel |
1803 | false, // EnableIntervals |
1804 | 8, // Processor ID |
1805 | SIDPFullSpeedModelProcResources, |
1806 | SIDPFullSpeedModelSchedClasses, |
1807 | 8, |
1808 | 63, |
1809 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1810 | nullptr, // No Itinerary |
1811 | nullptr // No extra processor descriptor |
1812 | }; |
1813 | |
1814 | static const unsigned SIDPGFX950FullSpeedModelProcResourceSubUnits[] = { |
1815 | 0, // Invalid |
1816 | }; |
1817 | |
1818 | // {Name, NumUnits, SuperIdx, BufferSize, SubUnitsIdxBegin} |
1819 | static const llvm::MCProcResourceDesc SIDPGFX950FullSpeedModelProcResources[] = { |
1820 | {"InvalidUnit" , 0, 0, 0, 0}, |
1821 | {"HWBranch" , 1, 0, 1, nullptr}, // #1 |
1822 | {"HWExport" , 1, 0, 1, nullptr}, // #2 |
1823 | {"HWLGKM" , 1, 0, 1, nullptr}, // #3 |
1824 | {"HWSALU" , 1, 0, 1, nullptr}, // #4 |
1825 | {"HWVALU" , 1, 0, 1, nullptr}, // #5 |
1826 | {"HWVMEM" , 1, 0, 1, nullptr}, // #6 |
1827 | {"HWXDL" , 1, 0, 0, nullptr}, // #7 |
1828 | }; |
1829 | |
1830 | static const llvm::MCSchedModel SIDPGFX950FullSpeedModel = { |
1831 | 1, // IssueWidth |
1832 | 1, // MicroOpBufferSize |
1833 | MCSchedModel::DefaultLoopMicroOpBufferSize, |
1834 | MCSchedModel::DefaultLoadLatency, |
1835 | MCSchedModel::DefaultHighLatency, |
1836 | 20, // MispredictPenalty |
1837 | true, // PostRAScheduler |
1838 | true, // CompleteModel |
1839 | false, // EnableIntervals |
1840 | 9, // Processor ID |
1841 | SIDPGFX950FullSpeedModelProcResources, |
1842 | SIDPGFX950FullSpeedModelSchedClasses, |
1843 | 8, |
1844 | 63, |
1845 | DBGVAL_OR_NULLPTR(&AMDGPUSchedClassNames), // SchedClassNames |
1846 | nullptr, // No Itinerary |
1847 | nullptr // No extra processor descriptor |
1848 | }; |
1849 | |
1850 | #undef DBGFIELD |
1851 | |
1852 | #undef DBGVAL_OR_NULLPTR |
1853 | |
1854 | // Sorted (by key) array of values for CPU subtype. |
1855 | extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[] = { |
1856 | { "bonaire" , { { { 0x0ULL, 0x100000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1857 | { "carrizo" , { { { 0x0ULL, 0x100000000004000ULL, 0x8000000000000000ULL, 0x40200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1858 | { "fiji" , { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1859 | { "generic" , { { { 0x0ULL, 0x200008000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel }, |
1860 | { "generic-hsa" , { { { 0x0ULL, 0x200008008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel }, |
1861 | { "gfx10-1-generic" , { { { 0x100000820000000ULL, 0xd08400100400000ULL, 0x81a10080004b8004ULL, 0xc4000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1862 | { "gfx10-3-generic" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000008000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1863 | { "gfx1010" , { { { 0x100000820000000ULL, 0xd08400100400000ULL, 0x81a10000004b8004ULL, 0xc4000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1864 | { "gfx1011" , { { { 0x113980820000000ULL, 0xd08400100400000ULL, 0x81a10000004b8004ULL, 0xc4000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1865 | { "gfx1012" , { { { 0x113980820000000ULL, 0xd08400100400000ULL, 0x81a10000004b8004ULL, 0xc4000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1866 | { "gfx1013" , { { { 0x100000820000000ULL, 0xd08400900400000ULL, 0x81a10000004b8004ULL, 0xc4000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1867 | { "gfx1030" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1868 | { "gfx1031" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1869 | { "gfx1032" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1870 | { "gfx1033" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1871 | { "gfx1034" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1872 | { "gfx1035" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1873 | { "gfx1036" , { { { 0x13980820000000ULL, 0x100001d00000000ULL, 0x1000000000010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX10SpeedModel }, |
1874 | { "gfx11-generic" , { { { 0x5e800800600200ULL, 0x2102002000010000ULL, 0x100000c083010402ULL, 0x81800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1875 | { "gfx1100" , { { { 0x5e800800600201ULL, 0x2102002000010000ULL, 0x1000001083010402ULL, 0x81800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1876 | { "gfx1101" , { { { 0x5e800800600201ULL, 0x2102002000010000ULL, 0x1000001083010402ULL, 0x81000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1877 | { "gfx1102" , { { { 0x5e800800600200ULL, 0x2102002000010000ULL, 0x1000001083010402ULL, 0x81800ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1878 | { "gfx1103" , { { { 0x5e800800600200ULL, 0x2102002000010000ULL, 0x1000001083010402ULL, 0x81000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1879 | { "gfx1150" , { { { 0x5e808800600200ULL, 0x102002000010000ULL, 0x1000014023010400ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1880 | { "gfx1151" , { { { 0x5e808800600201ULL, 0x102002000010000ULL, 0x1000014023010400ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1881 | { "gfx1152" , { { { 0x5e808800600200ULL, 0x102002000010000ULL, 0x1000014023010400ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1882 | { "gfx1153" , { { { 0x5e808800600200ULL, 0x102002000010000ULL, 0x1000014003010400ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX11SpeedModel }, |
1883 | { "gfx12-generic" , { { { 0x7e008811e15601ULL, 0x102808000010208ULL, 0x840018403010410ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel }, |
1884 | { "gfx1200" , { { { 0x7e008811e15601ULL, 0x102808000010208ULL, 0x840010403010410ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel }, |
1885 | { "gfx1201" , { { { 0x7e008811e15601ULL, 0x102808000010208ULL, 0x840010403010410ULL, 0x80000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX12SpeedModel }, |
1886 | { "gfx1250" , { { { 0x6008d49f95e00ULL, 0x1340908001030200ULL, 0x4c40010505802420ULL, 0x2880002ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &GFX1250SpeedModel }, |
1887 | { "gfx600" , { { { 0x0ULL, 0x100000000004000ULL, 0x2000000000000000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel }, |
1888 | { "gfx601" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1889 | { "gfx602" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1890 | { "gfx700" , { { { 0x0ULL, 0x100000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1891 | { "gfx701" , { { { 0x0ULL, 0x100000000004000ULL, 0x200000000000000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel }, |
1892 | { "gfx702" , { { { 0x0ULL, 0x80000000004000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1893 | { "gfx703" , { { { 0x0ULL, 0x80000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1894 | { "gfx704" , { { { 0x0ULL, 0x100000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1895 | { "gfx705" , { { { 0x0ULL, 0x80000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1896 | { "gfx801" , { { { 0x0ULL, 0x100000000004000ULL, 0x8000000000000000ULL, 0x40200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1897 | { "gfx802" , { { { 0x0ULL, 0x100000000000000ULL, 0x800000000000ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1898 | { "gfx803" , { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1899 | { "gfx805" , { { { 0x0ULL, 0x100000000000000ULL, 0x800000000000ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1900 | { "gfx810" , { { { 0x0ULL, 0x85000000000000ULL, 0x8000000000000000ULL, 0x200000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1901 | { "gfx9-4-generic" , { { { 0x13f81821f912a0ULL, 0x5140060041830000ULL, 0x4000008011800400ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel }, |
1902 | { "gfx9-generic" , { { { 0x100000000000020ULL, 0x103000048000008ULL, 0x8000000004ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1903 | { "gfx900" , { { { 0x100000000000020ULL, 0x103000048000008ULL, 0xcULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1904 | { "gfx902" , { { { 0x100000000000020ULL, 0x103000048000008ULL, 0xcULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1905 | { "gfx904" , { { { 0x100000000000020ULL, 0x103000048800008ULL, 0x4ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1906 | { "gfx906" , { { { 0x112180800000020ULL, 0x103000048800008ULL, 0x4000000000000004ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1907 | { "gfx908" , { { { 0x113f80800202020ULL, 0xc103000048800008ULL, 0x4000000010000004ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1908 | { "gfx909" , { { { 0x100000000000020ULL, 0x103000048000008ULL, 0xcULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1909 | { "gfx90a" , { { { 0x13f81820781020ULL, 0x4142020041820000ULL, 0x4000000011800004ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPFullSpeedModel }, |
1910 | { "gfx90c" , { { { 0x100000000000020ULL, 0x103000048000008ULL, 0xcULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1911 | { "gfx942" , { { { 0x13f81a21f912a0ULL, 0x5140060041830a00ULL, 0x4000000011800400ULL, 0x28000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX942FullSpeedModel }, |
1912 | { "gfx950" , { { { 0xd3f8186df952c0ULL, 0x51400e0041830f80ULL, 0x4000000111800400ULL, 0x20000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIDPGFX950FullSpeedModel }, |
1913 | { "hainan" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1914 | { "hawaii" , { { { 0x0ULL, 0x100000000004000ULL, 0x200000000000000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel }, |
1915 | { "iceland" , { { { 0x0ULL, 0x100000000000000ULL, 0x800000000000ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1916 | { "kabini" , { { { 0x0ULL, 0x80000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1917 | { "kaveri" , { { { 0x0ULL, 0x100000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1918 | { "mullins" , { { { 0x0ULL, 0x80000000000000ULL, 0x200000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1919 | { "oland" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1920 | { "pitcairn" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1921 | { "polaris10" , { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1922 | { "polaris11" , { { { 0x0ULL, 0x100000000000000ULL, 0x0ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1923 | { "stoney" , { { { 0x0ULL, 0x85000000000000ULL, 0x8000000000000000ULL, 0x200000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1924 | { "tahiti" , { { { 0x0ULL, 0x100000000004000ULL, 0x2000000000000000ULL, 0x40000000ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIFullSpeedModel }, |
1925 | { "tonga" , { { { 0x0ULL, 0x100000000000000ULL, 0x800000000000ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1926 | { "tongapro" , { { { 0x0ULL, 0x100000000000000ULL, 0x800000000000ULL, 0x200200ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1927 | { "verde" , { { { 0x0ULL, 0x100000000000000ULL, 0x2000000000000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &SIQuarterSpeedModel }, |
1928 | }; |
1929 | |
1930 | // Sorted array of names of CPU subtypes, including aliases. |
1931 | extern const llvm::StringRef AMDGPUNames[] = { |
1932 | "bonaire" , |
1933 | "carrizo" , |
1934 | "fiji" , |
1935 | "generic" , |
1936 | "generic-hsa" , |
1937 | "gfx10-1-generic" , |
1938 | "gfx10-3-generic" , |
1939 | "gfx1010" , |
1940 | "gfx1011" , |
1941 | "gfx1012" , |
1942 | "gfx1013" , |
1943 | "gfx1030" , |
1944 | "gfx1031" , |
1945 | "gfx1032" , |
1946 | "gfx1033" , |
1947 | "gfx1034" , |
1948 | "gfx1035" , |
1949 | "gfx1036" , |
1950 | "gfx11-generic" , |
1951 | "gfx1100" , |
1952 | "gfx1101" , |
1953 | "gfx1102" , |
1954 | "gfx1103" , |
1955 | "gfx1150" , |
1956 | "gfx1151" , |
1957 | "gfx1152" , |
1958 | "gfx1153" , |
1959 | "gfx12-generic" , |
1960 | "gfx1200" , |
1961 | "gfx1201" , |
1962 | "gfx1250" , |
1963 | "gfx600" , |
1964 | "gfx601" , |
1965 | "gfx602" , |
1966 | "gfx700" , |
1967 | "gfx701" , |
1968 | "gfx702" , |
1969 | "gfx703" , |
1970 | "gfx704" , |
1971 | "gfx705" , |
1972 | "gfx801" , |
1973 | "gfx802" , |
1974 | "gfx803" , |
1975 | "gfx805" , |
1976 | "gfx810" , |
1977 | "gfx9-4-generic" , |
1978 | "gfx9-generic" , |
1979 | "gfx900" , |
1980 | "gfx902" , |
1981 | "gfx904" , |
1982 | "gfx906" , |
1983 | "gfx908" , |
1984 | "gfx909" , |
1985 | "gfx90a" , |
1986 | "gfx90c" , |
1987 | "gfx942" , |
1988 | "gfx950" , |
1989 | "hainan" , |
1990 | "hawaii" , |
1991 | "iceland" , |
1992 | "kabini" , |
1993 | "kaveri" , |
1994 | "mullins" , |
1995 | "oland" , |
1996 | "pitcairn" , |
1997 | "polaris10" , |
1998 | "polaris11" , |
1999 | "stoney" , |
2000 | "tahiti" , |
2001 | "tonga" , |
2002 | "tongapro" , |
2003 | "verde" }; |
2004 | |
2005 | namespace AMDGPU_MC { |
2006 | unsigned resolveVariantSchedClassImpl(unsigned SchedClass, |
2007 | const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) { |
2008 | switch (SchedClass) { |
2009 | case 33: // COPY |
2010 | if (CPUID == 1) { // SIQuarterSpeedModel |
2011 | return 57; // WriteSALU |
2012 | } |
2013 | if (CPUID == 2) { // GFX10SpeedModel |
2014 | return 57; // WriteSALU |
2015 | } |
2016 | if (CPUID == 3) { // GFX11SpeedModel |
2017 | return 57; // WriteSALU |
2018 | } |
2019 | if (CPUID == 4) { // GFX12SpeedModel |
2020 | return 57; // WriteSALU |
2021 | } |
2022 | if (CPUID == 5) { // GFX1250SpeedModel |
2023 | return 57; // WriteSALU |
2024 | } |
2025 | if (CPUID == 6) { // SIFullSpeedModel |
2026 | return 57; // WriteSALU |
2027 | } |
2028 | if (CPUID == 7) { // SIDPGFX942FullSpeedModel |
2029 | return 57; // WriteSALU |
2030 | } |
2031 | if (CPUID == 8) { // SIDPFullSpeedModel |
2032 | return 57; // WriteSALU |
2033 | } |
2034 | if (CPUID == 9) { // SIDPGFX950FullSpeedModel |
2035 | return 57; // WriteSALU |
2036 | } |
2037 | break; |
2038 | case 34: // V_ACCVGPR_WRITE_B32_e64 |
2039 | if (CPUID == 1) { // SIQuarterSpeedModel |
2040 | return 59; // Write64Bit_ReadDefault |
2041 | } |
2042 | break; |
2043 | case 37: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi |
2044 | if (CPUID == 9) { // SIDPGFX950FullSpeedModel |
2045 | return 61; // Write8PassMAI_MIMFMARead |
2046 | } |
2047 | break; |
2048 | case 52: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd |
2049 | if (CPUID == 9) { // SIDPGFX950FullSpeedModel |
2050 | return 62; // Write4PassMAI_MIMFMARead |
2051 | } |
2052 | break; |
2053 | case 53: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd |
2054 | if (CPUID == 9) { // SIDPGFX950FullSpeedModel |
2055 | return 62; // Write4PassMAI_MIMFMARead |
2056 | } |
2057 | break; |
2058 | case 54: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd |
2059 | if (CPUID == 9) { // SIDPGFX950FullSpeedModel |
2060 | return 61; // Write8PassMAI_MIMFMARead |
2061 | } |
2062 | break; |
2063 | }; |
2064 | // Don't know how to resolve this scheduling class. |
2065 | return 0; |
2066 | } |
2067 | } // end namespace AMDGPU_MC |
2068 | |
2069 | struct AMDGPUGenMCSubtargetInfo : public MCSubtargetInfo { |
2070 | AMDGPUGenMCSubtargetInfo(const Triple &TT, |
2071 | StringRef CPU, StringRef TuneCPU, StringRef FS, |
2072 | ArrayRef<StringRef> PN, |
2073 | ArrayRef<SubtargetFeatureKV> PF, |
2074 | ArrayRef<SubtargetSubTypeKV> PD, |
2075 | const MCWriteProcResEntry *WPR, |
2076 | const MCWriteLatencyEntry *WL, |
2077 | const MCReadAdvanceEntry *RA, const InstrStage *IS, |
2078 | const unsigned *OC, const unsigned *FP) : |
2079 | MCSubtargetInfo(TT, CPU, TuneCPU, FS, PN, PF, PD, |
2080 | WPR, WL, RA, IS, OC, FP) { } |
2081 | |
2082 | unsigned resolveVariantSchedClass(unsigned SchedClass, |
2083 | const MCInst *MI, const MCInstrInfo *MCII, |
2084 | unsigned CPUID) const override { |
2085 | return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID); |
2086 | } |
2087 | }; |
2088 | |
2089 | static inline MCSubtargetInfo *createAMDGPUMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) { |
2090 | return new AMDGPUGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AMDGPUNames, AMDGPUFeatureKV, AMDGPUSubTypeKV, |
2091 | AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable, |
2092 | nullptr, nullptr, nullptr); |
2093 | } |
2094 | |
2095 | } // end namespace llvm |
2096 | |
2097 | #endif // GET_SUBTARGETINFO_MC_DESC |
2098 | |
2099 | |
2100 | #ifdef GET_SUBTARGETINFO_TARGET_DESC |
2101 | #undef GET_SUBTARGETINFO_TARGET_DESC |
2102 | |
2103 | #include "llvm/ADT/BitmaskEnum.h" |
2104 | #include "llvm/Support/Debug.h" |
2105 | #include "llvm/Support/raw_ostream.h" |
2106 | |
2107 | // ParseSubtargetFeatures - Parses features string setting specified |
2108 | // subtarget options. |
2109 | void llvm::AMDGPUSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) { |
2110 | LLVM_DEBUG(dbgs() << "\nFeatures:" << FS); |
2111 | LLVM_DEBUG(dbgs() << "\nCPU:" << CPU); |
2112 | LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n" ); |
2113 | InitMCProcessorInfo(CPU, TuneCPU, FS); |
2114 | const FeatureBitset &Bits = getFeatureBits(); |
2115 | if (Bits[AMDGPU::Feature1_5xVGPRs]) Has1_5xVGPRs = true; |
2116 | if (Bits[AMDGPU::Feature16BitInsts]) Has16BitInsts = true; |
2117 | if (Bits[AMDGPU::FeatureA16]) HasA16 = true; |
2118 | if (Bits[AMDGPU::FeatureAddNoCarryInsts]) AddNoCarryInsts = true; |
2119 | if (Bits[AMDGPU::FeatureAddressableLocalMemorySize32768] && AddressableLocalMemorySize < 32768) AddressableLocalMemorySize = 32768; |
2120 | if (Bits[AMDGPU::FeatureAddressableLocalMemorySize65536] && AddressableLocalMemorySize < 65536) AddressableLocalMemorySize = 65536; |
2121 | if (Bits[AMDGPU::FeatureAddressableLocalMemorySize163840] && AddressableLocalMemorySize < 163840) AddressableLocalMemorySize = 163840; |
2122 | if (Bits[AMDGPU::FeatureAgentScopeFineGrainedRemoteMemoryAtomics]) HasAgentScopeFineGrainedRemoteMemoryAtomics = true; |
2123 | if (Bits[AMDGPU::FeatureApertureRegs]) HasApertureRegs = true; |
2124 | if (Bits[AMDGPU::FeatureArchitectedFlatScratch]) HasArchitectedFlatScratch = true; |
2125 | if (Bits[AMDGPU::FeatureArchitectedSGPRs]) HasArchitectedSGPRs = true; |
2126 | if (Bits[AMDGPU::FeatureAshrPkInsts]) HasAshrPkInsts = true; |
2127 | if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16Insts]) HasAtomicBufferGlobalPkAddF16Insts = true; |
2128 | if (Bits[AMDGPU::FeatureAtomicBufferGlobalPkAddF16NoRtnInsts]) HasAtomicBufferGlobalPkAddF16NoRtnInsts = true; |
2129 | if (Bits[AMDGPU::FeatureAtomicBufferPkAddBF16Inst]) HasAtomicBufferPkAddBF16Inst = true; |
2130 | if (Bits[AMDGPU::FeatureAtomicCSubNoRtnInsts]) HasAtomicCSubNoRtnInsts = true; |
2131 | if (Bits[AMDGPU::FeatureAtomicDsPkAdd16Insts]) HasAtomicDsPkAdd16Insts = true; |
2132 | if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32FlatInsts]) HasAtomicFMinFMaxF32FlatInsts = true; |
2133 | if (Bits[AMDGPU::FeatureAtomicFMinFMaxF32GlobalInsts]) HasAtomicFMinFMaxF32GlobalInsts = true; |
2134 | if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64FlatInsts]) HasAtomicFMinFMaxF64FlatInsts = true; |
2135 | if (Bits[AMDGPU::FeatureAtomicFMinFMaxF64GlobalInsts]) HasAtomicFMinFMaxF64GlobalInsts = true; |
2136 | if (Bits[AMDGPU::FeatureAtomicFaddNoRtnInsts]) HasAtomicFaddNoRtnInsts = true; |
2137 | if (Bits[AMDGPU::FeatureAtomicFaddRtnInsts]) HasAtomicFaddRtnInsts = true; |
2138 | if (Bits[AMDGPU::FeatureAtomicFlatPkAdd16Insts]) HasAtomicFlatPkAdd16Insts = true; |
2139 | if (Bits[AMDGPU::FeatureAtomicGlobalPkAddBF16Inst]) HasAtomicGlobalPkAddBF16Inst = true; |
2140 | if (Bits[AMDGPU::FeatureAutoWaitcntBeforeBarrier]) AutoWaitcntBeforeBarrier = true; |
2141 | if (Bits[AMDGPU::FeatureBF8ConversionScaleInsts]) HasBF8ConversionScaleInsts = true; |
2142 | if (Bits[AMDGPU::FeatureBF16ConversionInsts]) HasBF16ConversionInsts = true; |
2143 | if (Bits[AMDGPU::FeatureBVHDualAndBVH8Insts]) HasBVHDualAndBVH8Insts = true; |
2144 | if (Bits[AMDGPU::FeatureBackOffBarrier]) BackOffBarrier = true; |
2145 | if (Bits[AMDGPU::FeatureBitOp3Insts]) HasBitOp3Insts = true; |
2146 | if (Bits[AMDGPU::FeatureCIInsts]) CIInsts = true; |
2147 | if (Bits[AMDGPU::FeatureCuMode]) EnableCuMode = true; |
2148 | if (Bits[AMDGPU::FeatureCvtFP8VOP1Bug]) HasCvtFP8Vop1Bug = true; |
2149 | if (Bits[AMDGPU::FeatureCvtPkF16F32Inst]) HasCvtPkF16F32Inst = true; |
2150 | if (Bits[AMDGPU::FeatureDLInsts]) HasDLInsts = true; |
2151 | if (Bits[AMDGPU::FeatureDPALU_DPP]) HasDPALU_DPP = true; |
2152 | if (Bits[AMDGPU::FeatureDPP]) HasDPP = true; |
2153 | if (Bits[AMDGPU::FeatureDPP8]) HasDPP8 = true; |
2154 | if (Bits[AMDGPU::FeatureDPPSrc1SGPR]) HasDPPSrc1SGPR = true; |
2155 | if (Bits[AMDGPU::FeatureDefaultComponentBroadcast]) HasDefaultComponentBroadcast = true; |
2156 | if (Bits[AMDGPU::FeatureDefaultComponentZero]) HasDefaultComponentZero = true; |
2157 | if (Bits[AMDGPU::FeatureDisable]) FeatureDisable = true; |
2158 | if (Bits[AMDGPU::FeatureDot1Insts]) HasDot1Insts = true; |
2159 | if (Bits[AMDGPU::FeatureDot2Insts]) HasDot2Insts = true; |
2160 | if (Bits[AMDGPU::FeatureDot3Insts]) HasDot3Insts = true; |
2161 | if (Bits[AMDGPU::FeatureDot4Insts]) HasDot4Insts = true; |
2162 | if (Bits[AMDGPU::FeatureDot5Insts]) HasDot5Insts = true; |
2163 | if (Bits[AMDGPU::FeatureDot6Insts]) HasDot6Insts = true; |
2164 | if (Bits[AMDGPU::FeatureDot7Insts]) HasDot7Insts = true; |
2165 | if (Bits[AMDGPU::FeatureDot8Insts]) HasDot8Insts = true; |
2166 | if (Bits[AMDGPU::FeatureDot9Insts]) HasDot9Insts = true; |
2167 | if (Bits[AMDGPU::FeatureDot10Insts]) HasDot10Insts = true; |
2168 | if (Bits[AMDGPU::FeatureDot11Insts]) HasDot11Insts = true; |
2169 | if (Bits[AMDGPU::FeatureDot12Insts]) HasDot12Insts = true; |
2170 | if (Bits[AMDGPU::FeatureDot13Insts]) HasDot13Insts = true; |
2171 | if (Bits[AMDGPU::FeatureDsSrc2Insts]) HasDsSrc2Insts = true; |
2172 | if (Bits[AMDGPU::FeatureDumpCode]) DumpCode = true; |
2173 | if (Bits[AMDGPU::FeatureDumpCodeLower]) DumpCode = true; |
2174 | if (Bits[AMDGPU::FeatureDynamicVGPR]) DynamicVGPR = true; |
2175 | if (Bits[AMDGPU::FeatureDynamicVGPRBlockSize32]) DynamicVGPRBlockSize32 = true; |
2176 | if (Bits[AMDGPU::FeatureEnableDS128]) EnableDS128 = true; |
2177 | if (Bits[AMDGPU::FeatureEnableFlatScratch]) EnableFlatScratch = true; |
2178 | if (Bits[AMDGPU::FeatureEnableLoadStoreOpt]) EnableLoadStoreOpt = true; |
2179 | if (Bits[AMDGPU::FeatureEnablePRTStrictNull]) EnablePRTStrictNull = true; |
2180 | if (Bits[AMDGPU::FeatureEnableSIScheduler]) EnableSIScheduler = true; |
2181 | if (Bits[AMDGPU::FeatureEnableUnsafeDSOffsetFolding]) EnableUnsafeDSOffsetFolding = true; |
2182 | if (Bits[AMDGPU::FeatureExtendedImageInsts]) HasExtendedImageInsts = true; |
2183 | if (Bits[AMDGPU::FeatureF16BF16ToFP6BF6ConversionScaleInsts]) HasF16BF16ToFP6BF6ConversionScaleInsts = true; |
2184 | if (Bits[AMDGPU::FeatureF32ToF16BF16ConversionSRInsts]) HasF32ToF16BF16ConversionSRInsts = true; |
2185 | if (Bits[AMDGPU::FeatureFMA]) FMA = true; |
2186 | if (Bits[AMDGPU::FeatureFP4ConversionScaleInsts]) HasFP4ConversionScaleInsts = true; |
2187 | if (Bits[AMDGPU::FeatureFP6BF6ConversionScaleInsts]) HasFP6BF6ConversionScaleInsts = true; |
2188 | if (Bits[AMDGPU::FeatureFP8ConversionInsts]) HasFP8ConversionInsts = true; |
2189 | if (Bits[AMDGPU::FeatureFP8ConversionScaleInsts]) HasFP8ConversionScaleInsts = true; |
2190 | if (Bits[AMDGPU::FeatureFP8Insts]) HasFP8Insts = true; |
2191 | if (Bits[AMDGPU::FeatureFP64]) FP64 = true; |
2192 | if (Bits[AMDGPU::FeatureFastDenormalF32]) FastDenormalF32 = true; |
2193 | if (Bits[AMDGPU::FeatureFastFMAF32]) FastFMAF32 = true; |
2194 | if (Bits[AMDGPU::FeatureFlatAddressSpace]) FlatAddressSpace = true; |
2195 | if (Bits[AMDGPU::FeatureFlatAtomicFaddF32Inst]) HasFlatAtomicFaddF32Inst = true; |
2196 | if (Bits[AMDGPU::FeatureFlatBufferGlobalAtomicFaddF64Inst]) HasFlatBufferGlobalAtomicFaddF64Inst = true; |
2197 | if (Bits[AMDGPU::FeatureFlatForGlobal]) FlatForGlobal = true; |
2198 | if (Bits[AMDGPU::FeatureFlatGlobalInsts]) FlatGlobalInsts = true; |
2199 | if (Bits[AMDGPU::FeatureFlatInstOffsets]) FlatInstOffsets = true; |
2200 | if (Bits[AMDGPU::FeatureFlatScratchInsts]) FlatScratchInsts = true; |
2201 | if (Bits[AMDGPU::FeatureFlatSegmentOffsetBug]) HasFlatSegmentOffsetBug = true; |
2202 | if (Bits[AMDGPU::FeatureFmaMixInsts]) HasFmaMixInsts = true; |
2203 | if (Bits[AMDGPU::FeatureFmacF64Inst]) HasFmacF64Inst = true; |
2204 | if (Bits[AMDGPU::FeatureG16]) HasG16 = true; |
2205 | if (Bits[AMDGPU::FeatureGCN3Encoding]) GCN3Encoding = true; |
2206 | if (Bits[AMDGPU::FeatureGDS]) HasGDS = true; |
2207 | if (Bits[AMDGPU::FeatureGFX7GFX8GFX9Insts]) GFX7GFX8GFX9Insts = true; |
2208 | if (Bits[AMDGPU::FeatureGFX8Insts]) GFX8Insts = true; |
2209 | if (Bits[AMDGPU::FeatureGFX9] && Gen < GCNSubtarget::GFX9) Gen = GCNSubtarget::GFX9; |
2210 | if (Bits[AMDGPU::FeatureGFX9Insts]) GFX9Insts = true; |
2211 | if (Bits[AMDGPU::FeatureGFX10] && Gen < GCNSubtarget::GFX10) Gen = GCNSubtarget::GFX10; |
2212 | if (Bits[AMDGPU::FeatureGFX10Insts]) GFX10Insts = true; |
2213 | if (Bits[AMDGPU::FeatureGFX10_3Insts]) GFX10_3Insts = true; |
2214 | if (Bits[AMDGPU::FeatureGFX10_AEncoding]) GFX10_AEncoding = true; |
2215 | if (Bits[AMDGPU::FeatureGFX10_BEncoding]) GFX10_BEncoding = true; |
2216 | if (Bits[AMDGPU::FeatureGFX11] && Gen < GCNSubtarget::GFX11) Gen = GCNSubtarget::GFX11; |
2217 | if (Bits[AMDGPU::FeatureGFX11Insts]) GFX11Insts = true; |
2218 | if (Bits[AMDGPU::FeatureGFX12] && Gen < GCNSubtarget::GFX12) Gen = GCNSubtarget::GFX12; |
2219 | if (Bits[AMDGPU::FeatureGFX12Insts]) GFX12Insts = true; |
2220 | if (Bits[AMDGPU::FeatureGFX90AInsts]) GFX90AInsts = true; |
2221 | if (Bits[AMDGPU::FeatureGFX940Insts]) GFX940Insts = true; |
2222 | if (Bits[AMDGPU::FeatureGFX950Insts]) GFX950Insts = true; |
2223 | if (Bits[AMDGPU::FeatureGFX1250Insts]) GFX1250Insts = true; |
2224 | if (Bits[AMDGPU::FeatureGWS]) HasGWS = true; |
2225 | if (Bits[AMDGPU::FeatureGetWaveIdInst]) HasGetWaveIdInst = true; |
2226 | if (Bits[AMDGPU::FeatureHasRestrictedSOffset]) HasRestrictedSOffset = true; |
2227 | if (Bits[AMDGPU::FeatureImageGather4D16Bug]) HasImageGather4D16Bug = true; |
2228 | if (Bits[AMDGPU::FeatureImageInsts]) HasImageInsts = true; |
2229 | if (Bits[AMDGPU::FeatureImageStoreD16Bug]) HasImageStoreD16Bug = true; |
2230 | if (Bits[AMDGPU::FeatureInstFwdPrefetchBug]) HasInstFwdPrefetchBug = true; |
2231 | if (Bits[AMDGPU::FeatureIntClamp]) HasIntClamp = true; |
2232 | if (Bits[AMDGPU::FeatureInv2PiInlineImm]) HasInv2PiInlineImm = true; |
2233 | if (Bits[AMDGPU::FeatureKernargPreload]) KernargPreload = true; |
2234 | if (Bits[AMDGPU::FeatureLDSBankCount16] && LDSBankCount < 16) LDSBankCount = 16; |
2235 | if (Bits[AMDGPU::FeatureLDSBankCount32] && LDSBankCount < 32) LDSBankCount = 32; |
2236 | if (Bits[AMDGPU::FeatureLdsBarrierArriveAtomic]) HasLdsBarrierArriveAtomic = true; |
2237 | if (Bits[AMDGPU::FeatureLdsBranchVmemWARHazard]) HasLdsBranchVmemWARHazard = true; |
2238 | if (Bits[AMDGPU::FeatureLdsMisalignedBug]) LDSMisalignedBug = true; |
2239 | if (Bits[AMDGPU::FeatureLshlAddU64Inst]) HasLshlAddU64Inst = true; |
2240 | if (Bits[AMDGPU::FeatureMADIntraFwdBug]) HasMADIntraFwdBug = true; |
2241 | if (Bits[AMDGPU::FeatureMAIInsts]) HasMAIInsts = true; |
2242 | if (Bits[AMDGPU::FeatureMFMAInlineLiteralBug]) HasMFMAInlineLiteralBug = true; |
2243 | if (Bits[AMDGPU::FeatureMIMG_R128]) MIMG_R128 = true; |
2244 | if (Bits[AMDGPU::FeatureMSAALoadDstSelBug]) HasMSAALoadDstSelBug = true; |
2245 | if (Bits[AMDGPU::FeatureMadMacF32Insts]) HasMadMacF32Insts = true; |
2246 | if (Bits[AMDGPU::FeatureMadMixInsts]) HasMadMixInsts = true; |
2247 | if (Bits[AMDGPU::FeatureMaxHardClauseLength32] && MaxHardClauseLength < 32) MaxHardClauseLength = 32; |
2248 | if (Bits[AMDGPU::FeatureMaxHardClauseLength63] && MaxHardClauseLength < 63) MaxHardClauseLength = 63; |
2249 | if (Bits[AMDGPU::FeatureMaxPrivateElementSize4] && MaxPrivateElementSize < 4) MaxPrivateElementSize = 4; |
2250 | if (Bits[AMDGPU::FeatureMaxPrivateElementSize8] && MaxPrivateElementSize < 8) MaxPrivateElementSize = 8; |
2251 | if (Bits[AMDGPU::FeatureMaxPrivateElementSize16] && MaxPrivateElementSize < 16) MaxPrivateElementSize = 16; |
2252 | if (Bits[AMDGPU::FeatureMemToLDSLoad]) HasVMemToLDSLoad = true; |
2253 | if (Bits[AMDGPU::FeatureMemoryAtomicFAddF32DenormalSupport]) HasMemoryAtomicFaddF32DenormalSupport = true; |
2254 | if (Bits[AMDGPU::FeatureMinimum3Maximum3F16]) HasMinimum3Maximum3F16 = true; |
2255 | if (Bits[AMDGPU::FeatureMinimum3Maximum3F32]) HasMinimum3Maximum3F32 = true; |
2256 | if (Bits[AMDGPU::FeatureMinimum3Maximum3PKF16]) HasMinimum3Maximum3PKF16 = true; |
2257 | if (Bits[AMDGPU::FeatureMovrel]) HasMovrel = true; |
2258 | if (Bits[AMDGPU::FeatureNSAClauseBug]) HasNSAClauseBug = true; |
2259 | if (Bits[AMDGPU::FeatureNSAEncoding]) HasNSAEncoding = true; |
2260 | if (Bits[AMDGPU::FeatureNSAtoVMEMBug]) HasNSAtoVMEMBug = true; |
2261 | if (Bits[AMDGPU::FeatureNegativeScratchOffsetBug]) NegativeScratchOffsetBug = true; |
2262 | if (Bits[AMDGPU::FeatureNegativeUnalignedScratchOffsetBug]) NegativeUnalignedScratchOffsetBug = true; |
2263 | if (Bits[AMDGPU::FeatureNoDataDepHazard]) HasNoDataDepHazard = true; |
2264 | if (Bits[AMDGPU::FeatureNoSdstCMPX]) HasNoSdstCMPX = true; |
2265 | if (Bits[AMDGPU::FeatureOffset3fBug]) HasOffset3fBug = true; |
2266 | if (Bits[AMDGPU::FeaturePackedFP32Ops]) HasPackedFP32Ops = true; |
2267 | if (Bits[AMDGPU::FeaturePackedTID]) HasPackedTID = true; |
2268 | if (Bits[AMDGPU::FeaturePartialNSAEncoding]) HasPartialNSAEncoding = true; |
2269 | if (Bits[AMDGPU::FeaturePermlane16Swap]) HasPermlane16Swap = true; |
2270 | if (Bits[AMDGPU::FeaturePermlane32Swap]) HasPermlane32Swap = true; |
2271 | if (Bits[AMDGPU::FeaturePkFmacF16Inst]) HasPkFmacF16Inst = true; |
2272 | if (Bits[AMDGPU::FeaturePointSampleAccel]) HasPointSampleAccel = true; |
2273 | if (Bits[AMDGPU::FeaturePreciseMemory]) EnablePreciseMemory = true; |
2274 | if (Bits[AMDGPU::FeaturePrivEnabledTrap2NopBug]) HasPrivEnabledTrap2NopBug = true; |
2275 | if (Bits[AMDGPU::FeaturePrngInst]) HasPrngInst = true; |
2276 | if (Bits[AMDGPU::FeaturePromoteAlloca]) EnablePromoteAlloca = true; |
2277 | if (Bits[AMDGPU::FeaturePseudoScalarTrans]) HasPseudoScalarTrans = true; |
2278 | if (Bits[AMDGPU::FeatureR128A16]) HasR128A16 = true; |
2279 | if (Bits[AMDGPU::FeatureRealTrue16Insts]) EnableRealTrue16Insts = true; |
2280 | if (Bits[AMDGPU::FeatureRelaxedBufferOOBMode]) RelaxedBufferOOBMode = true; |
2281 | if (Bits[AMDGPU::FeatureRequiredExportPriority]) HasRequiredExportPriority = true; |
2282 | if (Bits[AMDGPU::FeatureRequiresCOV6]) RequiresCOV6 = true; |
2283 | if (Bits[AMDGPU::FeatureSALUFloatInsts]) HasSALUFloatInsts = true; |
2284 | if (Bits[AMDGPU::FeatureSDWA]) HasSDWA = true; |
2285 | if (Bits[AMDGPU::FeatureSDWAMac]) HasSDWAMac = true; |
2286 | if (Bits[AMDGPU::FeatureSDWAOmod]) HasSDWAOmod = true; |
2287 | if (Bits[AMDGPU::FeatureSDWAOutModsVOPC]) HasSDWAOutModsVOPC = true; |
2288 | if (Bits[AMDGPU::FeatureSDWAScalar]) HasSDWAScalar = true; |
2289 | if (Bits[AMDGPU::FeatureSDWASdst]) HasSDWASdst = true; |
2290 | if (Bits[AMDGPU::FeatureSGPRInitBug]) SGPRInitBug = true; |
2291 | if (Bits[AMDGPU::FeatureSMEMtoVectorWriteHazard]) HasSMEMtoVectorWriteHazard = true; |
2292 | if (Bits[AMDGPU::FeatureSMemRealTime]) HasSMemRealTime = true; |
2293 | if (Bits[AMDGPU::FeatureSMemTimeInst]) HasSMemTimeInst = true; |
2294 | if (Bits[AMDGPU::FeatureSRAMECC]) EnableSRAMECC = true; |
2295 | if (Bits[AMDGPU::FeatureSafeSmemPrefetch]) HasSafeSmemPrefetch = true; |
2296 | if (Bits[AMDGPU::FeatureScalarAtomics]) HasScalarAtomics = true; |
2297 | if (Bits[AMDGPU::FeatureScalarDwordx3Loads]) HasScalarDwordx3Loads = true; |
2298 | if (Bits[AMDGPU::FeatureScalarFlatScratchInsts]) ScalarFlatScratchInsts = true; |
2299 | if (Bits[AMDGPU::FeatureScalarStores]) HasScalarStores = true; |
2300 | if (Bits[AMDGPU::FeatureSeaIslands] && Gen < GCNSubtarget::SEA_ISLANDS) Gen = GCNSubtarget::SEA_ISLANDS; |
2301 | if (Bits[AMDGPU::FeatureSetPrioIncWgInst]) HasSetPrioIncWgInst = true; |
2302 | if (Bits[AMDGPU::FeatureShaderCyclesHiLoRegisters]) HasShaderCyclesHiLoRegisters = true; |
2303 | if (Bits[AMDGPU::FeatureShaderCyclesRegister]) HasShaderCyclesRegister = true; |
2304 | if (Bits[AMDGPU::FeatureSouthernIslands] && Gen < GCNSubtarget::SOUTHERN_ISLANDS) Gen = GCNSubtarget::SOUTHERN_ISLANDS; |
2305 | if (Bits[AMDGPU::FeatureSupportsSRAMECC]) SupportsSRAMECC = true; |
2306 | if (Bits[AMDGPU::FeatureSupportsXNACK]) SupportsXNACK = true; |
2307 | if (Bits[AMDGPU::FeatureTgSplit]) EnableTgSplit = true; |
2308 | if (Bits[AMDGPU::FeatureTransposeLoadF4F6Insts]) HasTransposeLoadF4F6Insts = true; |
2309 | if (Bits[AMDGPU::FeatureTrapHandler]) TrapHandler = true; |
2310 | if (Bits[AMDGPU::FeatureTrigReducedRange]) HasTrigReducedRange = true; |
2311 | if (Bits[AMDGPU::FeatureTrue16BitInsts]) HasTrue16BitInsts = true; |
2312 | if (Bits[AMDGPU::FeatureUnalignedAccessMode]) UnalignedAccessMode = true; |
2313 | if (Bits[AMDGPU::FeatureUnalignedBufferAccess]) UnalignedBufferAccess = true; |
2314 | if (Bits[AMDGPU::FeatureUnalignedDSAccess]) UnalignedDSAccess = true; |
2315 | if (Bits[AMDGPU::FeatureUnalignedScratchAccess]) UnalignedScratchAccess = true; |
2316 | if (Bits[AMDGPU::FeatureUnpackedD16VMem]) HasUnpackedD16VMem = true; |
2317 | if (Bits[AMDGPU::FeatureUseBlockVGPROpsForCSR]) UseBlockVGPROpsForCSR = true; |
2318 | if (Bits[AMDGPU::FeatureUserSGPRInit16Bug]) UserSGPRInit16Bug = true; |
2319 | if (Bits[AMDGPU::FeatureVALUTransUseHazard]) HasVALUTransUseHazard = true; |
2320 | if (Bits[AMDGPU::FeatureVGPRIndexMode]) HasVGPRIndexMode = true; |
2321 | if (Bits[AMDGPU::FeatureVMEMtoScalarWriteHazard]) HasVMEMtoScalarWriteHazard = true; |
2322 | if (Bits[AMDGPU::FeatureVOP3Literal]) HasVOP3Literal = true; |
2323 | if (Bits[AMDGPU::FeatureVOP3P]) HasVOP3PInsts = true; |
2324 | if (Bits[AMDGPU::FeatureVOPD]) HasVOPDInsts = true; |
2325 | if (Bits[AMDGPU::FeatureVcmpxExecWARHazard]) HasVcmpxExecWARHazard = true; |
2326 | if (Bits[AMDGPU::FeatureVcmpxPermlaneHazard]) HasVcmpxPermlaneHazard = true; |
2327 | if (Bits[AMDGPU::FeatureVmemWriteVgprInOrder]) HasVmemWriteVgprInOrder = true; |
2328 | if (Bits[AMDGPU::FeatureVolcanicIslands] && Gen < GCNSubtarget::VOLCANIC_ISLANDS) Gen = GCNSubtarget::VOLCANIC_ISLANDS; |
2329 | if (Bits[AMDGPU::FeatureVscnt]) HasVscnt = true; |
2330 | if (Bits[AMDGPU::FeatureWaitXcnt]) HasWaitXcnt = true; |
2331 | if (Bits[AMDGPU::FeatureWavefrontSize16] && WavefrontSizeLog2 < 4) WavefrontSizeLog2 = 4; |
2332 | if (Bits[AMDGPU::FeatureWavefrontSize32] && WavefrontSizeLog2 < 5) WavefrontSizeLog2 = 5; |
2333 | if (Bits[AMDGPU::FeatureWavefrontSize64] && WavefrontSizeLog2 < 6) WavefrontSizeLog2 = 6; |
2334 | if (Bits[AMDGPU::FeatureXF32Insts]) HasXF32Insts = true; |
2335 | if (Bits[AMDGPU::FeatureXNACK]) EnableXNACK = true; |
2336 | if (Bits[AMDGPU::FullRate64Ops]) FullRate64Ops = true; |
2337 | if (Bits[AMDGPU::HalfRate64Ops]) HalfRate64Ops = true; |
2338 | } |
2339 | #endif // GET_SUBTARGETINFO_TARGET_DESC |
2340 | |
2341 | |
2342 | #ifdef GET_SUBTARGETINFO_HEADER |
2343 | #undef GET_SUBTARGETINFO_HEADER |
2344 | |
2345 | namespace llvm { |
2346 | class DFAPacketizer; |
2347 | namespace AMDGPU_MC { |
2348 | unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID); |
2349 | } // end namespace AMDGPU_MC |
2350 | |
2351 | struct AMDGPUGenSubtargetInfo : public TargetSubtargetInfo { |
2352 | explicit AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS); |
2353 | public: |
2354 | unsigned resolveSchedClass(unsigned SchedClass, const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const override; |
2355 | unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const override; |
2356 | DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const; |
2357 | }; |
2358 | } // end namespace llvm |
2359 | |
2360 | #endif // GET_SUBTARGETINFO_HEADER |
2361 | |
2362 | |
2363 | #ifdef GET_SUBTARGETINFO_CTOR |
2364 | #undef GET_SUBTARGETINFO_CTOR |
2365 | |
2366 | #include "llvm/CodeGen/TargetSchedule.h" |
2367 | |
2368 | namespace llvm { |
2369 | extern const llvm::StringRef AMDGPUNames[]; |
2370 | extern const llvm::SubtargetFeatureKV AMDGPUFeatureKV[]; |
2371 | extern const llvm::SubtargetSubTypeKV AMDGPUSubTypeKV[]; |
2372 | extern const llvm::MCWriteProcResEntry AMDGPUWriteProcResTable[]; |
2373 | extern const llvm::MCWriteLatencyEntry AMDGPUWriteLatencyTable[]; |
2374 | extern const llvm::MCReadAdvanceEntry AMDGPUReadAdvanceTable[]; |
2375 | AMDGPUGenSubtargetInfo::AMDGPUGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) |
2376 | : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AMDGPUNames, 72), ArrayRef(AMDGPUFeatureKV, 222), ArrayRef(AMDGPUSubTypeKV, 72), |
2377 | AMDGPUWriteProcResTable, AMDGPUWriteLatencyTable, AMDGPUReadAdvanceTable, |
2378 | nullptr, nullptr, nullptr) {} |
2379 | |
2380 | unsigned AMDGPUGenSubtargetInfo |
2381 | ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const { |
2382 | |
2383 | const SIInstrInfo *TII = |
2384 | static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo()); |
2385 | (void)TII; |
2386 | |
2387 | switch (SchedClass) { |
2388 | case 33: // COPY |
2389 | if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel |
2390 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2391 | return 55; // Write32Bit |
2392 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2393 | return 56; // Write64Bit |
2394 | return 57; // WriteSALU |
2395 | } |
2396 | if (SchedModel->getProcessorID() == 2) { // GFX10SpeedModel |
2397 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2398 | return 55; // Write32Bit |
2399 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2400 | return 56; // Write64Bit |
2401 | return 57; // WriteSALU |
2402 | } |
2403 | if (SchedModel->getProcessorID() == 3) { // GFX11SpeedModel |
2404 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2405 | return 55; // Write32Bit |
2406 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2407 | return 56; // Write64Bit |
2408 | return 57; // WriteSALU |
2409 | } |
2410 | if (SchedModel->getProcessorID() == 4) { // GFX12SpeedModel |
2411 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2412 | return 55; // Write32Bit |
2413 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2414 | return 56; // Write64Bit |
2415 | return 57; // WriteSALU |
2416 | } |
2417 | if (SchedModel->getProcessorID() == 5) { // GFX1250SpeedModel |
2418 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2419 | return 55; // Write32Bit |
2420 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2421 | return 56; // Write64Bit |
2422 | return 57; // WriteSALU |
2423 | } |
2424 | if (SchedModel->getProcessorID() == 6) { // SIFullSpeedModel |
2425 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2426 | return 55; // Write32Bit |
2427 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2428 | return 56; // Write64Bit |
2429 | return 57; // WriteSALU |
2430 | } |
2431 | if (SchedModel->getProcessorID() == 7) { // SIDPGFX942FullSpeedModel |
2432 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2433 | return 55; // Write32Bit |
2434 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2435 | return 56; // Write64Bit |
2436 | return 57; // WriteSALU |
2437 | } |
2438 | if (SchedModel->getProcessorID() == 8) { // SIDPFullSpeedModel |
2439 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2440 | return 55; // Write32Bit |
2441 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2442 | return 56; // Write64Bit |
2443 | return 57; // WriteSALU |
2444 | } |
2445 | if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel |
2446 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32) |
2447 | return 55; // Write32Bit |
2448 | if (TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32) |
2449 | return 56; // Write64Bit |
2450 | return 57; // WriteSALU |
2451 | } |
2452 | break; |
2453 | case 34: // V_ACCVGPR_WRITE_B32_e64 |
2454 | if (SchedModel->getProcessorID() == 1) { // SIQuarterSpeedModel |
2455 | if (TII->hasVGPRUses(*MI)) |
2456 | return 58; // Write64Bit_MIVGPRRead |
2457 | return 59; // Write64Bit_ReadDefault |
2458 | } |
2459 | break; |
2460 | case 37: // V_MFMA_F32_32X32X16_BF16_e64_V_MFMA_F32_32X32X16_BF16_mac_e64_V_MFMA_F32_32X32X16_BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_e64_V_MFMA_F32_32X32X16_BF8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_e64_V_MFMA_F32_32X32X16_BF8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_BF8_FP8_vgprcd_e64_V_MFMA_F32_32X32X16_F16_e64_V_MFMA_F32_32X32X16_F16_mac_e64_V_MFMA_F32_32X32X16_F16_mac_vgprcd_e64_V_MFMA_F32_32X32X16_F16_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_e64_V_MFMA_F32_32X32X16_FP8_BF8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_BF8_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_e64_V_MFMA_F32_32X32X16_FP8_FP8_mac_vgprcd_e64_V_MFMA_F32_32X32X16_FP8_FP8_vgprcd_e64_V_MFMA_F32_32X32X1F32_e64_V_MFMA_F32_32X32X1F32_mac_e64_V_MFMA_F32_32X32X1F32_mac_vgprcd_e64_V_MFMA_F32_32X32X1F32_vgprcd_e64_V_MFMA_F32_32X32X2BF16_e64_V_MFMA_F32_32X32X2BF16_mac_e64_V_MFMA_F32_32X32X2BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X2BF16_vgprcd_e64_V_MFMA_F32_32X32X2F32_e64_V_MFMA_F32_32X32X2F32_mac_e64_V_MFMA_F32_32X32X2F32_mac_vgprcd_e64_V_MFMA_F32_32X32X2F32_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_e64_V_MFMA_F32_32X32X4BF16_1K_mac_e64_V_MFMA_F32_32X32X4BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X4BF16_e64_V_MFMA_F32_32X32X4BF16_mac_e64_V_MFMA_F32_32X32X4BF16_mac_vgprcd_e64_V_MFMA_F32_32X32X4BF16_vgprcd_e64_V_MFMA_F32_32X32X4F16_e64_V_MFMA_F32_32X32X4F16_mac_e64_V_MFMA_F32_32X32X4F16_mac_vgprcd_e64_V_MFMA_F32_32X32X4F16_vgprcd_e64_V_MFMA_F32_32X32X4XF32_e64_V_MFMA_F32_32X32X4XF32_mac_e64_V_MFMA_F32_32X32X4XF32_mac_vgprcd_e64_V_MFMA_F32_32X32X4XF32_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_e64_V_MFMA_F32_32X32X8BF16_1K_mac_e64_V_MFMA_F32_32X32X8BF16_1K_mac_vgprcd_e64_V_MFMA_F32_32X32X8BF16_1K_vgprcd_e64_V_MFMA_F32_32X32X8F16_e64_V_MFMA_F32_32X32X8F16_mac_e64_V_MFMA_F32_32X32X8F16_mac_vgprcd_e64_V_MFMA_F32_32X32X8F16_vgprcd_e64_V_MFMA_I32_32X32X16I8_e64_V_MFMA_I32_32X32X16I8_mac_e64_V_MFMA_I32_32X32X16I8_mac_vgprcd_e64_V_MFMA_I32_32X32X16I8_vgprcd_e64_V_MFMA_I32_32X32X32_I8_e64_V_MFMA_I32_32X32X32_I8_mac_e64_V_MFMA_I32_32X32X32_I8_mac_vgprcd_e64_V_MFMA_I32_32X32X32_I8_vgprcd_e64_V_MFMA_I32_32X32X4I8_e64_V_MFMA_I32_32X32X4I8_mac_e64_V_MFMA_I32_32X32X4I8_mac_vgprcd_e64_V_MFMA_I32_32X32X4I8_vgprcd_e64_V_MFMA_I32_32X32X8I8_e64_V_MFMA_I32_32X32X8I8_mac_e64_V_MFMA_I32_32X32X8I8_mac_vgprcd_e64_V_MFMA_I32_32X32X8I8_vgprcd_e64_V_MFMA_F32_32X32X16_BF16_gfx940_acd_V_MFMA_F32_32X32X16_BF16_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_BF8_FP8_gfx940_vcd_V_MFMA_F32_32X32X16_F16_gfx940_acd_V_MFMA_F32_32X32X16_F16_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_BF8_gfx940_vcd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_acd_V_MFMA_F32_32X32X16_FP8_FP8_gfx940_vcd_V_MFMA_F32_32X32X1F32_gfx90a_acd_V_MFMA_F32_32X32X1F32_gfx90a_vcd_V_MFMA_F32_32X32X1F32_gfx940_acd_V_MFMA_F32_32X32X1F32_gfx940_vcd_V_MFMA_F32_32X32X1F32_vi_V_MFMA_F32_32X32X2BF16_gfx90a_acd_V_MFMA_F32_32X32X2BF16_gfx90a_vcd_V_MFMA_F32_32X32X2BF16_vi_V_MFMA_F32_32X32X2F32_gfx90a_acd_V_MFMA_F32_32X32X2F32_gfx90a_vcd_V_MFMA_F32_32X32X2F32_gfx940_acd_V_MFMA_F32_32X32X2F32_gfx940_vcd_V_MFMA_F32_32X32X2F32_vi_V_MFMA_F32_32X32X4BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X4BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_1K_gfx940_acd_V_MFMA_F32_32X32X4BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X4BF16_gfx90a_acd_V_MFMA_F32_32X32X4BF16_gfx90a_vcd_V_MFMA_F32_32X32X4BF16_vi_V_MFMA_F32_32X32X4F16_gfx90a_acd_V_MFMA_F32_32X32X4F16_gfx90a_vcd_V_MFMA_F32_32X32X4F16_gfx940_acd_V_MFMA_F32_32X32X4F16_gfx940_vcd_V_MFMA_F32_32X32X4F16_vi_V_MFMA_F32_32X32X4XF32_gfx940_acd_V_MFMA_F32_32X32X4XF32_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_acd_V_MFMA_F32_32X32X8BF16_1K_gfx90a_vcd_V_MFMA_F32_32X32X8BF16_1K_gfx940_acd_V_MFMA_F32_32X32X8BF16_1K_gfx940_vcd_V_MFMA_F32_32X32X8F16_gfx90a_acd_V_MFMA_F32_32X32X8F16_gfx90a_vcd_V_MFMA_F32_32X32X8F16_gfx940_acd_V_MFMA_F32_32X32X8F16_gfx940_vcd_V_MFMA_F32_32X32X8F16_vi_V_MFMA_I32_32X32X16I8_gfx940_acd_V_MFMA_I32_32X32X16I8_gfx940_vcd_V_MFMA_I32_32X32X32_I8_gfx940_acd_V_MFMA_I32_32X32X32_I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_gfx90a_acd_V_MFMA_I32_32X32X4I8_gfx90a_vcd_V_MFMA_I32_32X32X4I8_gfx940_acd_V_MFMA_I32_32X32X4I8_gfx940_vcd_V_MFMA_I32_32X32X4I8_vi_V_MFMA_I32_32X32X8I8_gfx90a_acd_V_MFMA_I32_32X32X8I8_gfx90a_vcd_V_MFMA_I32_32X32X8I8_vi |
2461 | if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel |
2462 | if ( |
2463 | TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 || |
2464 | TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 |
2465 | ) |
2466 | return 60; // Write16PassMAI_MIMFMARead |
2467 | return 61; // Write8PassMAI_MIMFMARead |
2468 | } |
2469 | break; |
2470 | case 52: // V_MFMA_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd |
2471 | if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel |
2472 | if ( |
2473 | TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 || |
2474 | TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 |
2475 | ) |
2476 | return 61; // Write8PassMAI_MIMFMARead |
2477 | return 62; // Write4PassMAI_MIMFMARead |
2478 | } |
2479 | break; |
2480 | case 53: // V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_gfx940_vcd |
2481 | if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel |
2482 | if ( |
2483 | TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 || |
2484 | TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 |
2485 | ) |
2486 | return 61; // Write8PassMAI_MIMFMARead |
2487 | return 62; // Write4PassMAI_MIMFMARead |
2488 | } |
2489 | break; |
2490 | case 54: // V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_mac_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_vgprcd_e64_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f4_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f6_f8_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f4_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f6_gfx940_vcd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_acd_V_MFMA_SCALE_F32_32X32X64_F8F6F4_f8_f8_gfx940_vcd |
2491 | if (SchedModel->getProcessorID() == 9) { // SIDPGFX950FullSpeedModel |
2492 | if ( |
2493 | TII->getNamedOperand(*MI, AMDGPU::OpName::cbsz)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 || |
2494 | TII->getNamedOperand(*MI, AMDGPU::OpName::blgp)->getImm() <= AMDGPU::MFMAScaleFormats::FP8_E5M2 |
2495 | ) |
2496 | return 60; // Write16PassMAI_MIMFMARead |
2497 | return 61; // Write8PassMAI_MIMFMARead |
2498 | } |
2499 | break; |
2500 | }; |
2501 | report_fatal_error("Expected a variant SchedClass" ); |
2502 | } // AMDGPUGenSubtargetInfo::resolveSchedClass |
2503 | |
2504 | unsigned AMDGPUGenSubtargetInfo |
2505 | ::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const { |
2506 | return AMDGPU_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID); |
2507 | } // AMDGPUGenSubtargetInfo::resolveVariantSchedClass |
2508 | |
2509 | } // end namespace llvm |
2510 | |
2511 | #endif // GET_SUBTARGETINFO_CTOR |
2512 | |
2513 | |
2514 | #ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS |
2515 | #undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS |
2516 | |
2517 | #endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS |
2518 | |
2519 | |
2520 | #ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS |
2521 | #undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS |
2522 | |
2523 | #endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS |
2524 | |
2525 | |