1//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// Provides AMDGPU specific target descriptions.
11//
12//===----------------------------------------------------------------------===//
13//
14
15#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
16#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
17
18#include <cstdint>
19#include <memory>
20
21namespace llvm {
22class Target;
23class MCAsmBackend;
24class MCCodeEmitter;
25class MCContext;
26class MCInstrInfo;
27class MCObjectTargetWriter;
28class MCRegisterInfo;
29class MCSubtargetInfo;
30class MCTargetOptions;
31
32enum AMDGPUDwarfFlavour : unsigned { Wave64 = 0, Wave32 = 1 };
33
34MCRegisterInfo *createGCNMCRegisterInfo(AMDGPUDwarfFlavour DwarfFlavour);
35
36MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII,
37 MCContext &Ctx);
38
39MCAsmBackend *createAMDGPUAsmBackend(const Target &T,
40 const MCSubtargetInfo &STI,
41 const MCRegisterInfo &MRI,
42 const MCTargetOptions &Options);
43
44std::unique_ptr<MCObjectTargetWriter>
45createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
46 bool HasRelocationAddend);
47} // namespace llvm
48
49#define GET_REGINFO_ENUM
50#include "AMDGPUGenRegisterInfo.inc"
51
52#define GET_INSTRINFO_ENUM
53#define GET_INSTRINFO_MC_HELPER_DECLS
54#include "AMDGPUGenInstrInfo.inc"
55
56#define GET_SUBTARGETINFO_ENUM
57#include "AMDGPUGenSubtargetInfo.inc"
58
59#endif
60