1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11static bool CC_Lanai32(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, CCState &State);
14static bool CC_Lanai32_Fast(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, CCState &State);
17static bool RetCC_Lanai32(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, CCState &State);
20
21
22static bool CC_Lanai32(unsigned ValNo, MVT ValVT,
23 MVT LocVT, CCValAssign::LocInfo LocInfo,
24 ISD::ArgFlagsTy ArgFlags, CCState &State) {
25
26 if (LocVT == MVT::i8 ||
27 LocVT == MVT::i16) {
28 LocVT = MVT::i32;
29 if (ArgFlags.isSExt())
30 LocInfo = CCValAssign::SExt;
31 else if (ArgFlags.isZExt())
32 LocInfo = CCValAssign::ZExt;
33 else
34 LocInfo = CCValAssign::AExt;
35 }
36
37 if (!State.isVarArg()) {
38 if (ArgFlags.isInReg()) {
39 if (LocVT == MVT::i32) {
40 static const MCPhysReg RegList1[] = {
41 Lanai::R6, Lanai::R7, Lanai::R18, Lanai::R19
42 };
43 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
44 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
45 return false;
46 }
47 }
48 }
49 }
50
51 int64_t Offset2 = State.AllocateStack(Size: 4, Alignment: Align(4));
52 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
53 return false;
54
55 return true; // CC didn't match.
56}
57
58
59static bool CC_Lanai32_Fast(unsigned ValNo, MVT ValVT,
60 MVT LocVT, CCValAssign::LocInfo LocInfo,
61 ISD::ArgFlagsTy ArgFlags, CCState &State) {
62
63 if (LocVT == MVT::i8 ||
64 LocVT == MVT::i16) {
65 LocVT = MVT::i32;
66 if (ArgFlags.isSExt())
67 LocInfo = CCValAssign::SExt;
68 else if (ArgFlags.isZExt())
69 LocInfo = CCValAssign::ZExt;
70 else
71 LocInfo = CCValAssign::AExt;
72 }
73
74 if (!State.isVarArg()) {
75 if (LocVT == MVT::i32) {
76 static const MCPhysReg RegList1[] = {
77 Lanai::R6, Lanai::R7, Lanai::R18, Lanai::R19
78 };
79 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
80 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
81 return false;
82 }
83 }
84 }
85
86 int64_t Offset2 = State.AllocateStack(Size: 4, Alignment: Align(4));
87 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
88 return false;
89
90 return true; // CC didn't match.
91}
92
93
94static bool RetCC_Lanai32(unsigned ValNo, MVT ValVT,
95 MVT LocVT, CCValAssign::LocInfo LocInfo,
96 ISD::ArgFlagsTy ArgFlags, CCState &State) {
97
98 if (LocVT == MVT::i32) {
99 static const MCPhysReg RegList1[] = {
100 Lanai::RV, Lanai::R9
101 };
102 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
103 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
104 return false;
105 }
106 }
107
108 return true; // CC didn't match.
109}
110
111#else
112
113const MCRegister CC_Lanai32_ArgRegs[] = { Lanai::R18, Lanai::R19, Lanai::R6, Lanai::R7 };
114const MCRegister CC_Lanai32_Fast_ArgRegs[] = { Lanai::R18, Lanai::R19, Lanai::R6, Lanai::R7 };
115const MCRegister RetCC_Lanai32_ArgRegs[] = { Lanai::R9, Lanai::RV };
116
117#endif // CC_REGISTER_LIST
118