1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Machine Code Emitter *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9uint64_t MSP430MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10 SmallVectorImpl<MCFixup> &Fixups,
11 const MCSubtargetInfo &STI) const {
12 static const uint64_t InstBits[] = {
13 UINT64_C(0),
14 UINT64_C(0),
15 UINT64_C(0),
16 UINT64_C(0),
17 UINT64_C(0),
18 UINT64_C(0),
19 UINT64_C(0),
20 UINT64_C(0),
21 UINT64_C(0),
22 UINT64_C(0),
23 UINT64_C(0),
24 UINT64_C(0),
25 UINT64_C(0),
26 UINT64_C(0),
27 UINT64_C(0),
28 UINT64_C(0),
29 UINT64_C(0),
30 UINT64_C(0),
31 UINT64_C(0),
32 UINT64_C(0),
33 UINT64_C(0),
34 UINT64_C(0),
35 UINT64_C(0),
36 UINT64_C(0),
37 UINT64_C(0),
38 UINT64_C(0),
39 UINT64_C(0),
40 UINT64_C(0),
41 UINT64_C(0),
42 UINT64_C(0),
43 UINT64_C(0),
44 UINT64_C(0),
45 UINT64_C(0),
46 UINT64_C(0),
47 UINT64_C(0),
48 UINT64_C(0),
49 UINT64_C(0),
50 UINT64_C(0),
51 UINT64_C(0),
52 UINT64_C(0),
53 UINT64_C(0),
54 UINT64_C(0),
55 UINT64_C(0),
56 UINT64_C(0),
57 UINT64_C(0),
58 UINT64_C(0),
59 UINT64_C(0),
60 UINT64_C(0),
61 UINT64_C(0),
62 UINT64_C(0),
63 UINT64_C(0),
64 UINT64_C(0),
65 UINT64_C(0),
66 UINT64_C(0),
67 UINT64_C(0),
68 UINT64_C(0),
69 UINT64_C(0),
70 UINT64_C(0),
71 UINT64_C(0),
72 UINT64_C(0),
73 UINT64_C(0),
74 UINT64_C(0),
75 UINT64_C(0),
76 UINT64_C(0),
77 UINT64_C(0),
78 UINT64_C(0),
79 UINT64_C(0),
80 UINT64_C(0),
81 UINT64_C(0),
82 UINT64_C(0),
83 UINT64_C(0),
84 UINT64_C(0),
85 UINT64_C(0),
86 UINT64_C(0),
87 UINT64_C(0),
88 UINT64_C(0),
89 UINT64_C(0),
90 UINT64_C(0),
91 UINT64_C(0),
92 UINT64_C(0),
93 UINT64_C(0),
94 UINT64_C(0),
95 UINT64_C(0),
96 UINT64_C(0),
97 UINT64_C(0),
98 UINT64_C(0),
99 UINT64_C(0),
100 UINT64_C(0),
101 UINT64_C(0),
102 UINT64_C(0),
103 UINT64_C(0),
104 UINT64_C(0),
105 UINT64_C(0),
106 UINT64_C(0),
107 UINT64_C(0),
108 UINT64_C(0),
109 UINT64_C(0),
110 UINT64_C(0),
111 UINT64_C(0),
112 UINT64_C(0),
113 UINT64_C(0),
114 UINT64_C(0),
115 UINT64_C(0),
116 UINT64_C(0),
117 UINT64_C(0),
118 UINT64_C(0),
119 UINT64_C(0),
120 UINT64_C(0),
121 UINT64_C(0),
122 UINT64_C(0),
123 UINT64_C(0),
124 UINT64_C(0),
125 UINT64_C(0),
126 UINT64_C(0),
127 UINT64_C(0),
128 UINT64_C(0),
129 UINT64_C(0),
130 UINT64_C(0),
131 UINT64_C(0),
132 UINT64_C(0),
133 UINT64_C(0),
134 UINT64_C(0),
135 UINT64_C(0),
136 UINT64_C(0),
137 UINT64_C(0),
138 UINT64_C(0),
139 UINT64_C(0),
140 UINT64_C(0),
141 UINT64_C(0),
142 UINT64_C(0),
143 UINT64_C(0),
144 UINT64_C(0),
145 UINT64_C(0),
146 UINT64_C(0),
147 UINT64_C(0),
148 UINT64_C(0),
149 UINT64_C(0),
150 UINT64_C(0),
151 UINT64_C(0),
152 UINT64_C(0),
153 UINT64_C(0),
154 UINT64_C(0),
155 UINT64_C(0),
156 UINT64_C(0),
157 UINT64_C(0),
158 UINT64_C(0),
159 UINT64_C(0),
160 UINT64_C(0),
161 UINT64_C(0),
162 UINT64_C(0),
163 UINT64_C(0),
164 UINT64_C(0),
165 UINT64_C(0),
166 UINT64_C(0),
167 UINT64_C(0),
168 UINT64_C(0),
169 UINT64_C(0),
170 UINT64_C(0),
171 UINT64_C(0),
172 UINT64_C(0),
173 UINT64_C(0),
174 UINT64_C(0),
175 UINT64_C(0),
176 UINT64_C(0),
177 UINT64_C(0),
178 UINT64_C(0),
179 UINT64_C(0),
180 UINT64_C(0),
181 UINT64_C(0),
182 UINT64_C(0),
183 UINT64_C(0),
184 UINT64_C(0),
185 UINT64_C(0),
186 UINT64_C(0),
187 UINT64_C(0),
188 UINT64_C(0),
189 UINT64_C(0),
190 UINT64_C(0),
191 UINT64_C(0),
192 UINT64_C(0),
193 UINT64_C(0),
194 UINT64_C(0),
195 UINT64_C(0),
196 UINT64_C(0),
197 UINT64_C(0),
198 UINT64_C(0),
199 UINT64_C(0),
200 UINT64_C(0),
201 UINT64_C(0),
202 UINT64_C(0),
203 UINT64_C(0),
204 UINT64_C(0),
205 UINT64_C(0),
206 UINT64_C(0),
207 UINT64_C(0),
208 UINT64_C(0),
209 UINT64_C(0),
210 UINT64_C(0),
211 UINT64_C(0),
212 UINT64_C(0),
213 UINT64_C(0),
214 UINT64_C(0),
215 UINT64_C(0),
216 UINT64_C(0),
217 UINT64_C(0),
218 UINT64_C(0),
219 UINT64_C(0),
220 UINT64_C(0),
221 UINT64_C(0),
222 UINT64_C(0),
223 UINT64_C(0),
224 UINT64_C(0),
225 UINT64_C(0),
226 UINT64_C(0),
227 UINT64_C(0),
228 UINT64_C(0),
229 UINT64_C(0),
230 UINT64_C(0),
231 UINT64_C(0),
232 UINT64_C(0),
233 UINT64_C(0),
234 UINT64_C(0),
235 UINT64_C(0),
236 UINT64_C(0),
237 UINT64_C(0),
238 UINT64_C(0),
239 UINT64_C(0),
240 UINT64_C(0),
241 UINT64_C(0),
242 UINT64_C(0),
243 UINT64_C(0),
244 UINT64_C(0),
245 UINT64_C(0),
246 UINT64_C(0),
247 UINT64_C(0),
248 UINT64_C(0),
249 UINT64_C(0),
250 UINT64_C(0),
251 UINT64_C(0),
252 UINT64_C(0),
253 UINT64_C(0),
254 UINT64_C(0),
255 UINT64_C(0),
256 UINT64_C(0),
257 UINT64_C(0),
258 UINT64_C(0),
259 UINT64_C(0),
260 UINT64_C(0),
261 UINT64_C(0),
262 UINT64_C(0),
263 UINT64_C(0),
264 UINT64_C(0),
265 UINT64_C(0),
266 UINT64_C(0),
267 UINT64_C(0),
268 UINT64_C(0),
269 UINT64_C(0),
270 UINT64_C(0),
271 UINT64_C(0),
272 UINT64_C(0),
273 UINT64_C(0),
274 UINT64_C(0),
275 UINT64_C(0),
276 UINT64_C(0),
277 UINT64_C(0),
278 UINT64_C(0),
279 UINT64_C(0),
280 UINT64_C(0),
281 UINT64_C(0),
282 UINT64_C(0),
283 UINT64_C(0),
284 UINT64_C(0),
285 UINT64_C(0),
286 UINT64_C(0),
287 UINT64_C(0),
288 UINT64_C(0),
289 UINT64_C(0),
290 UINT64_C(0),
291 UINT64_C(0),
292 UINT64_C(0),
293 UINT64_C(0),
294 UINT64_C(0),
295 UINT64_C(0),
296 UINT64_C(0),
297 UINT64_C(0),
298 UINT64_C(0),
299 UINT64_C(0),
300 UINT64_C(0),
301 UINT64_C(0),
302 UINT64_C(0),
303 UINT64_C(0),
304 UINT64_C(0),
305 UINT64_C(0),
306 UINT64_C(0),
307 UINT64_C(0),
308 UINT64_C(0),
309 UINT64_C(0),
310 UINT64_C(0),
311 UINT64_C(0),
312 UINT64_C(0),
313 UINT64_C(0),
314 UINT64_C(0),
315 UINT64_C(0),
316 UINT64_C(0),
317 UINT64_C(0),
318 UINT64_C(0),
319 UINT64_C(0),
320 UINT64_C(0),
321 UINT64_C(0),
322 UINT64_C(0),
323 UINT64_C(20608), // ADD16mc
324 UINT64_C(20656), // ADD16mi
325 UINT64_C(20624), // ADD16mm
326 UINT64_C(20640), // ADD16mn
327 UINT64_C(20656), // ADD16mp
328 UINT64_C(20608), // ADD16mr
329 UINT64_C(20480), // ADD16rc
330 UINT64_C(20528), // ADD16ri
331 UINT64_C(20496), // ADD16rm
332 UINT64_C(20512), // ADD16rn
333 UINT64_C(20528), // ADD16rp
334 UINT64_C(20480), // ADD16rr
335 UINT64_C(20672), // ADD8mc
336 UINT64_C(20720), // ADD8mi
337 UINT64_C(20688), // ADD8mm
338 UINT64_C(20704), // ADD8mn
339 UINT64_C(20720), // ADD8mp
340 UINT64_C(20672), // ADD8mr
341 UINT64_C(20544), // ADD8rc
342 UINT64_C(20592), // ADD8ri
343 UINT64_C(20560), // ADD8rm
344 UINT64_C(20576), // ADD8rn
345 UINT64_C(20592), // ADD8rp
346 UINT64_C(20544), // ADD8rr
347 UINT64_C(24704), // ADDC16mc
348 UINT64_C(24752), // ADDC16mi
349 UINT64_C(24720), // ADDC16mm
350 UINT64_C(24736), // ADDC16mn
351 UINT64_C(24752), // ADDC16mp
352 UINT64_C(24704), // ADDC16mr
353 UINT64_C(24576), // ADDC16rc
354 UINT64_C(24624), // ADDC16ri
355 UINT64_C(24592), // ADDC16rm
356 UINT64_C(24608), // ADDC16rn
357 UINT64_C(24624), // ADDC16rp
358 UINT64_C(24576), // ADDC16rr
359 UINT64_C(24768), // ADDC8mc
360 UINT64_C(24816), // ADDC8mi
361 UINT64_C(24784), // ADDC8mm
362 UINT64_C(24800), // ADDC8mn
363 UINT64_C(24816), // ADDC8mp
364 UINT64_C(24768), // ADDC8mr
365 UINT64_C(24640), // ADDC8rc
366 UINT64_C(24688), // ADDC8ri
367 UINT64_C(24656), // ADDC8rm
368 UINT64_C(24672), // ADDC8rn
369 UINT64_C(24688), // ADDC8rp
370 UINT64_C(24640), // ADDC8rr
371 UINT64_C(0), // ADDframe
372 UINT64_C(0), // ADJCALLSTACKDOWN
373 UINT64_C(0), // ADJCALLSTACKUP
374 UINT64_C(61568), // AND16mc
375 UINT64_C(61616), // AND16mi
376 UINT64_C(61584), // AND16mm
377 UINT64_C(61600), // AND16mn
378 UINT64_C(61616), // AND16mp
379 UINT64_C(61568), // AND16mr
380 UINT64_C(61440), // AND16rc
381 UINT64_C(61488), // AND16ri
382 UINT64_C(61456), // AND16rm
383 UINT64_C(61472), // AND16rn
384 UINT64_C(61488), // AND16rp
385 UINT64_C(61440), // AND16rr
386 UINT64_C(61632), // AND8mc
387 UINT64_C(61680), // AND8mi
388 UINT64_C(61648), // AND8mm
389 UINT64_C(61664), // AND8mn
390 UINT64_C(61680), // AND8mp
391 UINT64_C(61632), // AND8mr
392 UINT64_C(61504), // AND8rc
393 UINT64_C(61552), // AND8ri
394 UINT64_C(61520), // AND8rm
395 UINT64_C(61536), // AND8rn
396 UINT64_C(61552), // AND8rp
397 UINT64_C(61504), // AND8rr
398 UINT64_C(49280), // BIC16mc
399 UINT64_C(49328), // BIC16mi
400 UINT64_C(49296), // BIC16mm
401 UINT64_C(49312), // BIC16mn
402 UINT64_C(49328), // BIC16mp
403 UINT64_C(49280), // BIC16mr
404 UINT64_C(49152), // BIC16rc
405 UINT64_C(49200), // BIC16ri
406 UINT64_C(49168), // BIC16rm
407 UINT64_C(49184), // BIC16rn
408 UINT64_C(49200), // BIC16rp
409 UINT64_C(49152), // BIC16rr
410 UINT64_C(49344), // BIC8mc
411 UINT64_C(49392), // BIC8mi
412 UINT64_C(49360), // BIC8mm
413 UINT64_C(49376), // BIC8mn
414 UINT64_C(49392), // BIC8mp
415 UINT64_C(49344), // BIC8mr
416 UINT64_C(49216), // BIC8rc
417 UINT64_C(49264), // BIC8ri
418 UINT64_C(49232), // BIC8rm
419 UINT64_C(49248), // BIC8rn
420 UINT64_C(49264), // BIC8rp
421 UINT64_C(49216), // BIC8rr
422 UINT64_C(53376), // BIS16mc
423 UINT64_C(53424), // BIS16mi
424 UINT64_C(53392), // BIS16mm
425 UINT64_C(53408), // BIS16mn
426 UINT64_C(53424), // BIS16mp
427 UINT64_C(53376), // BIS16mr
428 UINT64_C(53248), // BIS16rc
429 UINT64_C(53296), // BIS16ri
430 UINT64_C(53264), // BIS16rm
431 UINT64_C(53280), // BIS16rn
432 UINT64_C(53296), // BIS16rp
433 UINT64_C(53248), // BIS16rr
434 UINT64_C(53440), // BIS8mc
435 UINT64_C(53488), // BIS8mi
436 UINT64_C(53456), // BIS8mm
437 UINT64_C(53472), // BIS8mn
438 UINT64_C(53488), // BIS8mp
439 UINT64_C(53440), // BIS8mr
440 UINT64_C(53312), // BIS8rc
441 UINT64_C(53360), // BIS8ri
442 UINT64_C(53328), // BIS8rm
443 UINT64_C(53344), // BIS8rn
444 UINT64_C(53360), // BIS8rp
445 UINT64_C(53312), // BIS8rr
446 UINT64_C(45184), // BIT16mc
447 UINT64_C(45232), // BIT16mi
448 UINT64_C(45200), // BIT16mm
449 UINT64_C(45216), // BIT16mn
450 UINT64_C(45232), // BIT16mp
451 UINT64_C(45184), // BIT16mr
452 UINT64_C(45056), // BIT16rc
453 UINT64_C(45104), // BIT16ri
454 UINT64_C(45072), // BIT16rm
455 UINT64_C(45088), // BIT16rn
456 UINT64_C(45104), // BIT16rp
457 UINT64_C(45056), // BIT16rr
458 UINT64_C(45248), // BIT8mc
459 UINT64_C(45296), // BIT8mi
460 UINT64_C(45264), // BIT8mm
461 UINT64_C(45280), // BIT8mn
462 UINT64_C(45296), // BIT8mp
463 UINT64_C(45248), // BIT8mr
464 UINT64_C(45120), // BIT8rc
465 UINT64_C(45168), // BIT8ri
466 UINT64_C(45136), // BIT8rm
467 UINT64_C(45152), // BIT8rn
468 UINT64_C(45168), // BIT8rp
469 UINT64_C(45120), // BIT8rr
470 UINT64_C(16432), // Bi
471 UINT64_C(16400), // Bm
472 UINT64_C(16384), // Br
473 UINT64_C(4784), // CALLi
474 UINT64_C(4752), // CALLm
475 UINT64_C(4768), // CALLn
476 UINT64_C(4784), // CALLp
477 UINT64_C(4736), // CALLr
478 UINT64_C(36992), // CMP16mc
479 UINT64_C(37040), // CMP16mi
480 UINT64_C(37008), // CMP16mm
481 UINT64_C(37024), // CMP16mn
482 UINT64_C(37040), // CMP16mp
483 UINT64_C(36992), // CMP16mr
484 UINT64_C(36864), // CMP16rc
485 UINT64_C(36912), // CMP16ri
486 UINT64_C(36880), // CMP16rm
487 UINT64_C(36896), // CMP16rn
488 UINT64_C(36912), // CMP16rp
489 UINT64_C(36864), // CMP16rr
490 UINT64_C(37056), // CMP8mc
491 UINT64_C(37104), // CMP8mi
492 UINT64_C(37072), // CMP8mm
493 UINT64_C(37088), // CMP8mn
494 UINT64_C(37104), // CMP8mp
495 UINT64_C(37056), // CMP8mr
496 UINT64_C(36928), // CMP8rc
497 UINT64_C(36976), // CMP8ri
498 UINT64_C(36944), // CMP8rm
499 UINT64_C(36960), // CMP8rn
500 UINT64_C(36976), // CMP8rp
501 UINT64_C(36928), // CMP8rr
502 UINT64_C(41088), // DADD16mc
503 UINT64_C(41136), // DADD16mi
504 UINT64_C(41104), // DADD16mm
505 UINT64_C(41120), // DADD16mn
506 UINT64_C(41136), // DADD16mp
507 UINT64_C(41088), // DADD16mr
508 UINT64_C(40960), // DADD16rc
509 UINT64_C(41008), // DADD16ri
510 UINT64_C(40976), // DADD16rm
511 UINT64_C(40992), // DADD16rn
512 UINT64_C(41008), // DADD16rp
513 UINT64_C(40960), // DADD16rr
514 UINT64_C(41152), // DADD8mc
515 UINT64_C(41200), // DADD8mi
516 UINT64_C(41168), // DADD8mm
517 UINT64_C(41184), // DADD8mn
518 UINT64_C(41200), // DADD8mp
519 UINT64_C(41152), // DADD8mr
520 UINT64_C(41024), // DADD8rc
521 UINT64_C(41072), // DADD8ri
522 UINT64_C(41040), // DADD8rm
523 UINT64_C(41056), // DADD8rn
524 UINT64_C(41072), // DADD8rp
525 UINT64_C(41024), // DADD8rr
526 UINT64_C(8192), // JCC
527 UINT64_C(15360), // JMP
528 UINT64_C(16512), // MOV16mc
529 UINT64_C(16560), // MOV16mi
530 UINT64_C(16528), // MOV16mm
531 UINT64_C(16544), // MOV16mn
532 UINT64_C(16512), // MOV16mr
533 UINT64_C(16384), // MOV16rc
534 UINT64_C(16432), // MOV16ri
535 UINT64_C(16400), // MOV16rm
536 UINT64_C(16416), // MOV16rn
537 UINT64_C(16432), // MOV16rp
538 UINT64_C(16384), // MOV16rr
539 UINT64_C(16576), // MOV8mc
540 UINT64_C(16624), // MOV8mi
541 UINT64_C(16592), // MOV8mm
542 UINT64_C(16608), // MOV8mn
543 UINT64_C(16576), // MOV8mr
544 UINT64_C(16448), // MOV8rc
545 UINT64_C(16496), // MOV8ri
546 UINT64_C(16464), // MOV8rm
547 UINT64_C(16480), // MOV8rn
548 UINT64_C(16496), // MOV8rp
549 UINT64_C(16448), // MOV8rr
550 UINT64_C(16464), // MOVZX16rm8
551 UINT64_C(16448), // MOVZX16rr8
552 UINT64_C(16688), // POP16r
553 UINT64_C(4608), // PUSH16c
554 UINT64_C(4656), // PUSH16i
555 UINT64_C(4608), // PUSH16r
556 UINT64_C(4672), // PUSH8r
557 UINT64_C(16688), // RET
558 UINT64_C(4864), // RETI
559 UINT64_C(4368), // RRA16m
560 UINT64_C(4384), // RRA16n
561 UINT64_C(4400), // RRA16p
562 UINT64_C(4352), // RRA16r
563 UINT64_C(4432), // RRA8m
564 UINT64_C(4448), // RRA8n
565 UINT64_C(4464), // RRA8p
566 UINT64_C(4416), // RRA8r
567 UINT64_C(4112), // RRC16m
568 UINT64_C(4128), // RRC16n
569 UINT64_C(4144), // RRC16p
570 UINT64_C(4096), // RRC16r
571 UINT64_C(4176), // RRC8m
572 UINT64_C(4192), // RRC8n
573 UINT64_C(4208), // RRC8p
574 UINT64_C(4160), // RRC8r
575 UINT64_C(0), // Rrcl16
576 UINT64_C(0), // Rrcl8
577 UINT64_C(4496), // SEXT16m
578 UINT64_C(4512), // SEXT16n
579 UINT64_C(4528), // SEXT16p
580 UINT64_C(4480), // SEXT16r
581 UINT64_C(32896), // SUB16mc
582 UINT64_C(32944), // SUB16mi
583 UINT64_C(32912), // SUB16mm
584 UINT64_C(32928), // SUB16mn
585 UINT64_C(32944), // SUB16mp
586 UINT64_C(32896), // SUB16mr
587 UINT64_C(32768), // SUB16rc
588 UINT64_C(32816), // SUB16ri
589 UINT64_C(32784), // SUB16rm
590 UINT64_C(32800), // SUB16rn
591 UINT64_C(32816), // SUB16rp
592 UINT64_C(32768), // SUB16rr
593 UINT64_C(32960), // SUB8mc
594 UINT64_C(33008), // SUB8mi
595 UINT64_C(32976), // SUB8mm
596 UINT64_C(32992), // SUB8mn
597 UINT64_C(33008), // SUB8mp
598 UINT64_C(32960), // SUB8mr
599 UINT64_C(32832), // SUB8rc
600 UINT64_C(32880), // SUB8ri
601 UINT64_C(32848), // SUB8rm
602 UINT64_C(32864), // SUB8rn
603 UINT64_C(32880), // SUB8rp
604 UINT64_C(32832), // SUB8rr
605 UINT64_C(28800), // SUBC16mc
606 UINT64_C(28848), // SUBC16mi
607 UINT64_C(28816), // SUBC16mm
608 UINT64_C(28832), // SUBC16mn
609 UINT64_C(28848), // SUBC16mp
610 UINT64_C(28800), // SUBC16mr
611 UINT64_C(28672), // SUBC16rc
612 UINT64_C(28720), // SUBC16ri
613 UINT64_C(28688), // SUBC16rm
614 UINT64_C(28704), // SUBC16rn
615 UINT64_C(28720), // SUBC16rp
616 UINT64_C(28672), // SUBC16rr
617 UINT64_C(28864), // SUBC8mc
618 UINT64_C(28912), // SUBC8mi
619 UINT64_C(28880), // SUBC8mm
620 UINT64_C(28896), // SUBC8mn
621 UINT64_C(28912), // SUBC8mp
622 UINT64_C(28864), // SUBC8mr
623 UINT64_C(28736), // SUBC8rc
624 UINT64_C(28784), // SUBC8ri
625 UINT64_C(28752), // SUBC8rm
626 UINT64_C(28768), // SUBC8rn
627 UINT64_C(28784), // SUBC8rp
628 UINT64_C(28736), // SUBC8rr
629 UINT64_C(4240), // SWPB16m
630 UINT64_C(4256), // SWPB16n
631 UINT64_C(4272), // SWPB16p
632 UINT64_C(4224), // SWPB16r
633 UINT64_C(0), // Select16
634 UINT64_C(0), // Select8
635 UINT64_C(0), // Shl16
636 UINT64_C(0), // Shl8
637 UINT64_C(0), // Sra16
638 UINT64_C(0), // Sra8
639 UINT64_C(0), // Srl16
640 UINT64_C(0), // Srl8
641 UINT64_C(57472), // XOR16mc
642 UINT64_C(57520), // XOR16mi
643 UINT64_C(57488), // XOR16mm
644 UINT64_C(57504), // XOR16mn
645 UINT64_C(57520), // XOR16mp
646 UINT64_C(57472), // XOR16mr
647 UINT64_C(57344), // XOR16rc
648 UINT64_C(57392), // XOR16ri
649 UINT64_C(57360), // XOR16rm
650 UINT64_C(57376), // XOR16rn
651 UINT64_C(57392), // XOR16rp
652 UINT64_C(57344), // XOR16rr
653 UINT64_C(57536), // XOR8mc
654 UINT64_C(57584), // XOR8mi
655 UINT64_C(57552), // XOR8mm
656 UINT64_C(57568), // XOR8mn
657 UINT64_C(57584), // XOR8mp
658 UINT64_C(57536), // XOR8mr
659 UINT64_C(57408), // XOR8rc
660 UINT64_C(57456), // XOR8ri
661 UINT64_C(57424), // XOR8rm
662 UINT64_C(57440), // XOR8rn
663 UINT64_C(57456), // XOR8rp
664 UINT64_C(57408), // XOR8rr
665 UINT64_C(16448), // ZEXT16r
666 UINT64_C(0)
667 };
668 const unsigned opcode = MI.getOpcode();
669 uint64_t Value = InstBits[opcode];
670 uint64_t op = 0;
671 (void)op; // suppress warning
672 switch (opcode) {
673 case MSP430::ADDframe:
674 case MSP430::ADJCALLSTACKDOWN:
675 case MSP430::ADJCALLSTACKUP:
676 case MSP430::RET:
677 case MSP430::RETI:
678 case MSP430::Rrcl8:
679 case MSP430::Rrcl16:
680 case MSP430::Select8:
681 case MSP430::Select16:
682 case MSP430::Shl8:
683 case MSP430::Shl16:
684 case MSP430::Sra8:
685 case MSP430::Sra16:
686 case MSP430::Srl8:
687 case MSP430::Srl16: {
688 break;
689 }
690 case MSP430::JCC: {
691 // op: cond
692 op = getCCOpValue(MI, Op: 1, Fixups, STI);
693 op &= UINT64_C(7);
694 op <<= 10;
695 Value |= op;
696 // op: dst
697 op = getPCRelImmOpValue(MI, Op: 0, Fixups, STI);
698 op &= UINT64_C(1023);
699 Value |= op;
700 break;
701 }
702 case MSP430::JMP: {
703 // op: dst
704 op = getPCRelImmOpValue(MI, Op: 0, Fixups, STI);
705 op &= UINT64_C(1023);
706 Value |= op;
707 break;
708 }
709 case MSP430::PUSH16c: {
710 // op: imm
711 op = getCGImmOpValue(MI, Op: 0, Fixups, STI);
712 op &= UINT64_C(63);
713 Value |= op;
714 break;
715 }
716 case MSP430::BIT8rc:
717 case MSP430::BIT16rc:
718 case MSP430::CMP8rc:
719 case MSP430::CMP16rc:
720 case MSP430::MOV8rc:
721 case MSP430::MOV16rc: {
722 // op: imm
723 op = getCGImmOpValue(MI, Op: 1, Fixups, STI);
724 Value |= (op & UINT64_C(15)) << 8;
725 Value |= (op & UINT64_C(48));
726 // op: rd
727 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
728 op &= UINT64_C(15);
729 Value |= op;
730 break;
731 }
732 case MSP430::ADD8mc:
733 case MSP430::ADD16mc:
734 case MSP430::ADDC8mc:
735 case MSP430::ADDC16mc:
736 case MSP430::AND8mc:
737 case MSP430::AND16mc:
738 case MSP430::BIC8mc:
739 case MSP430::BIC16mc:
740 case MSP430::BIS8mc:
741 case MSP430::BIS16mc:
742 case MSP430::BIT8mc:
743 case MSP430::BIT16mc:
744 case MSP430::CMP8mc:
745 case MSP430::CMP16mc:
746 case MSP430::DADD8mc:
747 case MSP430::DADD16mc:
748 case MSP430::MOV8mc:
749 case MSP430::MOV16mc:
750 case MSP430::SUB8mc:
751 case MSP430::SUB16mc:
752 case MSP430::SUBC8mc:
753 case MSP430::SUBC16mc:
754 case MSP430::XOR8mc:
755 case MSP430::XOR16mc: {
756 // op: imm
757 op = getCGImmOpValue(MI, Op: 2, Fixups, STI);
758 Value |= (op & UINT64_C(15)) << 8;
759 Value |= (op & UINT64_C(48));
760 // op: dst
761 op = getMemOpValue(MI, Op: 0, Fixups, STI);
762 Value |= (op & UINT64_C(1048560)) << 12;
763 Value |= (op & UINT64_C(15));
764 break;
765 }
766 case MSP430::ADD8rc:
767 case MSP430::ADD16rc:
768 case MSP430::ADDC8rc:
769 case MSP430::ADDC16rc:
770 case MSP430::AND8rc:
771 case MSP430::AND16rc:
772 case MSP430::BIC8rc:
773 case MSP430::BIC16rc:
774 case MSP430::BIS8rc:
775 case MSP430::BIS16rc:
776 case MSP430::DADD8rc:
777 case MSP430::DADD16rc:
778 case MSP430::SUB8rc:
779 case MSP430::SUB16rc:
780 case MSP430::SUBC8rc:
781 case MSP430::SUBC16rc:
782 case MSP430::XOR8rc:
783 case MSP430::XOR16rc: {
784 // op: imm
785 op = getCGImmOpValue(MI, Op: 2, Fixups, STI);
786 Value |= (op & UINT64_C(15)) << 8;
787 Value |= (op & UINT64_C(48));
788 // op: rd
789 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
790 op &= UINT64_C(15);
791 Value |= op;
792 break;
793 }
794 case MSP430::Bi:
795 case MSP430::CALLi:
796 case MSP430::PUSH16i: {
797 // op: imm
798 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
799 op &= UINT64_C(65535);
800 op <<= 16;
801 Value |= op;
802 break;
803 }
804 case MSP430::ADD8mi:
805 case MSP430::ADD16mi:
806 case MSP430::ADDC8mi:
807 case MSP430::ADDC16mi:
808 case MSP430::AND8mi:
809 case MSP430::AND16mi:
810 case MSP430::BIC8mi:
811 case MSP430::BIC16mi:
812 case MSP430::BIS8mi:
813 case MSP430::BIS16mi:
814 case MSP430::BIT8mi:
815 case MSP430::BIT16mi:
816 case MSP430::CMP8mi:
817 case MSP430::CMP16mi:
818 case MSP430::DADD8mi:
819 case MSP430::DADD16mi:
820 case MSP430::MOV8mi:
821 case MSP430::MOV16mi:
822 case MSP430::SUB8mi:
823 case MSP430::SUB16mi:
824 case MSP430::SUBC8mi:
825 case MSP430::SUBC16mi:
826 case MSP430::XOR8mi:
827 case MSP430::XOR16mi: {
828 // op: imm
829 op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI);
830 op &= UINT64_C(65535);
831 op <<= 16;
832 Value |= op;
833 // op: dst
834 op = getMemOpValue(MI, Op: 0, Fixups, STI);
835 Value |= (op & UINT64_C(1048560)) << 28;
836 Value |= (op & UINT64_C(15));
837 break;
838 }
839 case MSP430::POP16r: {
840 // op: rd
841 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
842 op &= UINT64_C(15);
843 Value |= op;
844 break;
845 }
846 case MSP430::BIT8ri:
847 case MSP430::BIT16ri:
848 case MSP430::CMP8ri:
849 case MSP430::CMP16ri:
850 case MSP430::MOV8ri:
851 case MSP430::MOV16ri: {
852 // op: rd
853 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
854 op &= UINT64_C(15);
855 Value |= op;
856 // op: imm
857 op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI);
858 op &= UINT64_C(65535);
859 op <<= 16;
860 Value |= op;
861 break;
862 }
863 case MSP430::ADD8ri:
864 case MSP430::ADD16ri:
865 case MSP430::ADDC8ri:
866 case MSP430::ADDC16ri:
867 case MSP430::AND8ri:
868 case MSP430::AND16ri:
869 case MSP430::BIC8ri:
870 case MSP430::BIC16ri:
871 case MSP430::BIS8ri:
872 case MSP430::BIS16ri:
873 case MSP430::DADD8ri:
874 case MSP430::DADD16ri:
875 case MSP430::SUB8ri:
876 case MSP430::SUB16ri:
877 case MSP430::SUBC8ri:
878 case MSP430::SUBC16ri:
879 case MSP430::XOR8ri:
880 case MSP430::XOR16ri: {
881 // op: rd
882 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
883 op &= UINT64_C(15);
884 Value |= op;
885 // op: imm
886 op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI);
887 op &= UINT64_C(65535);
888 op <<= 16;
889 Value |= op;
890 break;
891 }
892 case MSP430::BIT8rm:
893 case MSP430::BIT16rm:
894 case MSP430::CMP8rm:
895 case MSP430::CMP16rm:
896 case MSP430::MOV8rm:
897 case MSP430::MOV16rm:
898 case MSP430::MOVZX16rm8: {
899 // op: rd
900 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
901 op &= UINT64_C(15);
902 Value |= op;
903 // op: src
904 op = getMemOpValue(MI, Op: 1, Fixups, STI);
905 Value |= (op & UINT64_C(1048560)) << 12;
906 Value |= (op & UINT64_C(15)) << 8;
907 break;
908 }
909 case MSP430::ADD8rm:
910 case MSP430::ADD16rm:
911 case MSP430::ADDC8rm:
912 case MSP430::ADDC16rm:
913 case MSP430::AND8rm:
914 case MSP430::AND16rm:
915 case MSP430::BIC8rm:
916 case MSP430::BIC16rm:
917 case MSP430::BIS8rm:
918 case MSP430::BIS16rm:
919 case MSP430::DADD8rm:
920 case MSP430::DADD16rm:
921 case MSP430::SUB8rm:
922 case MSP430::SUB16rm:
923 case MSP430::SUBC8rm:
924 case MSP430::SUBC16rm:
925 case MSP430::XOR8rm:
926 case MSP430::XOR16rm: {
927 // op: rd
928 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
929 op &= UINT64_C(15);
930 Value |= op;
931 // op: src
932 op = getMemOpValue(MI, Op: 2, Fixups, STI);
933 Value |= (op & UINT64_C(1048560)) << 12;
934 Value |= (op & UINT64_C(15)) << 8;
935 break;
936 }
937 case MSP430::CALLn:
938 case MSP430::CALLp:
939 case MSP430::CALLr:
940 case MSP430::PUSH8r:
941 case MSP430::PUSH16r:
942 case MSP430::RRA8n:
943 case MSP430::RRA8p:
944 case MSP430::RRA16n:
945 case MSP430::RRA16p:
946 case MSP430::RRC8n:
947 case MSP430::RRC8p:
948 case MSP430::RRC16n:
949 case MSP430::RRC16p:
950 case MSP430::SEXT16n:
951 case MSP430::SEXT16p:
952 case MSP430::SWPB16n:
953 case MSP430::SWPB16p: {
954 // op: rs
955 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
956 op &= UINT64_C(15);
957 Value |= op;
958 break;
959 }
960 case MSP430::Br: {
961 // op: rs
962 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
963 op &= UINT64_C(15);
964 op <<= 8;
965 Value |= op;
966 break;
967 }
968 case MSP430::RRA8r:
969 case MSP430::RRA16r:
970 case MSP430::RRC8r:
971 case MSP430::RRC16r:
972 case MSP430::SEXT16r:
973 case MSP430::SWPB16r: {
974 // op: rs
975 op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI);
976 op &= UINT64_C(15);
977 Value |= op;
978 break;
979 }
980 case MSP430::BIT8rn:
981 case MSP430::BIT8rp:
982 case MSP430::BIT8rr:
983 case MSP430::BIT16rn:
984 case MSP430::BIT16rp:
985 case MSP430::BIT16rr:
986 case MSP430::CMP8rn:
987 case MSP430::CMP8rp:
988 case MSP430::CMP8rr:
989 case MSP430::CMP16rn:
990 case MSP430::CMP16rp:
991 case MSP430::CMP16rr:
992 case MSP430::MOV8rn:
993 case MSP430::MOV8rr:
994 case MSP430::MOV16rn:
995 case MSP430::MOV16rr:
996 case MSP430::MOVZX16rr8:
997 case MSP430::ZEXT16r: {
998 // op: rs
999 op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI);
1000 op &= UINT64_C(15);
1001 op <<= 8;
1002 Value |= op;
1003 // op: rd
1004 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
1005 op &= UINT64_C(15);
1006 Value |= op;
1007 break;
1008 }
1009 case MSP430::ADD8mn:
1010 case MSP430::ADD8mp:
1011 case MSP430::ADD8mr:
1012 case MSP430::ADD16mn:
1013 case MSP430::ADD16mp:
1014 case MSP430::ADD16mr:
1015 case MSP430::ADDC8mn:
1016 case MSP430::ADDC8mp:
1017 case MSP430::ADDC8mr:
1018 case MSP430::ADDC16mn:
1019 case MSP430::ADDC16mp:
1020 case MSP430::ADDC16mr:
1021 case MSP430::AND8mn:
1022 case MSP430::AND8mp:
1023 case MSP430::AND8mr:
1024 case MSP430::AND16mn:
1025 case MSP430::AND16mp:
1026 case MSP430::AND16mr:
1027 case MSP430::BIC8mn:
1028 case MSP430::BIC8mp:
1029 case MSP430::BIC8mr:
1030 case MSP430::BIC16mn:
1031 case MSP430::BIC16mp:
1032 case MSP430::BIC16mr:
1033 case MSP430::BIS8mn:
1034 case MSP430::BIS8mp:
1035 case MSP430::BIS8mr:
1036 case MSP430::BIS16mn:
1037 case MSP430::BIS16mp:
1038 case MSP430::BIS16mr:
1039 case MSP430::BIT8mn:
1040 case MSP430::BIT8mp:
1041 case MSP430::BIT8mr:
1042 case MSP430::BIT16mn:
1043 case MSP430::BIT16mp:
1044 case MSP430::BIT16mr:
1045 case MSP430::CMP8mn:
1046 case MSP430::CMP8mp:
1047 case MSP430::CMP8mr:
1048 case MSP430::CMP16mn:
1049 case MSP430::CMP16mp:
1050 case MSP430::CMP16mr:
1051 case MSP430::DADD8mn:
1052 case MSP430::DADD8mp:
1053 case MSP430::DADD8mr:
1054 case MSP430::DADD16mn:
1055 case MSP430::DADD16mp:
1056 case MSP430::DADD16mr:
1057 case MSP430::MOV8mn:
1058 case MSP430::MOV8mr:
1059 case MSP430::MOV16mn:
1060 case MSP430::MOV16mr:
1061 case MSP430::SUB8mn:
1062 case MSP430::SUB8mp:
1063 case MSP430::SUB8mr:
1064 case MSP430::SUB16mn:
1065 case MSP430::SUB16mp:
1066 case MSP430::SUB16mr:
1067 case MSP430::SUBC8mn:
1068 case MSP430::SUBC8mp:
1069 case MSP430::SUBC8mr:
1070 case MSP430::SUBC16mn:
1071 case MSP430::SUBC16mp:
1072 case MSP430::SUBC16mr:
1073 case MSP430::XOR8mn:
1074 case MSP430::XOR8mp:
1075 case MSP430::XOR8mr:
1076 case MSP430::XOR16mn:
1077 case MSP430::XOR16mp:
1078 case MSP430::XOR16mr: {
1079 // op: rs
1080 op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI);
1081 op &= UINT64_C(15);
1082 op <<= 8;
1083 Value |= op;
1084 // op: dst
1085 op = getMemOpValue(MI, Op: 0, Fixups, STI);
1086 Value |= (op & UINT64_C(1048560)) << 12;
1087 Value |= (op & UINT64_C(15));
1088 break;
1089 }
1090 case MSP430::ADD8rn:
1091 case MSP430::ADD8rr:
1092 case MSP430::ADD16rn:
1093 case MSP430::ADD16rr:
1094 case MSP430::ADDC8rn:
1095 case MSP430::ADDC8rr:
1096 case MSP430::ADDC16rn:
1097 case MSP430::ADDC16rr:
1098 case MSP430::AND8rn:
1099 case MSP430::AND8rr:
1100 case MSP430::AND16rn:
1101 case MSP430::AND16rr:
1102 case MSP430::BIC8rn:
1103 case MSP430::BIC8rr:
1104 case MSP430::BIC16rn:
1105 case MSP430::BIC16rr:
1106 case MSP430::BIS8rn:
1107 case MSP430::BIS8rr:
1108 case MSP430::BIS16rn:
1109 case MSP430::BIS16rr:
1110 case MSP430::DADD8rn:
1111 case MSP430::DADD8rr:
1112 case MSP430::DADD16rn:
1113 case MSP430::DADD16rr:
1114 case MSP430::MOV8rp:
1115 case MSP430::MOV16rp:
1116 case MSP430::SUB8rn:
1117 case MSP430::SUB8rr:
1118 case MSP430::SUB16rn:
1119 case MSP430::SUB16rr:
1120 case MSP430::SUBC8rn:
1121 case MSP430::SUBC8rr:
1122 case MSP430::SUBC16rn:
1123 case MSP430::SUBC16rr:
1124 case MSP430::XOR8rn:
1125 case MSP430::XOR8rr:
1126 case MSP430::XOR16rn:
1127 case MSP430::XOR16rr: {
1128 // op: rs
1129 op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI);
1130 op &= UINT64_C(15);
1131 op <<= 8;
1132 Value |= op;
1133 // op: rd
1134 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
1135 op &= UINT64_C(15);
1136 Value |= op;
1137 break;
1138 }
1139 case MSP430::ADD8rp:
1140 case MSP430::ADD16rp:
1141 case MSP430::ADDC8rp:
1142 case MSP430::ADDC16rp:
1143 case MSP430::AND8rp:
1144 case MSP430::AND16rp:
1145 case MSP430::BIC8rp:
1146 case MSP430::BIC16rp:
1147 case MSP430::BIS8rp:
1148 case MSP430::BIS16rp:
1149 case MSP430::DADD8rp:
1150 case MSP430::DADD16rp:
1151 case MSP430::SUB8rp:
1152 case MSP430::SUB16rp:
1153 case MSP430::SUBC8rp:
1154 case MSP430::SUBC16rp:
1155 case MSP430::XOR8rp:
1156 case MSP430::XOR16rp: {
1157 // op: rs
1158 op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI);
1159 op &= UINT64_C(15);
1160 op <<= 8;
1161 Value |= op;
1162 // op: rd
1163 op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI);
1164 op &= UINT64_C(15);
1165 Value |= op;
1166 break;
1167 }
1168 case MSP430::Bm: {
1169 // op: src
1170 op = getMemOpValue(MI, Op: 0, Fixups, STI);
1171 Value |= (op & UINT64_C(1048560)) << 12;
1172 Value |= (op & UINT64_C(15)) << 8;
1173 break;
1174 }
1175 case MSP430::CALLm:
1176 case MSP430::RRA8m:
1177 case MSP430::RRA16m:
1178 case MSP430::RRC8m:
1179 case MSP430::RRC16m:
1180 case MSP430::SEXT16m:
1181 case MSP430::SWPB16m: {
1182 // op: src
1183 op = getMemOpValue(MI, Op: 0, Fixups, STI);
1184 Value |= (op & UINT64_C(1048560)) << 12;
1185 Value |= (op & UINT64_C(15));
1186 break;
1187 }
1188 case MSP430::ADD8mm:
1189 case MSP430::ADD16mm:
1190 case MSP430::ADDC8mm:
1191 case MSP430::ADDC16mm:
1192 case MSP430::AND8mm:
1193 case MSP430::AND16mm:
1194 case MSP430::BIC8mm:
1195 case MSP430::BIC16mm:
1196 case MSP430::BIS8mm:
1197 case MSP430::BIS16mm:
1198 case MSP430::BIT8mm:
1199 case MSP430::BIT16mm:
1200 case MSP430::CMP8mm:
1201 case MSP430::CMP16mm:
1202 case MSP430::DADD8mm:
1203 case MSP430::DADD16mm:
1204 case MSP430::MOV8mm:
1205 case MSP430::MOV16mm:
1206 case MSP430::SUB8mm:
1207 case MSP430::SUB16mm:
1208 case MSP430::SUBC8mm:
1209 case MSP430::SUBC16mm:
1210 case MSP430::XOR8mm:
1211 case MSP430::XOR16mm: {
1212 // op: src
1213 op = getMemOpValue(MI, Op: 2, Fixups, STI);
1214 Value |= (op & UINT64_C(1048560)) << 12;
1215 Value |= (op & UINT64_C(15)) << 8;
1216 // op: dst
1217 op = getMemOpValue(MI, Op: 0, Fixups, STI);
1218 Value |= (op & UINT64_C(1048560)) << 28;
1219 Value |= (op & UINT64_C(15));
1220 break;
1221 }
1222 default:
1223 std::string msg;
1224 raw_string_ostream Msg(msg);
1225 Msg << "Not supported instr: " << MI;
1226 report_fatal_error(reason: Msg.str().c_str());
1227 }
1228 return Value;
1229}
1230
1231#ifdef GET_OPERAND_BIT_OFFSET
1232#undef GET_OPERAND_BIT_OFFSET
1233
1234uint32_t MSP430MCCodeEmitter::getOperandBitOffset(const MCInst &MI,
1235 unsigned OpNum,
1236 const MCSubtargetInfo &STI) const {
1237 switch (MI.getOpcode()) {
1238 case MSP430::ADDframe:
1239 case MSP430::ADJCALLSTACKDOWN:
1240 case MSP430::ADJCALLSTACKUP:
1241 case MSP430::RET:
1242 case MSP430::RETI:
1243 case MSP430::Rrcl8:
1244 case MSP430::Rrcl16:
1245 case MSP430::Select8:
1246 case MSP430::Select16:
1247 case MSP430::Shl8:
1248 case MSP430::Shl16:
1249 case MSP430::Sra8:
1250 case MSP430::Sra16:
1251 case MSP430::Srl8:
1252 case MSP430::Srl16: {
1253 break;
1254 }
1255 case MSP430::JMP: {
1256 switch (OpNum) {
1257 case 0:
1258 // op: dst
1259 return 0;
1260 }
1261 break;
1262 }
1263 case MSP430::PUSH16c: {
1264 switch (OpNum) {
1265 case 0:
1266 // op: imm
1267 return 0;
1268 }
1269 break;
1270 }
1271 case MSP430::Bi:
1272 case MSP430::CALLi:
1273 case MSP430::PUSH16i: {
1274 switch (OpNum) {
1275 case 0:
1276 // op: imm
1277 return 16;
1278 }
1279 break;
1280 }
1281 case MSP430::BIT8ri:
1282 case MSP430::BIT16ri:
1283 case MSP430::CMP8ri:
1284 case MSP430::CMP16ri:
1285 case MSP430::MOV8ri:
1286 case MSP430::MOV16ri: {
1287 switch (OpNum) {
1288 case 0:
1289 // op: rd
1290 return 0;
1291 case 1:
1292 // op: imm
1293 return 16;
1294 }
1295 break;
1296 }
1297 case MSP430::BIT8rm:
1298 case MSP430::BIT16rm:
1299 case MSP430::CMP8rm:
1300 case MSP430::CMP16rm:
1301 case MSP430::MOV8rm:
1302 case MSP430::MOV16rm:
1303 case MSP430::MOVZX16rm8: {
1304 switch (OpNum) {
1305 case 0:
1306 // op: rd
1307 return 0;
1308 case 1:
1309 // op: src
1310 return 8;
1311 }
1312 break;
1313 }
1314 case MSP430::ADD8ri:
1315 case MSP430::ADD16ri:
1316 case MSP430::ADDC8ri:
1317 case MSP430::ADDC16ri:
1318 case MSP430::AND8ri:
1319 case MSP430::AND16ri:
1320 case MSP430::BIC8ri:
1321 case MSP430::BIC16ri:
1322 case MSP430::BIS8ri:
1323 case MSP430::BIS16ri:
1324 case MSP430::DADD8ri:
1325 case MSP430::DADD16ri:
1326 case MSP430::SUB8ri:
1327 case MSP430::SUB16ri:
1328 case MSP430::SUBC8ri:
1329 case MSP430::SUBC16ri:
1330 case MSP430::XOR8ri:
1331 case MSP430::XOR16ri: {
1332 switch (OpNum) {
1333 case 0:
1334 // op: rd
1335 return 0;
1336 case 2:
1337 // op: imm
1338 return 16;
1339 }
1340 break;
1341 }
1342 case MSP430::ADD8rm:
1343 case MSP430::ADD16rm:
1344 case MSP430::ADDC8rm:
1345 case MSP430::ADDC16rm:
1346 case MSP430::AND8rm:
1347 case MSP430::AND16rm:
1348 case MSP430::BIC8rm:
1349 case MSP430::BIC16rm:
1350 case MSP430::BIS8rm:
1351 case MSP430::BIS16rm:
1352 case MSP430::DADD8rm:
1353 case MSP430::DADD16rm:
1354 case MSP430::SUB8rm:
1355 case MSP430::SUB16rm:
1356 case MSP430::SUBC8rm:
1357 case MSP430::SUBC16rm:
1358 case MSP430::XOR8rm:
1359 case MSP430::XOR16rm: {
1360 switch (OpNum) {
1361 case 0:
1362 // op: rd
1363 return 0;
1364 case 2:
1365 // op: src
1366 return 8;
1367 }
1368 break;
1369 }
1370 case MSP430::POP16r: {
1371 switch (OpNum) {
1372 case 0:
1373 // op: rd
1374 return 0;
1375 }
1376 break;
1377 }
1378 case MSP430::CALLn:
1379 case MSP430::CALLp:
1380 case MSP430::CALLr:
1381 case MSP430::PUSH8r:
1382 case MSP430::PUSH16r:
1383 case MSP430::RRA8n:
1384 case MSP430::RRA8p:
1385 case MSP430::RRA16n:
1386 case MSP430::RRA16p:
1387 case MSP430::RRC8n:
1388 case MSP430::RRC8p:
1389 case MSP430::RRC16n:
1390 case MSP430::RRC16p:
1391 case MSP430::SEXT16n:
1392 case MSP430::SEXT16p:
1393 case MSP430::SWPB16n:
1394 case MSP430::SWPB16p: {
1395 switch (OpNum) {
1396 case 0:
1397 // op: rs
1398 return 0;
1399 }
1400 break;
1401 }
1402 case MSP430::Br: {
1403 switch (OpNum) {
1404 case 0:
1405 // op: rs
1406 return 8;
1407 }
1408 break;
1409 }
1410 case MSP430::CALLm:
1411 case MSP430::RRA8m:
1412 case MSP430::RRA16m:
1413 case MSP430::RRC8m:
1414 case MSP430::RRC16m:
1415 case MSP430::SEXT16m:
1416 case MSP430::SWPB16m: {
1417 switch (OpNum) {
1418 case 0:
1419 // op: src
1420 return 0;
1421 }
1422 break;
1423 }
1424 case MSP430::Bm: {
1425 switch (OpNum) {
1426 case 0:
1427 // op: src
1428 return 8;
1429 }
1430 break;
1431 }
1432 case MSP430::JCC: {
1433 switch (OpNum) {
1434 case 1:
1435 // op: cond
1436 return 10;
1437 case 0:
1438 // op: dst
1439 return 0;
1440 }
1441 break;
1442 }
1443 case MSP430::BIT8rc:
1444 case MSP430::BIT16rc:
1445 case MSP430::CMP8rc:
1446 case MSP430::CMP16rc:
1447 case MSP430::MOV8rc:
1448 case MSP430::MOV16rc: {
1449 switch (OpNum) {
1450 case 1:
1451 // op: imm
1452 return 4;
1453 case 0:
1454 // op: rd
1455 return 0;
1456 }
1457 break;
1458 }
1459 case MSP430::RRA8r:
1460 case MSP430::RRA16r:
1461 case MSP430::RRC8r:
1462 case MSP430::RRC16r:
1463 case MSP430::SEXT16r:
1464 case MSP430::SWPB16r: {
1465 switch (OpNum) {
1466 case 1:
1467 // op: rs
1468 return 0;
1469 }
1470 break;
1471 }
1472 case MSP430::BIT8rn:
1473 case MSP430::BIT8rp:
1474 case MSP430::BIT8rr:
1475 case MSP430::BIT16rn:
1476 case MSP430::BIT16rp:
1477 case MSP430::BIT16rr:
1478 case MSP430::CMP8rn:
1479 case MSP430::CMP8rp:
1480 case MSP430::CMP8rr:
1481 case MSP430::CMP16rn:
1482 case MSP430::CMP16rp:
1483 case MSP430::CMP16rr:
1484 case MSP430::MOV8rn:
1485 case MSP430::MOV8rr:
1486 case MSP430::MOV16rn:
1487 case MSP430::MOV16rr:
1488 case MSP430::MOVZX16rr8:
1489 case MSP430::ZEXT16r: {
1490 switch (OpNum) {
1491 case 1:
1492 // op: rs
1493 return 8;
1494 case 0:
1495 // op: rd
1496 return 0;
1497 }
1498 break;
1499 }
1500 case MSP430::ADD8mi:
1501 case MSP430::ADD16mi:
1502 case MSP430::ADDC8mi:
1503 case MSP430::ADDC16mi:
1504 case MSP430::AND8mi:
1505 case MSP430::AND16mi:
1506 case MSP430::BIC8mi:
1507 case MSP430::BIC16mi:
1508 case MSP430::BIS8mi:
1509 case MSP430::BIS16mi:
1510 case MSP430::BIT8mi:
1511 case MSP430::BIT16mi:
1512 case MSP430::CMP8mi:
1513 case MSP430::CMP16mi:
1514 case MSP430::DADD8mi:
1515 case MSP430::DADD16mi:
1516 case MSP430::MOV8mi:
1517 case MSP430::MOV16mi:
1518 case MSP430::SUB8mi:
1519 case MSP430::SUB16mi:
1520 case MSP430::SUBC8mi:
1521 case MSP430::SUBC16mi:
1522 case MSP430::XOR8mi:
1523 case MSP430::XOR16mi: {
1524 switch (OpNum) {
1525 case 2:
1526 // op: imm
1527 return 16;
1528 case 0:
1529 // op: dst
1530 return 0;
1531 }
1532 break;
1533 }
1534 case MSP430::ADD8mc:
1535 case MSP430::ADD16mc:
1536 case MSP430::ADDC8mc:
1537 case MSP430::ADDC16mc:
1538 case MSP430::AND8mc:
1539 case MSP430::AND16mc:
1540 case MSP430::BIC8mc:
1541 case MSP430::BIC16mc:
1542 case MSP430::BIS8mc:
1543 case MSP430::BIS16mc:
1544 case MSP430::BIT8mc:
1545 case MSP430::BIT16mc:
1546 case MSP430::CMP8mc:
1547 case MSP430::CMP16mc:
1548 case MSP430::DADD8mc:
1549 case MSP430::DADD16mc:
1550 case MSP430::MOV8mc:
1551 case MSP430::MOV16mc:
1552 case MSP430::SUB8mc:
1553 case MSP430::SUB16mc:
1554 case MSP430::SUBC8mc:
1555 case MSP430::SUBC16mc:
1556 case MSP430::XOR8mc:
1557 case MSP430::XOR16mc: {
1558 switch (OpNum) {
1559 case 2:
1560 // op: imm
1561 return 4;
1562 case 0:
1563 // op: dst
1564 return 0;
1565 }
1566 break;
1567 }
1568 case MSP430::ADD8rc:
1569 case MSP430::ADD16rc:
1570 case MSP430::ADDC8rc:
1571 case MSP430::ADDC16rc:
1572 case MSP430::AND8rc:
1573 case MSP430::AND16rc:
1574 case MSP430::BIC8rc:
1575 case MSP430::BIC16rc:
1576 case MSP430::BIS8rc:
1577 case MSP430::BIS16rc:
1578 case MSP430::DADD8rc:
1579 case MSP430::DADD16rc:
1580 case MSP430::SUB8rc:
1581 case MSP430::SUB16rc:
1582 case MSP430::SUBC8rc:
1583 case MSP430::SUBC16rc:
1584 case MSP430::XOR8rc:
1585 case MSP430::XOR16rc: {
1586 switch (OpNum) {
1587 case 2:
1588 // op: imm
1589 return 4;
1590 case 0:
1591 // op: rd
1592 return 0;
1593 }
1594 break;
1595 }
1596 case MSP430::ADD8mn:
1597 case MSP430::ADD8mp:
1598 case MSP430::ADD8mr:
1599 case MSP430::ADD16mn:
1600 case MSP430::ADD16mp:
1601 case MSP430::ADD16mr:
1602 case MSP430::ADDC8mn:
1603 case MSP430::ADDC8mp:
1604 case MSP430::ADDC8mr:
1605 case MSP430::ADDC16mn:
1606 case MSP430::ADDC16mp:
1607 case MSP430::ADDC16mr:
1608 case MSP430::AND8mn:
1609 case MSP430::AND8mp:
1610 case MSP430::AND8mr:
1611 case MSP430::AND16mn:
1612 case MSP430::AND16mp:
1613 case MSP430::AND16mr:
1614 case MSP430::BIC8mn:
1615 case MSP430::BIC8mp:
1616 case MSP430::BIC8mr:
1617 case MSP430::BIC16mn:
1618 case MSP430::BIC16mp:
1619 case MSP430::BIC16mr:
1620 case MSP430::BIS8mn:
1621 case MSP430::BIS8mp:
1622 case MSP430::BIS8mr:
1623 case MSP430::BIS16mn:
1624 case MSP430::BIS16mp:
1625 case MSP430::BIS16mr:
1626 case MSP430::BIT8mn:
1627 case MSP430::BIT8mp:
1628 case MSP430::BIT8mr:
1629 case MSP430::BIT16mn:
1630 case MSP430::BIT16mp:
1631 case MSP430::BIT16mr:
1632 case MSP430::CMP8mn:
1633 case MSP430::CMP8mp:
1634 case MSP430::CMP8mr:
1635 case MSP430::CMP16mn:
1636 case MSP430::CMP16mp:
1637 case MSP430::CMP16mr:
1638 case MSP430::DADD8mn:
1639 case MSP430::DADD8mp:
1640 case MSP430::DADD8mr:
1641 case MSP430::DADD16mn:
1642 case MSP430::DADD16mp:
1643 case MSP430::DADD16mr:
1644 case MSP430::MOV8mn:
1645 case MSP430::MOV8mr:
1646 case MSP430::MOV16mn:
1647 case MSP430::MOV16mr:
1648 case MSP430::SUB8mn:
1649 case MSP430::SUB8mp:
1650 case MSP430::SUB8mr:
1651 case MSP430::SUB16mn:
1652 case MSP430::SUB16mp:
1653 case MSP430::SUB16mr:
1654 case MSP430::SUBC8mn:
1655 case MSP430::SUBC8mp:
1656 case MSP430::SUBC8mr:
1657 case MSP430::SUBC16mn:
1658 case MSP430::SUBC16mp:
1659 case MSP430::SUBC16mr:
1660 case MSP430::XOR8mn:
1661 case MSP430::XOR8mp:
1662 case MSP430::XOR8mr:
1663 case MSP430::XOR16mn:
1664 case MSP430::XOR16mp:
1665 case MSP430::XOR16mr: {
1666 switch (OpNum) {
1667 case 2:
1668 // op: rs
1669 return 8;
1670 case 0:
1671 // op: dst
1672 return 0;
1673 }
1674 break;
1675 }
1676 case MSP430::ADD8rn:
1677 case MSP430::ADD8rr:
1678 case MSP430::ADD16rn:
1679 case MSP430::ADD16rr:
1680 case MSP430::ADDC8rn:
1681 case MSP430::ADDC8rr:
1682 case MSP430::ADDC16rn:
1683 case MSP430::ADDC16rr:
1684 case MSP430::AND8rn:
1685 case MSP430::AND8rr:
1686 case MSP430::AND16rn:
1687 case MSP430::AND16rr:
1688 case MSP430::BIC8rn:
1689 case MSP430::BIC8rr:
1690 case MSP430::BIC16rn:
1691 case MSP430::BIC16rr:
1692 case MSP430::BIS8rn:
1693 case MSP430::BIS8rr:
1694 case MSP430::BIS16rn:
1695 case MSP430::BIS16rr:
1696 case MSP430::DADD8rn:
1697 case MSP430::DADD8rr:
1698 case MSP430::DADD16rn:
1699 case MSP430::DADD16rr:
1700 case MSP430::MOV8rp:
1701 case MSP430::MOV16rp:
1702 case MSP430::SUB8rn:
1703 case MSP430::SUB8rr:
1704 case MSP430::SUB16rn:
1705 case MSP430::SUB16rr:
1706 case MSP430::SUBC8rn:
1707 case MSP430::SUBC8rr:
1708 case MSP430::SUBC16rn:
1709 case MSP430::SUBC16rr:
1710 case MSP430::XOR8rn:
1711 case MSP430::XOR8rr:
1712 case MSP430::XOR16rn:
1713 case MSP430::XOR16rr: {
1714 switch (OpNum) {
1715 case 2:
1716 // op: rs
1717 return 8;
1718 case 0:
1719 // op: rd
1720 return 0;
1721 }
1722 break;
1723 }
1724 case MSP430::ADD8mm:
1725 case MSP430::ADD16mm:
1726 case MSP430::ADDC8mm:
1727 case MSP430::ADDC16mm:
1728 case MSP430::AND8mm:
1729 case MSP430::AND16mm:
1730 case MSP430::BIC8mm:
1731 case MSP430::BIC16mm:
1732 case MSP430::BIS8mm:
1733 case MSP430::BIS16mm:
1734 case MSP430::BIT8mm:
1735 case MSP430::BIT16mm:
1736 case MSP430::CMP8mm:
1737 case MSP430::CMP16mm:
1738 case MSP430::DADD8mm:
1739 case MSP430::DADD16mm:
1740 case MSP430::MOV8mm:
1741 case MSP430::MOV16mm:
1742 case MSP430::SUB8mm:
1743 case MSP430::SUB16mm:
1744 case MSP430::SUBC8mm:
1745 case MSP430::SUBC16mm:
1746 case MSP430::XOR8mm:
1747 case MSP430::XOR16mm: {
1748 switch (OpNum) {
1749 case 2:
1750 // op: src
1751 return 8;
1752 case 0:
1753 // op: dst
1754 return 0;
1755 }
1756 break;
1757 }
1758 case MSP430::ADD8rp:
1759 case MSP430::ADD16rp:
1760 case MSP430::ADDC8rp:
1761 case MSP430::ADDC16rp:
1762 case MSP430::AND8rp:
1763 case MSP430::AND16rp:
1764 case MSP430::BIC8rp:
1765 case MSP430::BIC16rp:
1766 case MSP430::BIS8rp:
1767 case MSP430::BIS16rp:
1768 case MSP430::DADD8rp:
1769 case MSP430::DADD16rp:
1770 case MSP430::SUB8rp:
1771 case MSP430::SUB16rp:
1772 case MSP430::SUBC8rp:
1773 case MSP430::SUBC16rp:
1774 case MSP430::XOR8rp:
1775 case MSP430::XOR16rp: {
1776 switch (OpNum) {
1777 case 3:
1778 // op: rs
1779 return 8;
1780 case 0:
1781 // op: rd
1782 return 0;
1783 }
1784 break;
1785 }
1786 }
1787 std::string msg;
1788 raw_string_ostream Msg(msg);
1789 Msg << "Not supported instr[opcode]: " << MI << "[" << OpNum << "]";
1790 report_fatal_error(Msg.str().c_str());
1791}
1792
1793#endif // GET_OPERAND_BIT_OFFSET
1794
1795