1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11static bool CC_Mips(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, CCState &State);
14static bool CC_Mips16RetHelper(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, CCState &State);
17static bool CC_MipsN(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, CCState &State);
20static bool CC_MipsN_FastCC(unsigned ValNo, MVT ValVT,
21 MVT LocVT, CCValAssign::LocInfo LocInfo,
22 ISD::ArgFlagsTy ArgFlags, CCState &State);
23static bool CC_MipsN_SoftFloat(unsigned ValNo, MVT ValVT,
24 MVT LocVT, CCValAssign::LocInfo LocInfo,
25 ISD::ArgFlagsTy ArgFlags, CCState &State);
26static bool CC_MipsN_VarArg(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
29static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
30 MVT LocVT, CCValAssign::LocInfo LocInfo,
31 ISD::ArgFlagsTy ArgFlags, CCState &State);
32static bool CC_MipsO32_FP(unsigned ValNo, MVT ValVT,
33 MVT LocVT, CCValAssign::LocInfo LocInfo,
34 ISD::ArgFlagsTy ArgFlags, CCState &State);
35static bool CC_MipsO32_FastCC(unsigned ValNo, MVT ValVT,
36 MVT LocVT, CCValAssign::LocInfo LocInfo,
37 ISD::ArgFlagsTy ArgFlags, CCState &State);
38static bool CC_Mips_ByVal(unsigned ValNo, MVT ValVT,
39 MVT LocVT, CCValAssign::LocInfo LocInfo,
40 ISD::ArgFlagsTy ArgFlags, CCState &State);
41static bool CC_Mips_FastCC(unsigned ValNo, MVT ValVT,
42 MVT LocVT, CCValAssign::LocInfo LocInfo,
43 ISD::ArgFlagsTy ArgFlags, CCState &State);
44static bool CC_Mips_FixedArg(unsigned ValNo, MVT ValVT,
45 MVT LocVT, CCValAssign::LocInfo LocInfo,
46 ISD::ArgFlagsTy ArgFlags, CCState &State);
47static bool CC_Mips_VarArg(unsigned ValNo, MVT ValVT,
48 MVT LocVT, CCValAssign::LocInfo LocInfo,
49 ISD::ArgFlagsTy ArgFlags, CCState &State);
50static bool RetCC_F128(unsigned ValNo, MVT ValVT,
51 MVT LocVT, CCValAssign::LocInfo LocInfo,
52 ISD::ArgFlagsTy ArgFlags, CCState &State);
53static bool RetCC_F128HardFloat(unsigned ValNo, MVT ValVT,
54 MVT LocVT, CCValAssign::LocInfo LocInfo,
55 ISD::ArgFlagsTy ArgFlags, CCState &State);
56static bool RetCC_F128SoftFloat(unsigned ValNo, MVT ValVT,
57 MVT LocVT, CCValAssign::LocInfo LocInfo,
58 ISD::ArgFlagsTy ArgFlags, CCState &State);
59static bool RetCC_Mips(unsigned ValNo, MVT ValVT,
60 MVT LocVT, CCValAssign::LocInfo LocInfo,
61 ISD::ArgFlagsTy ArgFlags, CCState &State);
62static bool RetCC_MipsN(unsigned ValNo, MVT ValVT,
63 MVT LocVT, CCValAssign::LocInfo LocInfo,
64 ISD::ArgFlagsTy ArgFlags, CCState &State);
65static bool RetCC_MipsO32(unsigned ValNo, MVT ValVT,
66 MVT LocVT, CCValAssign::LocInfo LocInfo,
67 ISD::ArgFlagsTy ArgFlags, CCState &State);
68
69
70static bool CC_Mips(unsigned ValNo, MVT ValVT,
71 MVT LocVT, CCValAssign::LocInfo LocInfo,
72 ISD::ArgFlagsTy ArgFlags, CCState &State) {
73
74 if (State.isVarArg()) {
75 if (!static_cast<MipsCCState *>(&State)->IsCallOperandFixed(ValNo)) {
76 if (!CC_Mips_VarArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
77 return false;
78 }
79 }
80
81 if (!CC_Mips_FixedArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
82 return false;
83
84 return true; // CC didn't match.
85}
86
87
88static bool CC_Mips16RetHelper(unsigned ValNo, MVT ValVT,
89 MVT LocVT, CCValAssign::LocInfo LocInfo,
90 ISD::ArgFlagsTy ArgFlags, CCState &State) {
91
92 if (ArgFlags.isByVal()) {
93 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
94 return false;
95 }
96
97 if (LocVT == MVT::i32) {
98 static const MCPhysReg RegList1[] = {
99 Mips::V0, Mips::V1, Mips::A0, Mips::A1
100 };
101 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
102 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
103 return false;
104 }
105 }
106
107 return true; // CC didn't match.
108}
109
110
111static bool CC_MipsN(unsigned ValNo, MVT ValVT,
112 MVT LocVT, CCValAssign::LocInfo LocInfo,
113 ISD::ArgFlagsTy ArgFlags, CCState &State) {
114
115 if (LocVT == MVT::i8 ||
116 LocVT == MVT::i16 ||
117 LocVT == MVT::i32 ||
118 LocVT == MVT::i64) {
119 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
120 if (ArgFlags.isInReg()) {
121 LocVT = MVT::i64;
122 if (ArgFlags.isSExt())
123 LocInfo = CCValAssign::SExtUpper;
124 else if (ArgFlags.isZExt())
125 LocInfo = CCValAssign::ZExtUpper;
126 else
127 LocInfo = CCValAssign::AExtUpper;
128 }
129 }
130 }
131
132 if (LocVT == MVT::i32) {
133 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
134 if (static_cast<MipsCCState *>(&State)->WasOriginalArgFloat(ValNo)) {
135 if (!CC_MipsN_SoftFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
136 return false;
137 }
138 }
139 }
140
141 if (LocVT == MVT::i8 ||
142 LocVT == MVT::i16 ||
143 LocVT == MVT::i32) {
144 LocVT = MVT::i64;
145 if (ArgFlags.isSExt())
146 LocInfo = CCValAssign::SExt;
147 else if (ArgFlags.isZExt())
148 LocInfo = CCValAssign::ZExt;
149 else
150 LocInfo = CCValAssign::AExt;
151 }
152
153 if (LocVT == MVT::i64) {
154 static const MCPhysReg RegList1[] = {
155 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
156 };
157 static const MCPhysReg RegList2[] = {
158 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
159 };
160 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
161 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
162 return false;
163 }
164 }
165
166 if (LocVT == MVT::f32) {
167 static const MCPhysReg RegList3[] = {
168 Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
169 };
170 static const MCPhysReg RegList4[] = {
171 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
172 };
173 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
174 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
175 return false;
176 }
177 }
178
179 if (LocVT == MVT::f64) {
180 static const MCPhysReg RegList5[] = {
181 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
182 };
183 static const MCPhysReg RegList6[] = {
184 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
185 };
186 if (MCRegister Reg = State.AllocateReg(Regs: RegList5, ShadowRegs: RegList6)) {
187 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
188 return false;
189 }
190 }
191
192 if (LocVT == MVT::f32) {
193 int64_t Offset7 = State.AllocateStack(Size: 4, Alignment: Align(8));
194 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
195 return false;
196 }
197
198 if (LocVT == MVT::i64 ||
199 LocVT == MVT::f64) {
200 int64_t Offset8 = State.AllocateStack(Size: 8, Alignment: Align(8));
201 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
202 return false;
203 }
204
205 return true; // CC didn't match.
206}
207
208
209static bool CC_MipsN_FastCC(unsigned ValNo, MVT ValVT,
210 MVT LocVT, CCValAssign::LocInfo LocInfo,
211 ISD::ArgFlagsTy ArgFlags, CCState &State) {
212
213 if (LocVT == MVT::i64) {
214 static const MCPhysReg RegList1[] = {
215 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64, Mips::T4_64, Mips::T5_64, Mips::T6_64, Mips::T7_64, Mips::T8_64, Mips::V1_64
216 };
217 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
218 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
219 return false;
220 }
221 }
222
223 if (LocVT == MVT::f64) {
224 static const MCPhysReg RegList2[] = {
225 Mips::D0_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
226 };
227 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
228 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
229 return false;
230 }
231 }
232
233 if (LocVT == MVT::i64 ||
234 LocVT == MVT::f64) {
235 int64_t Offset3 = State.AllocateStack(Size: 8, Alignment: Align(8));
236 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
237 return false;
238 }
239
240 return true; // CC didn't match.
241}
242
243
244static bool CC_MipsN_SoftFloat(unsigned ValNo, MVT ValVT,
245 MVT LocVT, CCValAssign::LocInfo LocInfo,
246 ISD::ArgFlagsTy ArgFlags, CCState &State) {
247
248 static const MCPhysReg RegList1[] = {
249 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3
250 };
251 static const MCPhysReg RegList2[] = {
252 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
253 };
254 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
255 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
256 return false;
257 }
258
259 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(8));
260 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
261 return false;
262
263 return true; // CC didn't match.
264}
265
266
267static bool CC_MipsN_VarArg(unsigned ValNo, MVT ValVT,
268 MVT LocVT, CCValAssign::LocInfo LocInfo,
269 ISD::ArgFlagsTy ArgFlags, CCState &State) {
270
271 if (LocVT == MVT::i8 ||
272 LocVT == MVT::i16 ||
273 LocVT == MVT::i32 ||
274 LocVT == MVT::i64) {
275 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
276 if (ArgFlags.isInReg()) {
277 LocVT = MVT::i64;
278 if (ArgFlags.isSExt())
279 LocInfo = CCValAssign::SExtUpper;
280 else if (ArgFlags.isZExt())
281 LocInfo = CCValAssign::ZExtUpper;
282 else
283 LocInfo = CCValAssign::AExtUpper;
284 }
285 }
286 }
287
288 if (LocVT == MVT::i8 ||
289 LocVT == MVT::i16 ||
290 LocVT == MVT::i32) {
291 LocVT = MVT::i64;
292 if (ArgFlags.isSExt())
293 LocInfo = CCValAssign::SExt;
294 else if (ArgFlags.isZExt())
295 LocInfo = CCValAssign::ZExt;
296 else
297 LocInfo = CCValAssign::AExt;
298 }
299
300 if (LocVT == MVT::f32) {
301 static const MCPhysReg RegList1[] = {
302 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3
303 };
304 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
305 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
306 return false;
307 }
308 }
309
310 if (LocVT == MVT::i64 ||
311 LocVT == MVT::f64) {
312 static const MCPhysReg RegList2[] = {
313 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
314 };
315 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
316 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
317 return false;
318 }
319 }
320
321 if (LocVT == MVT::f32) {
322 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(8));
323 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
324 return false;
325 }
326
327 if (LocVT == MVT::i64 ||
328 LocVT == MVT::f64) {
329 int64_t Offset4 = State.AllocateStack(Size: 8, Alignment: Align(8));
330 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
331 return false;
332 }
333
334 return true; // CC didn't match.
335}
336
337
338static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
339 MVT LocVT, CCValAssign::LocInfo LocInfo,
340 ISD::ArgFlagsTy ArgFlags, CCState &State) {
341
342 if (LocVT == MVT::i1 ||
343 LocVT == MVT::i8 ||
344 LocVT == MVT::i16) {
345 LocVT = MVT::i32;
346 if (ArgFlags.isSExt())
347 LocInfo = CCValAssign::SExt;
348 else if (ArgFlags.isZExt())
349 LocInfo = CCValAssign::ZExt;
350 else
351 LocInfo = CCValAssign::AExt;
352 }
353
354 if (LocVT == MVT::i32 ||
355 LocVT == MVT::f32) {
356 int64_t Offset1 = State.AllocateStack(Size: 4, Alignment: Align(4));
357 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset1, LocVT, HTP: LocInfo));
358 return false;
359 }
360
361 if (LocVT == MVT::f64) {
362 int64_t Offset2 = State.AllocateStack(Size: 8, Alignment: Align(8));
363 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
364 return false;
365 }
366
367 return true; // CC didn't match.
368}
369
370
371static bool CC_MipsO32_FP(unsigned ValNo, MVT ValVT,
372 MVT LocVT, CCValAssign::LocInfo LocInfo,
373 ISD::ArgFlagsTy ArgFlags, CCState &State) {
374
375 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
376 if (!CC_MipsO32_FP32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
377 return false;
378 }
379
380 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
381 if (!CC_MipsO32_FP64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
382 return false;
383 }
384
385 return true; // CC didn't match.
386}
387
388
389static bool CC_MipsO32_FastCC(unsigned ValNo, MVT ValVT,
390 MVT LocVT, CCValAssign::LocInfo LocInfo,
391 ISD::ArgFlagsTy ArgFlags, CCState &State) {
392
393 if (LocVT == MVT::f64) {
394 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
395 static const MCPhysReg RegList1[] = {
396 Mips::D0, Mips::D1, Mips::D2, Mips::D3, Mips::D4, Mips::D5, Mips::D6, Mips::D7, Mips::D8, Mips::D9
397 };
398 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
399 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
400 return false;
401 }
402 }
403 }
404
405 if (LocVT == MVT::f64) {
406 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
407 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useOddSPReg()) {
408 static const MCPhysReg RegList2[] = {
409 Mips::D0_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
410 };
411 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
412 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
413 return false;
414 }
415 }
416 }
417 }
418
419 if (LocVT == MVT::f64) {
420 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
421 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().noOddSPReg()) {
422 static const MCPhysReg RegList3[] = {
423 Mips::D0_64, Mips::D2_64, Mips::D4_64, Mips::D6_64, Mips::D8_64, Mips::D10_64, Mips::D12_64, Mips::D14_64, Mips::D16_64, Mips::D18_64
424 };
425 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
426 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
427 return false;
428 }
429 }
430 }
431 }
432
433 if (LocVT == MVT::f64) {
434 int64_t Offset4 = State.AllocateStack(Size: 8, Alignment: Align(8));
435 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
436 return false;
437 }
438
439 return true; // CC didn't match.
440}
441
442
443static bool CC_Mips_ByVal(unsigned ValNo, MVT ValVT,
444 MVT LocVT, CCValAssign::LocInfo LocInfo,
445 ISD::ArgFlagsTy ArgFlags, CCState &State) {
446
447 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
448 if (ArgFlags.isByVal()) {
449 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
450 return false;
451 }
452 }
453
454 if (ArgFlags.isByVal()) {
455 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 8, MinAlign: Align(8), ArgFlags);
456 return false;
457 }
458
459 return true; // CC didn't match.
460}
461
462
463static bool CC_Mips_FastCC(unsigned ValNo, MVT ValVT,
464 MVT LocVT, CCValAssign::LocInfo LocInfo,
465 ISD::ArgFlagsTy ArgFlags, CCState &State) {
466
467 if (ArgFlags.isByVal()) {
468 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
469 return false;
470 }
471
472 if (LocVT == MVT::i8 ||
473 LocVT == MVT::i16) {
474 LocVT = MVT::i32;
475 if (ArgFlags.isSExt())
476 LocInfo = CCValAssign::SExt;
477 else if (ArgFlags.isZExt())
478 LocInfo = CCValAssign::ZExt;
479 else
480 LocInfo = CCValAssign::AExt;
481 }
482
483 if (LocVT == MVT::i32) {
484 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isTargetNaCl()) {
485 static const MCPhysReg RegList1[] = {
486 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3, Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::T8, Mips::V1
487 };
488 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
489 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
490 return false;
491 }
492 }
493 }
494
495 if (LocVT == MVT::i32) {
496 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isTargetNaCl()) {
497 static const MCPhysReg RegList2[] = {
498 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3, Mips::T4, Mips::T5, Mips::V1
499 };
500 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
501 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
502 return false;
503 }
504 }
505 }
506
507 if (LocVT == MVT::f32) {
508 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useOddSPReg()) {
509 static const MCPhysReg RegList3[] = {
510 Mips::F0, Mips::F1, Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11, Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
511 };
512 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
513 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
514 return false;
515 }
516 }
517 }
518
519 if (LocVT == MVT::f32) {
520 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().noOddSPReg()) {
521 static const MCPhysReg RegList4[] = {
522 Mips::F0, Mips::F2, Mips::F4, Mips::F6, Mips::F8, Mips::F10, Mips::F12, Mips::F14, Mips::F16, Mips::F18
523 };
524 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
525 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
526 return false;
527 }
528 }
529 }
530
531 if (LocVT == MVT::i32 ||
532 LocVT == MVT::f32) {
533 int64_t Offset5 = State.AllocateStack(Size: 4, Alignment: Align(4));
534 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset5, LocVT, HTP: LocInfo));
535 return false;
536 }
537
538 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
539 if (!CC_MipsO32_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
540 return false;
541 }
542
543 if (!CC_MipsN_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
544 return false;
545
546 return true; // CC didn't match.
547}
548
549
550static bool CC_Mips_FixedArg(unsigned ValNo, MVT ValVT,
551 MVT LocVT, CCValAssign::LocInfo LocInfo,
552 ISD::ArgFlagsTy ArgFlags, CCState &State) {
553
554 if (State.getCallingConv() != CallingConv::Fast) {
555 if (static_cast<MipsCCState *>(&State)->getSpecialCallingConv() == MipsCCState::Mips16RetHelperConv) {
556 if (!CC_Mips16RetHelper(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
557 return false;
558 }
559 }
560
561 if (ArgFlags.isByVal()) {
562 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
563 return false;
564 }
565
566 if (LocVT == MVT::i64) {
567 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
568 if (static_cast<MipsCCState *>(&State)->WasOriginalArgF128(ValNo)) {
569 LocVT = MVT::f64;
570 LocInfo = CCValAssign::BCvt;
571 }
572 }
573 }
574
575 if (State.getCallingConv() == CallingConv::Fast) {
576 if (!CC_Mips_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
577 return false;
578 }
579
580 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
581 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isGP64bit()) {
582 if (!CC_MipsO32_FP(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
583 return false;
584 }
585 }
586
587 if (!CC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
588 return false;
589
590 return true; // CC didn't match.
591}
592
593
594static bool CC_Mips_VarArg(unsigned ValNo, MVT ValVT,
595 MVT LocVT, CCValAssign::LocInfo LocInfo,
596 ISD::ArgFlagsTy ArgFlags, CCState &State) {
597
598 if (ArgFlags.isByVal()) {
599 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
600 return false;
601 }
602
603 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
604 if (!CC_MipsO32_FP(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
605 return false;
606 }
607
608 if (!CC_MipsN_VarArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
609 return false;
610
611 return true; // CC didn't match.
612}
613
614
615static bool RetCC_F128(unsigned ValNo, MVT ValVT,
616 MVT LocVT, CCValAssign::LocInfo LocInfo,
617 ISD::ArgFlagsTy ArgFlags, CCState &State) {
618
619 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
620 if (LocVT == MVT::i64) {
621 if (!RetCC_F128SoftFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
622 return false;
623 }
624 }
625
626 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
627 if (LocVT == MVT::i64) {
628 if (!RetCC_F128HardFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
629 return false;
630 }
631 }
632
633 return true; // CC didn't match.
634}
635
636
637static bool RetCC_F128HardFloat(unsigned ValNo, MVT ValVT,
638 MVT LocVT, CCValAssign::LocInfo LocInfo,
639 ISD::ArgFlagsTy ArgFlags, CCState &State) {
640
641 LocVT = MVT::f64;
642 LocInfo = CCValAssign::BCvt;
643
644 if (ArgFlags.isInReg()) {
645 static const MCPhysReg RegList1[] = {
646 Mips::D0_64, Mips::D1_64
647 };
648 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
649 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
650 return false;
651 }
652 }
653
654 static const MCPhysReg RegList2[] = {
655 Mips::D0_64, Mips::D2_64
656 };
657 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
658 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
659 return false;
660 }
661
662 return true; // CC didn't match.
663}
664
665
666static bool RetCC_F128SoftFloat(unsigned ValNo, MVT ValVT,
667 MVT LocVT, CCValAssign::LocInfo LocInfo,
668 ISD::ArgFlagsTy ArgFlags, CCState &State) {
669
670 static const MCPhysReg RegList1[] = {
671 Mips::V0_64, Mips::A0_64
672 };
673 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
674 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
675 return false;
676 }
677
678 return true; // CC didn't match.
679}
680
681
682static bool RetCC_Mips(unsigned ValNo, MVT ValVT,
683 MVT LocVT, CCValAssign::LocInfo LocInfo,
684 ISD::ArgFlagsTy ArgFlags, CCState &State) {
685
686 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_N32()) {
687 if (!RetCC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
688 return false;
689 }
690
691 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_N64()) {
692 if (!RetCC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
693 return false;
694 }
695
696 if (!RetCC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
697 return false;
698
699 return true; // CC didn't match.
700}
701
702
703static bool RetCC_MipsN(unsigned ValNo, MVT ValVT,
704 MVT LocVT, CCValAssign::LocInfo LocInfo,
705 ISD::ArgFlagsTy ArgFlags, CCState &State) {
706
707 if (LocVT == MVT::i64) {
708 if (static_cast<MipsCCState *>(&State)->WasOriginalArgF128(ValNo)) {
709 if (!RetCC_F128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
710 return false;
711 }
712 }
713
714 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
715 if (LocVT == MVT::i8 ||
716 LocVT == MVT::i16 ||
717 LocVT == MVT::i32 ||
718 LocVT == MVT::i64) {
719 if (ArgFlags.isInReg()) {
720 LocVT = MVT::i64;
721 if (ArgFlags.isSExt())
722 LocInfo = CCValAssign::SExt;
723 else if (ArgFlags.isZExt())
724 LocInfo = CCValAssign::ZExt;
725 else
726 LocInfo = CCValAssign::AExt;
727 }
728 }
729 }
730
731 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
732 if (LocVT == MVT::i8 ||
733 LocVT == MVT::i16 ||
734 LocVT == MVT::i32 ||
735 LocVT == MVT::i64) {
736 if (ArgFlags.isInReg()) {
737 LocVT = MVT::i64;
738 if (ArgFlags.isSExt())
739 LocInfo = CCValAssign::SExtUpper;
740 else if (ArgFlags.isZExt())
741 LocInfo = CCValAssign::ZExtUpper;
742 else
743 LocInfo = CCValAssign::AExtUpper;
744 }
745 }
746 }
747
748 if (LocVT == MVT::i64) {
749 static const MCPhysReg RegList1[] = {
750 Mips::V0_64, Mips::V1_64
751 };
752 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
753 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
754 return false;
755 }
756 }
757
758 if (LocVT == MVT::f32) {
759 static const MCPhysReg RegList2[] = {
760 Mips::F0, Mips::F2
761 };
762 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
763 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
764 return false;
765 }
766 }
767
768 if (LocVT == MVT::f64) {
769 static const MCPhysReg RegList3[] = {
770 Mips::D0_64, Mips::D2_64
771 };
772 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
773 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
774 return false;
775 }
776 }
777
778 return true; // CC didn't match.
779}
780
781
782static bool RetCC_MipsO32(unsigned ValNo, MVT ValVT,
783 MVT LocVT, CCValAssign::LocInfo LocInfo,
784 ISD::ArgFlagsTy ArgFlags, CCState &State) {
785
786 if (LocVT == MVT::i1 ||
787 LocVT == MVT::i8 ||
788 LocVT == MVT::i16) {
789 LocVT = MVT::i32;
790 if (ArgFlags.isSExt())
791 LocInfo = CCValAssign::SExt;
792 else if (ArgFlags.isZExt())
793 LocInfo = CCValAssign::ZExt;
794 else
795 LocInfo = CCValAssign::AExt;
796 }
797
798 if (!static_cast<MipsCCState *>(&State)->WasOriginalRetVectorFloat(ValNo)) {
799 if (LocVT == MVT::i32) {
800 static const MCPhysReg RegList1[] = {
801 Mips::V0, Mips::V1, Mips::A0, Mips::A1
802 };
803 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
804 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
805 return false;
806 }
807 }
808 }
809
810 if (LocVT == MVT::f32) {
811 static const MCPhysReg RegList2[] = {
812 Mips::F0, Mips::F2
813 };
814 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
815 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
816 return false;
817 }
818 }
819
820 if (LocVT == MVT::f64) {
821 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
822 static const MCPhysReg RegList3[] = {
823 Mips::D0_64, Mips::D2_64
824 };
825 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
826 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
827 return false;
828 }
829 }
830 }
831
832 if (LocVT == MVT::f64) {
833 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
834 static const MCPhysReg RegList4[] = {
835 Mips::D0, Mips::D1
836 };
837 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
838 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
839 return false;
840 }
841 }
842 }
843
844 return true; // CC didn't match.
845}
846
847#else
848
849const MCRegister CC_Mips_ArgRegs[] = { 0 };
850const MCRegister CC_Mips16RetHelper_ArgRegs[] = { Mips::A0, Mips::A1, Mips::V0, Mips::V1 };
851const MCRegister CC_MipsN_ArgRegs[] = { 0 };
852const MCRegister CC_MipsN_FastCC_ArgRegs[] = { Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::D0_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64, Mips::T4_64, Mips::T5_64, Mips::T6_64, Mips::T7_64, Mips::T8_64, Mips::V1_64 };
853const MCRegister CC_MipsN_SoftFloat_ArgRegs[] = { 0 };
854const MCRegister CC_MipsN_VarArg_ArgRegs[] = { Mips::A0, Mips::A0_64, Mips::A1, Mips::A1_64, Mips::A2, Mips::A2_64, Mips::A3, Mips::A3_64, Mips::T0, Mips::T0_64, Mips::T1, Mips::T1_64, Mips::T2, Mips::T2_64, Mips::T3, Mips::T3_64 };
855const MCRegister CC_MipsO32_ArgRegs[] = { 0 };
856const MCRegister CC_MipsO32_FP_ArgRegs[] = { 0 };
857const MCRegister CC_MipsO32_FastCC_ArgRegs[] = { Mips::D0, Mips::D0_64, Mips::D1, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64, Mips::D1_64, Mips::D2, Mips::D2_64, Mips::D3, Mips::D3_64, Mips::D4, Mips::D4_64, Mips::D5, Mips::D5_64, Mips::D6, Mips::D6_64, Mips::D7, Mips::D7_64, Mips::D8, Mips::D8_64, Mips::D9, Mips::D9_64 };
858const MCRegister CC_Mips_ByVal_ArgRegs[] = { 0 };
859const MCRegister CC_Mips_FastCC_ArgRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::F0, Mips::F1, Mips::F10, Mips::F11, Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19, Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::T0, Mips::T1, Mips::T2, Mips::T3, Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::T8, Mips::V1 };
860const MCRegister CC_Mips_FixedArg_ArgRegs[] = { 0 };
861const MCRegister CC_Mips_VarArg_ArgRegs[] = { 0 };
862const MCRegister RetCC_F128_ArgRegs[] = { 0 };
863const MCRegister RetCC_F128HardFloat_ArgRegs[] = { Mips::D0_64, Mips::D1_64, Mips::D2_64 };
864const MCRegister RetCC_F128SoftFloat_ArgRegs[] = { Mips::A0_64, Mips::V0_64 };
865const MCRegister RetCC_Mips_ArgRegs[] = { 0 };
866const MCRegister RetCC_MipsN_ArgRegs[] = { Mips::D0_64, Mips::D2_64, Mips::F0, Mips::F2, Mips::V0_64, Mips::V1_64 };
867const MCRegister RetCC_MipsO32_ArgRegs[] = { Mips::A0, Mips::A1, Mips::D0, Mips::D0_64, Mips::D1, Mips::D2_64, Mips::F0, Mips::F2, Mips::V0, Mips::V1 };
868
869#endif // CC_REGISTER_LIST
870