1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11bool llvm::CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, CCState &State);
14bool llvm::CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, CCState &State);
17static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, CCState &State);
20bool llvm::CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
21 MVT LocVT, CCValAssign::LocInfo LocInfo,
22 ISD::ArgFlagsTy ArgFlags, CCState &State);
23static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
24 MVT LocVT, CCValAssign::LocInfo LocInfo,
25 ISD::ArgFlagsTy ArgFlags, CCState &State);
26bool llvm::CC_PPC64_ELF(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
29bool llvm::CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
30 MVT LocVT, CCValAssign::LocInfo LocInfo,
31 ISD::ArgFlagsTy ArgFlags, CCState &State);
32bool llvm::RetCC_PPC(unsigned ValNo, MVT ValVT,
33 MVT LocVT, CCValAssign::LocInfo LocInfo,
34 ISD::ArgFlagsTy ArgFlags, CCState &State);
35static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
36 MVT LocVT, CCValAssign::LocInfo LocInfo,
37 ISD::ArgFlagsTy ArgFlags, CCState &State);
38bool llvm::RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
39 MVT LocVT, CCValAssign::LocInfo LocInfo,
40 ISD::ArgFlagsTy ArgFlags, CCState &State);
41bool llvm::RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
42 MVT LocVT, CCValAssign::LocInfo LocInfo,
43 ISD::ArgFlagsTy ArgFlags, CCState &State);
44
45
46bool llvm::CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
47 MVT LocVT, CCValAssign::LocInfo LocInfo,
48 ISD::ArgFlagsTy ArgFlags, CCState &State) {
49
50 if (LocVT == MVT::v16i8 ||
51 LocVT == MVT::v8i16 ||
52 LocVT == MVT::v4i32 ||
53 LocVT == MVT::v2i64 ||
54 LocVT == MVT::v1i128 ||
55 LocVT == MVT::v4f32 ||
56 LocVT == MVT::v2f64) {
57 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
58 static const MCPhysReg RegList1[] = {
59 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
60 };
61 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
62 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
63 return false;
64 }
65 }
66 }
67
68 if (LocVT == MVT::f128) {
69 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
70 static const MCPhysReg RegList2[] = {
71 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
72 };
73 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
74 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
75 return false;
76 }
77 }
78 }
79
80 if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
81 return false;
82
83 return true; // CC didn't match.
84}
85
86
87bool llvm::CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
88 MVT LocVT, CCValAssign::LocInfo LocInfo,
89 ISD::ArgFlagsTy ArgFlags, CCState &State) {
90
91 if (ArgFlags.isByVal()) {
92 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
93 return false;
94 }
95
96 if (CC_PPC32_SVR4_Custom_Dummy(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
97 return false;
98
99 return true; // CC didn't match.
100}
101
102
103static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
104 MVT LocVT, CCValAssign::LocInfo LocInfo,
105 ISD::ArgFlagsTy ArgFlags, CCState &State) {
106
107 if (LocVT == MVT::i1) {
108 LocVT = MVT::i32;
109 if (ArgFlags.isSExt())
110 LocInfo = CCValAssign::SExt;
111 else if (ArgFlags.isZExt())
112 LocInfo = CCValAssign::ZExt;
113 else
114 LocInfo = CCValAssign::AExt;
115 }
116
117 if (LocVT == MVT::i32) {
118 if (ArgFlags.isSplit()) {
119 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().useSoftFloat()) {
120 if (!static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
121 if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
122 return false;
123 }
124 }
125 }
126 }
127
128 if (LocVT == MVT::i32) {
129 if (ArgFlags.isSplit()) {
130 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().useSoftFloat()) {
131 if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
132 return false;
133 }
134 }
135 }
136
137 if (LocVT == MVT::f64) {
138 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
139 if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
140 return false;
141 }
142 }
143
144 if (ArgFlags.isSplit()) {
145 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().useSoftFloat()) {
146 if (static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
147 if (CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
148 return false;
149 }
150 }
151 }
152
153 if (ArgFlags.isNest()) {
154 if (MCRegister Reg = State.AllocateReg(Reg: PPC::R11)) {
155 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
156 return false;
157 }
158 }
159
160 if (LocVT == MVT::i32) {
161 static const MCPhysReg RegList1[] = {
162 PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
163 };
164 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
165 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
166 return false;
167 }
168 }
169
170 if (LocVT == MVT::f64) {
171 if (ArgFlags.isSplit()) {
172 if (CC_PPC32_SVR4_Custom_AlignFPArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
173 return false;
174 }
175 }
176
177 if (LocVT == MVT::f32 ||
178 LocVT == MVT::f64) {
179 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
180 static const MCPhysReg RegList2[] = {
181 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
182 };
183 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
184 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
185 return false;
186 }
187 }
188 }
189
190 if (LocVT == MVT::f64) {
191 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
192 if (CC_PPC32_SPE_CustomSplitFP64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
193 return false;
194 }
195 }
196
197 if (LocVT == MVT::f32) {
198 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
199 static const MCPhysReg RegList3[] = {
200 PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
201 };
202 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
203 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
204 return false;
205 }
206 }
207 }
208
209 if (LocVT == MVT::i32) {
210 if (ArgFlags.isSplit()) {
211 int64_t Offset4 = State.AllocateStack(Size: 4, Alignment: Align(8));
212 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
213 return false;
214 }
215 }
216
217 if (LocVT == MVT::i32) {
218 int64_t Offset5 = State.AllocateStack(Size: 4, Alignment: Align(4));
219 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset5, LocVT, HTP: LocInfo));
220 return false;
221 }
222
223 if (LocVT == MVT::f32) {
224 int64_t Offset6 = State.AllocateStack(Size: 4, Alignment: Align(4));
225 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset6, LocVT, HTP: LocInfo));
226 return false;
227 }
228
229 if (LocVT == MVT::f64) {
230 int64_t Offset7 = State.AllocateStack(Size: 8, Alignment: Align(8));
231 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
232 return false;
233 }
234
235 if (LocVT == MVT::v16i8 ||
236 LocVT == MVT::v8i16 ||
237 LocVT == MVT::v4i32 ||
238 LocVT == MVT::v4f32 ||
239 LocVT == MVT::v2f64 ||
240 LocVT == MVT::v2i64) {
241 int64_t Offset8 = State.AllocateStack(Size: 16, Alignment: Align(16));
242 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
243 return false;
244 }
245
246 if (LocVT == MVT::f128) {
247 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
248 int64_t Offset9 = State.AllocateStack(Size: 16, Alignment: Align(16));
249 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset9, LocVT, HTP: LocInfo));
250 return false;
251 }
252 }
253
254 return true; // CC didn't match.
255}
256
257
258bool llvm::CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
259 MVT LocVT, CCValAssign::LocInfo LocInfo,
260 ISD::ArgFlagsTy ArgFlags, CCState &State) {
261
262 if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
263 return false;
264
265 return true; // CC didn't match.
266}
267
268
269static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
270 MVT LocVT, CCValAssign::LocInfo LocInfo,
271 ISD::ArgFlagsTy ArgFlags, CCState &State) {
272
273 if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
274 return false;
275
276 return true; // CC didn't match.
277}
278
279
280bool llvm::CC_PPC64_ELF(unsigned ValNo, MVT ValVT,
281 MVT LocVT, CCValAssign::LocInfo LocInfo,
282 ISD::ArgFlagsTy ArgFlags, CCState &State) {
283
284 if (State.getCallingConv() == CallingConv::AnyReg) {
285 if (!CC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
286 return false;
287 }
288
289 if (LocVT == MVT::i1) {
290 LocVT = MVT::i64;
291 if (ArgFlags.isSExt())
292 LocInfo = CCValAssign::SExt;
293 else if (ArgFlags.isZExt())
294 LocInfo = CCValAssign::ZExt;
295 else
296 LocInfo = CCValAssign::AExt;
297 }
298
299 if (LocVT == MVT::i8) {
300 LocVT = MVT::i64;
301 if (ArgFlags.isSExt())
302 LocInfo = CCValAssign::SExt;
303 else if (ArgFlags.isZExt())
304 LocInfo = CCValAssign::ZExt;
305 else
306 LocInfo = CCValAssign::AExt;
307 }
308
309 if (LocVT == MVT::i16) {
310 LocVT = MVT::i64;
311 if (ArgFlags.isSExt())
312 LocInfo = CCValAssign::SExt;
313 else if (ArgFlags.isZExt())
314 LocInfo = CCValAssign::ZExt;
315 else
316 LocInfo = CCValAssign::AExt;
317 }
318
319 if (LocVT == MVT::i32) {
320 LocVT = MVT::i64;
321 if (ArgFlags.isSExt())
322 LocInfo = CCValAssign::SExt;
323 else if (ArgFlags.isZExt())
324 LocInfo = CCValAssign::ZExt;
325 else
326 LocInfo = CCValAssign::AExt;
327 }
328
329 if (LocVT == MVT::i64) {
330 static const MCPhysReg RegList1[] = {
331 PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10
332 };
333 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
334 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
335 return false;
336 }
337 }
338
339 if (LocVT == MVT::f32 ||
340 LocVT == MVT::f64) {
341 if (!State.isVarArg()) {
342 if (CC_PPC64_ELF_Shadow_GPR_Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
343 return false;
344 }
345 }
346
347 if (LocVT == MVT::f32 ||
348 LocVT == MVT::f64) {
349 if (!State.isVarArg()) {
350 static const MCPhysReg RegList2[] = {
351 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13
352 };
353 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
354 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
355 return false;
356 }
357 }
358 }
359
360 if (LocVT == MVT::f128) {
361 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
362 if (!State.isVarArg()) {
363 if (CC_PPC64_ELF_Shadow_GPR_Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
364 return false;
365 }
366 }
367 }
368
369 if (LocVT == MVT::f128) {
370 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
371 if (!State.isVarArg()) {
372 static const MCPhysReg RegList3[] = {
373 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
374 };
375 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
376 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
377 return false;
378 }
379 }
380 }
381 }
382
383 if (LocVT == MVT::v16i8 ||
384 LocVT == MVT::v8i16 ||
385 LocVT == MVT::v4i32 ||
386 LocVT == MVT::v2i64 ||
387 LocVT == MVT::v4f32 ||
388 LocVT == MVT::v2f64 ||
389 LocVT == MVT::v1i128) {
390 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
391 if (!State.isVarArg()) {
392 if (CC_PPC64_ELF_Shadow_GPR_Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
393 return false;
394 }
395 }
396 }
397
398 if (LocVT == MVT::v16i8 ||
399 LocVT == MVT::v8i16 ||
400 LocVT == MVT::v4i32 ||
401 LocVT == MVT::v2i64 ||
402 LocVT == MVT::v4f32 ||
403 LocVT == MVT::v2f64 ||
404 LocVT == MVT::v1i128) {
405 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
406 if (!State.isVarArg()) {
407 static const MCPhysReg RegList4[] = {
408 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
409 };
410 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
411 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
412 return false;
413 }
414 }
415 }
416 }
417
418 return true; // CC didn't match.
419}
420
421
422bool llvm::CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
423 MVT LocVT, CCValAssign::LocInfo LocInfo,
424 ISD::ArgFlagsTy ArgFlags, CCState &State) {
425
426 if (State.getCallingConv() == CallingConv::AnyReg) {
427 if (!CC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
428 return false;
429 }
430
431 if (LocVT == MVT::i1) {
432 LocVT = MVT::i64;
433 if (ArgFlags.isSExt())
434 LocInfo = CCValAssign::SExt;
435 else if (ArgFlags.isZExt())
436 LocInfo = CCValAssign::ZExt;
437 else
438 LocInfo = CCValAssign::AExt;
439 }
440
441 if (LocVT == MVT::i8) {
442 LocVT = MVT::i64;
443 if (ArgFlags.isSExt())
444 LocInfo = CCValAssign::SExt;
445 else if (ArgFlags.isZExt())
446 LocInfo = CCValAssign::ZExt;
447 else
448 LocInfo = CCValAssign::AExt;
449 }
450
451 if (LocVT == MVT::i16) {
452 LocVT = MVT::i64;
453 if (ArgFlags.isSExt())
454 LocInfo = CCValAssign::SExt;
455 else if (ArgFlags.isZExt())
456 LocInfo = CCValAssign::ZExt;
457 else
458 LocInfo = CCValAssign::AExt;
459 }
460
461 if (LocVT == MVT::i32) {
462 LocVT = MVT::i64;
463 if (ArgFlags.isSExt())
464 LocInfo = CCValAssign::SExt;
465 else if (ArgFlags.isZExt())
466 LocInfo = CCValAssign::ZExt;
467 else
468 LocInfo = CCValAssign::AExt;
469 }
470
471 if (LocVT == MVT::i64) {
472 static const MCPhysReg RegList1[] = {
473 PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10
474 };
475 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
476 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
477 return false;
478 }
479 }
480
481 if (LocVT == MVT::f32 ||
482 LocVT == MVT::f64) {
483 static const MCPhysReg RegList2[] = {
484 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
485 };
486 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
487 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
488 return false;
489 }
490 }
491
492 return true; // CC didn't match.
493}
494
495
496bool llvm::RetCC_PPC(unsigned ValNo, MVT ValVT,
497 MVT LocVT, CCValAssign::LocInfo LocInfo,
498 ISD::ArgFlagsTy ArgFlags, CCState &State) {
499
500 if (State.getCallingConv() == CallingConv::AnyReg) {
501 if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
502 return false;
503 }
504
505 if (LocVT == MVT::i32 ||
506 LocVT == MVT::i1) {
507 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().isPPC64()) {
508 LocVT = MVT::i64;
509 if (ArgFlags.isSExt())
510 LocInfo = CCValAssign::SExt;
511 else if (ArgFlags.isZExt())
512 LocInfo = CCValAssign::ZExt;
513 else
514 LocInfo = CCValAssign::AExt;
515 }
516 }
517
518 if (LocVT == MVT::i1) {
519 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().isPPC64()) {
520 LocVT = MVT::i32;
521 if (ArgFlags.isSExt())
522 LocInfo = CCValAssign::SExt;
523 else if (ArgFlags.isZExt())
524 LocInfo = CCValAssign::ZExt;
525 else
526 LocInfo = CCValAssign::AExt;
527 }
528 }
529
530 if (LocVT == MVT::i32) {
531 static const MCPhysReg RegList1[] = {
532 PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
533 };
534 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
535 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
536 return false;
537 }
538 }
539
540 if (LocVT == MVT::i64) {
541 static const MCPhysReg RegList2[] = {
542 PPC::X3, PPC::X4, PPC::X5, PPC::X6
543 };
544 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
545 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
546 return false;
547 }
548 }
549
550 if (LocVT == MVT::i128) {
551 static const MCPhysReg RegList3[] = {
552 PPC::X3, PPC::X4, PPC::X5, PPC::X6
553 };
554 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
555 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
556 return false;
557 }
558 }
559
560 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
561 if (LocVT == MVT::f32) {
562 static const MCPhysReg RegList4[] = {
563 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
564 };
565 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
566 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
567 return false;
568 }
569 }
570 }
571
572 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
573 if (LocVT == MVT::f64) {
574 static const MCPhysReg RegList5[] = {
575 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
576 };
577 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
578 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
579 return false;
580 }
581 }
582 }
583
584 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
585 if (LocVT == MVT::f32) {
586 static const MCPhysReg RegList6[] = {
587 PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
588 };
589 if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) {
590 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
591 return false;
592 }
593 }
594 }
595
596 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasSPE()) {
597 if (LocVT == MVT::f64) {
598 if (CC_PPC32_SPE_RetF64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
599 return false;
600 }
601 }
602
603 if (LocVT == MVT::f128) {
604 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
605 static const MCPhysReg RegList7[] = {
606 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
607 };
608 if (MCRegister Reg = State.AllocateReg(Regs: RegList7)) {
609 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
610 return false;
611 }
612 }
613 }
614
615 if (LocVT == MVT::v16i8 ||
616 LocVT == MVT::v8i16 ||
617 LocVT == MVT::v4i32 ||
618 LocVT == MVT::v2i64 ||
619 LocVT == MVT::v1i128 ||
620 LocVT == MVT::v4f32 ||
621 LocVT == MVT::v2f64) {
622 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
623 static const MCPhysReg RegList8[] = {
624 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
625 };
626 if (MCRegister Reg = State.AllocateReg(Regs: RegList8)) {
627 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
628 return false;
629 }
630 }
631 }
632
633 return true; // CC didn't match.
634}
635
636
637static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
638 MVT LocVT, CCValAssign::LocInfo LocInfo,
639 ISD::ArgFlagsTy ArgFlags, CCState &State) {
640
641 if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
642 return false;
643
644 return true; // CC didn't match.
645}
646
647
648bool llvm::RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
649 MVT LocVT, CCValAssign::LocInfo LocInfo,
650 ISD::ArgFlagsTy ArgFlags, CCState &State) {
651
652 if (State.getCallingConv() == CallingConv::AnyReg) {
653 if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
654 return false;
655 }
656
657 if (LocVT == MVT::i1) {
658 LocVT = MVT::i64;
659 if (ArgFlags.isSExt())
660 LocInfo = CCValAssign::SExt;
661 else if (ArgFlags.isZExt())
662 LocInfo = CCValAssign::ZExt;
663 else
664 LocInfo = CCValAssign::AExt;
665 }
666
667 if (LocVT == MVT::i8) {
668 LocVT = MVT::i64;
669 if (ArgFlags.isSExt())
670 LocInfo = CCValAssign::SExt;
671 else if (ArgFlags.isZExt())
672 LocInfo = CCValAssign::ZExt;
673 else
674 LocInfo = CCValAssign::AExt;
675 }
676
677 if (LocVT == MVT::i16) {
678 LocVT = MVT::i64;
679 if (ArgFlags.isSExt())
680 LocInfo = CCValAssign::SExt;
681 else if (ArgFlags.isZExt())
682 LocInfo = CCValAssign::ZExt;
683 else
684 LocInfo = CCValAssign::AExt;
685 }
686
687 if (LocVT == MVT::i32) {
688 LocVT = MVT::i64;
689 if (ArgFlags.isSExt())
690 LocInfo = CCValAssign::SExt;
691 else if (ArgFlags.isZExt())
692 LocInfo = CCValAssign::ZExt;
693 else
694 LocInfo = CCValAssign::AExt;
695 }
696
697 if (LocVT == MVT::i64) {
698 static const MCPhysReg RegList1[] = {
699 PPC::X3, PPC::X4, PPC::X5, PPC::X6
700 };
701 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
702 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
703 return false;
704 }
705 }
706
707 if (LocVT == MVT::i128) {
708 static const MCPhysReg RegList2[] = {
709 PPC::X3, PPC::X4, PPC::X5, PPC::X6
710 };
711 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
712 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
713 return false;
714 }
715 }
716
717 if (LocVT == MVT::f32) {
718 static const MCPhysReg RegList3[] = {
719 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
720 };
721 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
722 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
723 return false;
724 }
725 }
726
727 if (LocVT == MVT::f64) {
728 static const MCPhysReg RegList4[] = {
729 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
730 };
731 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
732 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
733 return false;
734 }
735 }
736
737 if (LocVT == MVT::f128) {
738 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
739 static const MCPhysReg RegList5[] = {
740 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
741 };
742 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
743 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
744 return false;
745 }
746 }
747 }
748
749 if (LocVT == MVT::v16i8 ||
750 LocVT == MVT::v8i16 ||
751 LocVT == MVT::v4i32 ||
752 LocVT == MVT::v2i64 ||
753 LocVT == MVT::v1i128 ||
754 LocVT == MVT::v4f32 ||
755 LocVT == MVT::v2f64) {
756 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
757 static const MCPhysReg RegList6[] = {
758 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
759 };
760 if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) {
761 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
762 return false;
763 }
764 }
765 }
766
767 return true; // CC didn't match.
768}
769
770
771bool llvm::RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
772 MVT LocVT, CCValAssign::LocInfo LocInfo,
773 ISD::ArgFlagsTy ArgFlags, CCState &State) {
774
775 if (LocVT == MVT::i32 ||
776 LocVT == MVT::i1) {
777 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().isPPC64()) {
778 LocVT = MVT::i64;
779 if (ArgFlags.isSExt())
780 LocInfo = CCValAssign::SExt;
781 else if (ArgFlags.isZExt())
782 LocInfo = CCValAssign::ZExt;
783 else
784 LocInfo = CCValAssign::AExt;
785 }
786 }
787
788 if (LocVT == MVT::i1) {
789 if (!State.getMachineFunction().getSubtarget<PPCSubtarget>().isPPC64()) {
790 LocVT = MVT::i32;
791 if (ArgFlags.isSExt())
792 LocInfo = CCValAssign::SExt;
793 else if (ArgFlags.isZExt())
794 LocInfo = CCValAssign::ZExt;
795 else
796 LocInfo = CCValAssign::AExt;
797 }
798 }
799
800 if (LocVT == MVT::i32) {
801 if (MCRegister Reg = State.AllocateReg(Reg: PPC::R3)) {
802 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
803 return false;
804 }
805 }
806
807 if (LocVT == MVT::i64) {
808 if (MCRegister Reg = State.AllocateReg(Reg: PPC::X3)) {
809 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
810 return false;
811 }
812 }
813
814 if (LocVT == MVT::i128) {
815 if (MCRegister Reg = State.AllocateReg(Reg: PPC::X3)) {
816 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
817 return false;
818 }
819 }
820
821 if (LocVT == MVT::f32) {
822 if (MCRegister Reg = State.AllocateReg(Reg: PPC::F1)) {
823 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
824 return false;
825 }
826 }
827
828 if (LocVT == MVT::f64) {
829 if (MCRegister Reg = State.AllocateReg(Reg: PPC::F1)) {
830 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
831 return false;
832 }
833 }
834
835 if (LocVT == MVT::f128) {
836 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
837 if (MCRegister Reg = State.AllocateReg(Reg: PPC::V2)) {
838 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
839 return false;
840 }
841 }
842 }
843
844 if (LocVT == MVT::v16i8 ||
845 LocVT == MVT::v8i16 ||
846 LocVT == MVT::v4i32 ||
847 LocVT == MVT::v2i64 ||
848 LocVT == MVT::v1i128 ||
849 LocVT == MVT::v4f32 ||
850 LocVT == MVT::v2f64) {
851 if (State.getMachineFunction().getSubtarget<PPCSubtarget>().hasAltivec()) {
852 if (MCRegister Reg = State.AllocateReg(Reg: PPC::V2)) {
853 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
854 return false;
855 }
856 }
857 }
858
859 return true; // CC didn't match.
860}
861
862#else
863
864const MCRegister CC_PPC32_SVR4_ArgRegs[] = { PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9 };
865const MCRegister CC_PPC32_SVR4_ByVal_ArgRegs[] = { 0 };
866const MCRegister CC_PPC32_SVR4_Common_ArgRegs[] = { PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::R10, PPC::R11, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9 };
867const MCRegister CC_PPC32_SVR4_VarArg_ArgRegs[] = { 0 };
868const MCRegister CC_PPC64_AnyReg_ArgRegs[] = { 0 };
869const MCRegister CC_PPC64_ELF_ArgRegs[] = { PPC::F1, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::X10, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9 };
870const MCRegister CC_PPC64_ELF_FIS_ArgRegs[] = { PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::X10, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9 };
871const MCRegister RetCC_PPC_ArgRegs[] = { PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::R10, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::X3, PPC::X4, PPC::X5, PPC::X6 };
872const MCRegister RetCC_PPC64_AnyReg_ArgRegs[] = { 0 };
873const MCRegister RetCC_PPC64_ELF_FIS_ArgRegs[] = { PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::X3, PPC::X4, PPC::X5, PPC::X6 };
874const MCRegister RetCC_PPC_Cold_ArgRegs[] = { PPC::F1, PPC::R3, PPC::V2, PPC::X3 };
875
876#endif // CC_REGISTER_LIST
877