1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABSW = ISD::BUILTIN_OP_END,
17 ADD_LO,
18 ADD_TPREL,
19 ADD_VL,
20 AND_VL,
21 AVGCEILS_VL,
22 AVGCEILU_VL,
23 AVGFLOORS_VL,
24 AVGFLOORU_VL,
25 BITREVERSE_VL,
26 BREV8,
27 BR_CC,
28 BSWAP_VL,
29 BuildGPRPair,
30 BuildPairF64,
31 CALL,
32 CLMUL,
33 CLMULH,
34 CLMULR,
35 CLZW,
36 CTLZ_VL,
37 CTPOP_VL,
38 CTTZ_VL,
39 CTZW,
40 CZERO_EQZ,
41 CZERO_NEZ,
42 DIVUW,
43 DIVW,
44 FABS_VL,
45 FADD_VL,
46 FCLASS,
47 FCLASS_VL,
48 FCOPYSIGN_VL,
49 FCVT_WU_RV64,
50 FCVT_W_RV64,
51 FCVT_X,
52 FCVT_XU,
53 FDIV_VL,
54 FLI,
55 FMAX,
56 FMIN,
57 FMUL_VL,
58 FMV_H_X,
59 FMV_W_X_RV64,
60 FMV_X_ANYEXTH,
61 FMV_X_ANYEXTW_RV64,
62 FMV_X_SIGNEXTH,
63 FNEG_VL,
64 FP_EXTEND_VL,
65 FP_ROUND_VL,
66 FROUND,
67 FSGNJX,
68 FSQRT_VL,
69 FSUB_VL,
70 HI,
71 LD_RV32,
72 LLA,
73 MOPR,
74 MOPRR,
75 MRET_GLUE,
76 MULHSU,
77 MULHS_VL,
78 MULHU_VL,
79 MUL_VL,
80 ORC_B,
81 OR_VL,
82 PROBED_ALLOCA,
83 QC_C_MILEAVERET_GLUE,
84 READ_COUNTER_WIDE,
85 READ_CSR,
86 READ_VLENB,
87 REMUW,
88 RET_GLUE,
89 RI_VEXTRACT,
90 RI_VINSERT_VL,
91 RI_VUNZIP2A_VL,
92 RI_VUNZIP2B_VL,
93 RI_VZIP2A_VL,
94 RI_VZIP2B_VL,
95 RI_VZIPEVEN_VL,
96 RI_VZIPODD_VL,
97 ROLW,
98 RORW,
99 ROTL_VL,
100 ROTR_VL,
101 SADDSAT_VL,
102 SDIV_VL,
103 SD_RV32,
104 SELECT_CC,
105 SETCC_VL,
106 SF_VC_FVV_SE,
107 SF_VC_FVW_SE,
108 SF_VC_FV_SE,
109 SF_VC_IVV_SE,
110 SF_VC_IVW_SE,
111 SF_VC_IV_SE,
112 SF_VC_VVV_SE,
113 SF_VC_VVW_SE,
114 SF_VC_VV_SE,
115 SF_VC_V_FVV_SE,
116 SF_VC_V_FVW_SE,
117 SF_VC_V_FV_SE,
118 SF_VC_V_IVV_SE,
119 SF_VC_V_IVW_SE,
120 SF_VC_V_IV_SE,
121 SF_VC_V_I_SE,
122 SF_VC_V_VVV_SE,
123 SF_VC_V_VVW_SE,
124 SF_VC_V_VV_SE,
125 SF_VC_V_XVV_SE,
126 SF_VC_V_XVW_SE,
127 SF_VC_V_XV_SE,
128 SF_VC_V_X_SE,
129 SF_VC_XVV_SE,
130 SF_VC_XVW_SE,
131 SF_VC_XV_SE,
132 SHA256SIG0,
133 SHA256SIG1,
134 SHA256SUM0,
135 SHA256SUM1,
136 SHL_ADD,
137 SHL_VL,
138 SINT_TO_FP_VL,
139 SLLW,
140 SM3P0,
141 SM3P1,
142 SM4ED,
143 SM4KS,
144 SMAX_VL,
145 SMIN_VL,
146 SPLAT_VECTOR_SPLIT_I64_VL,
147 SRAW,
148 SRA_VL,
149 SREM_VL,
150 SRET_GLUE,
151 SRLW,
152 SRL_VL,
153 SSUBSAT_VL,
154 STRICT_FADD_VL,
155 STRICT_FCVT_WU_RV64,
156 STRICT_FCVT_W_RV64,
157 STRICT_FDIV_VL,
158 STRICT_FMUL_VL,
159 STRICT_FP_EXTEND_VL,
160 STRICT_FP_ROUND_VL,
161 STRICT_FSETCCS_VL,
162 STRICT_FSETCC_VL,
163 STRICT_FSQRT_VL,
164 STRICT_FSUB_VL,
165 STRICT_SINT_TO_FP_VL,
166 STRICT_UINT_TO_FP_VL,
167 STRICT_VFCVT_RM_X_F_VL,
168 STRICT_VFCVT_RTZ_XU_F_VL,
169 STRICT_VFCVT_RTZ_X_F_VL,
170 STRICT_VFMADD_VL,
171 STRICT_VFMSUB_VL,
172 STRICT_VFNCVT_ROD_VL,
173 STRICT_VFNMADD_VL,
174 STRICT_VFNMSUB_VL,
175 STRICT_VFROUND_NOEXCEPT_VL,
176 SUB_VL,
177 SWAP_CSR,
178 SW_GUARDED_BRIND,
179 SW_GUARDED_CALL,
180 SW_GUARDED_TAIL,
181 SplitF64,
182 SplitGPRPair,
183 TAIL,
184 TH_LDD,
185 TH_LWD,
186 TH_LWUD,
187 TH_SDD,
188 TH_SWD,
189 TRUNCATE_VECTOR_VL,
190 TRUNCATE_VECTOR_VL_SSAT,
191 TRUNCATE_VECTOR_VL_USAT,
192 TUPLE_EXTRACT,
193 TUPLE_INSERT,
194 UADDSAT_VL,
195 UDIV_VL,
196 UINT_TO_FP_VL,
197 UMAX_VL,
198 UMIN_VL,
199 UNZIP,
200 UREM_VL,
201 USUBSAT_VL,
202 VCPOP_VL,
203 VECREDUCE_ADD_VL,
204 VECREDUCE_AND_VL,
205 VECREDUCE_FADD_VL,
206 VECREDUCE_FMAX_VL,
207 VECREDUCE_FMIN_VL,
208 VECREDUCE_OR_VL,
209 VECREDUCE_SEQ_FADD_VL,
210 VECREDUCE_SMAX_VL,
211 VECREDUCE_SMIN_VL,
212 VECREDUCE_UMAX_VL,
213 VECREDUCE_UMIN_VL,
214 VECREDUCE_XOR_VL,
215 VFCVT_RM_F_XU_VL,
216 VFCVT_RM_F_X_VL,
217 VFCVT_RM_XU_F_VL,
218 VFCVT_RM_X_F_VL,
219 VFCVT_RTZ_XU_F_VL,
220 VFCVT_RTZ_X_F_VL,
221 VFIRST_VL,
222 VFMADD_VL,
223 VFMAX_VL,
224 VFMIN_VL,
225 VFMSUB_VL,
226 VFMV_S_F_VL,
227 VFMV_V_F_VL,
228 VFNCVT_ROD_VL,
229 VFNMADD_VL,
230 VFNMSUB_VL,
231 VFROUND_NOEXCEPT_VL,
232 VFSLIDE1DOWN_VL,
233 VFSLIDE1UP_VL,
234 VFWADD_VL,
235 VFWADD_W_VL,
236 VFWMADD_VL,
237 VFWMSUB_VL,
238 VFWMUL_VL,
239 VFWNMADD_VL,
240 VFWNMSUB_VL,
241 VFWSUB_VL,
242 VFWSUB_W_VL,
243 VID_VL,
244 VMAND_VL,
245 VMCLR_VL,
246 VMERGE_VL,
247 VMOR_VL,
248 VMSET_VL,
249 VMV_S_X_VL,
250 VMV_V_V_VL,
251 VMV_V_X_VL,
252 VMV_X_S,
253 VMXOR_VL,
254 VQDOTSU_VL,
255 VQDOTU_VL,
256 VQDOT_VL,
257 VRGATHEREI16_VV_VL,
258 VRGATHER_VV_VL,
259 VRGATHER_VX_VL,
260 VSEXT_VL,
261 VSLIDE1DOWN_VL,
262 VSLIDE1UP_VL,
263 VSLIDEDOWN_VL,
264 VSLIDEUP_VL,
265 VWADDU_VL,
266 VWADDU_W_VL,
267 VWADD_VL,
268 VWADD_W_VL,
269 VWMACCSU_VL,
270 VWMACCU_VL,
271 VWMACC_VL,
272 VWMULSU_VL,
273 VWMULU_VL,
274 VWMUL_VL,
275 VWSLL_VL,
276 VWSUBU_VL,
277 VWSUBU_W_VL,
278 VWSUB_VL,
279 VWSUB_W_VL,
280 VZEXT_VL,
281 WRITE_CSR,
282 XOR_VL,
283 ZIP,
284};
285
286static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
287
288} // namespace llvm::RISCVISD
289
290#endif // GET_SDNODE_ENUM
291
292#ifdef GET_SDNODE_DESC
293#undef GET_SDNODE_DESC
294
295namespace llvm {
296
297#ifdef __GNUC__
298#pragma GCC diagnostic push
299#pragma GCC diagnostic ignored "-Woverlength-strings"
300#endif
301static constexpr char RISCVSDNodeNamesStorage[] =
302 "\0"
303 "RISCVISD::ABSW\0"
304 "RISCVISD::ADD_LO\0"
305 "RISCVISD::ADD_TPREL\0"
306 "RISCVISD::ADD_VL\0"
307 "RISCVISD::AND_VL\0"
308 "RISCVISD::AVGCEILS_VL\0"
309 "RISCVISD::AVGCEILU_VL\0"
310 "RISCVISD::AVGFLOORS_VL\0"
311 "RISCVISD::AVGFLOORU_VL\0"
312 "RISCVISD::BITREVERSE_VL\0"
313 "RISCVISD::BREV8\0"
314 "RISCVISD::BR_CC\0"
315 "RISCVISD::BSWAP_VL\0"
316 "RISCVISD::BuildGPRPair\0"
317 "RISCVISD::BuildPairF64\0"
318 "RISCVISD::CALL\0"
319 "RISCVISD::CLMUL\0"
320 "RISCVISD::CLMULH\0"
321 "RISCVISD::CLMULR\0"
322 "RISCVISD::CLZW\0"
323 "RISCVISD::CTLZ_VL\0"
324 "RISCVISD::CTPOP_VL\0"
325 "RISCVISD::CTTZ_VL\0"
326 "RISCVISD::CTZW\0"
327 "RISCVISD::CZERO_EQZ\0"
328 "RISCVISD::CZERO_NEZ\0"
329 "RISCVISD::DIVUW\0"
330 "RISCVISD::DIVW\0"
331 "RISCVISD::FABS_VL\0"
332 "RISCVISD::FADD_VL\0"
333 "RISCVISD::FCLASS\0"
334 "RISCVISD::FCLASS_VL\0"
335 "RISCVISD::FCOPYSIGN_VL\0"
336 "RISCVISD::FCVT_WU_RV64\0"
337 "RISCVISD::FCVT_W_RV64\0"
338 "RISCVISD::FCVT_X\0"
339 "RISCVISD::FCVT_XU\0"
340 "RISCVISD::FDIV_VL\0"
341 "RISCVISD::FLI\0"
342 "RISCVISD::FMAX\0"
343 "RISCVISD::FMIN\0"
344 "RISCVISD::FMUL_VL\0"
345 "RISCVISD::FMV_H_X\0"
346 "RISCVISD::FMV_W_X_RV64\0"
347 "RISCVISD::FMV_X_ANYEXTH\0"
348 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
349 "RISCVISD::FMV_X_SIGNEXTH\0"
350 "RISCVISD::FNEG_VL\0"
351 "RISCVISD::FP_EXTEND_VL\0"
352 "RISCVISD::FP_ROUND_VL\0"
353 "RISCVISD::FROUND\0"
354 "RISCVISD::FSGNJX\0"
355 "RISCVISD::FSQRT_VL\0"
356 "RISCVISD::FSUB_VL\0"
357 "RISCVISD::HI\0"
358 "RISCVISD::LD_RV32\0"
359 "RISCVISD::LLA\0"
360 "RISCVISD::MOPR\0"
361 "RISCVISD::MOPRR\0"
362 "RISCVISD::MRET_GLUE\0"
363 "RISCVISD::MULHSU\0"
364 "RISCVISD::MULHS_VL\0"
365 "RISCVISD::MULHU_VL\0"
366 "RISCVISD::MUL_VL\0"
367 "RISCVISD::ORC_B\0"
368 "RISCVISD::OR_VL\0"
369 "RISCVISD::PROBED_ALLOCA\0"
370 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
371 "RISCVISD::READ_COUNTER_WIDE\0"
372 "RISCVISD::READ_CSR\0"
373 "RISCVISD::READ_VLENB\0"
374 "RISCVISD::REMUW\0"
375 "RISCVISD::RET_GLUE\0"
376 "RISCVISD::RI_VEXTRACT\0"
377 "RISCVISD::RI_VINSERT_VL\0"
378 "RISCVISD::RI_VUNZIP2A_VL\0"
379 "RISCVISD::RI_VUNZIP2B_VL\0"
380 "RISCVISD::RI_VZIP2A_VL\0"
381 "RISCVISD::RI_VZIP2B_VL\0"
382 "RISCVISD::RI_VZIPEVEN_VL\0"
383 "RISCVISD::RI_VZIPODD_VL\0"
384 "RISCVISD::ROLW\0"
385 "RISCVISD::RORW\0"
386 "RISCVISD::ROTL_VL\0"
387 "RISCVISD::ROTR_VL\0"
388 "RISCVISD::SADDSAT_VL\0"
389 "RISCVISD::SDIV_VL\0"
390 "RISCVISD::SD_RV32\0"
391 "RISCVISD::SELECT_CC\0"
392 "RISCVISD::SETCC_VL\0"
393 "RISCVISD::SF_VC_FVV_SE\0"
394 "RISCVISD::SF_VC_FVW_SE\0"
395 "RISCVISD::SF_VC_FV_SE\0"
396 "RISCVISD::SF_VC_IVV_SE\0"
397 "RISCVISD::SF_VC_IVW_SE\0"
398 "RISCVISD::SF_VC_IV_SE\0"
399 "RISCVISD::SF_VC_VVV_SE\0"
400 "RISCVISD::SF_VC_VVW_SE\0"
401 "RISCVISD::SF_VC_VV_SE\0"
402 "RISCVISD::SF_VC_V_FVV_SE\0"
403 "RISCVISD::SF_VC_V_FVW_SE\0"
404 "RISCVISD::SF_VC_V_FV_SE\0"
405 "RISCVISD::SF_VC_V_IVV_SE\0"
406 "RISCVISD::SF_VC_V_IVW_SE\0"
407 "RISCVISD::SF_VC_V_IV_SE\0"
408 "RISCVISD::SF_VC_V_I_SE\0"
409 "RISCVISD::SF_VC_V_VVV_SE\0"
410 "RISCVISD::SF_VC_V_VVW_SE\0"
411 "RISCVISD::SF_VC_V_VV_SE\0"
412 "RISCVISD::SF_VC_V_XVV_SE\0"
413 "RISCVISD::SF_VC_V_XVW_SE\0"
414 "RISCVISD::SF_VC_V_XV_SE\0"
415 "RISCVISD::SF_VC_V_X_SE\0"
416 "RISCVISD::SF_VC_XVV_SE\0"
417 "RISCVISD::SF_VC_XVW_SE\0"
418 "RISCVISD::SF_VC_XV_SE\0"
419 "RISCVISD::SHA256SIG0\0"
420 "RISCVISD::SHA256SIG1\0"
421 "RISCVISD::SHA256SUM0\0"
422 "RISCVISD::SHA256SUM1\0"
423 "RISCVISD::SHL_ADD\0"
424 "RISCVISD::SHL_VL\0"
425 "RISCVISD::SINT_TO_FP_VL\0"
426 "RISCVISD::SLLW\0"
427 "RISCVISD::SM3P0\0"
428 "RISCVISD::SM3P1\0"
429 "RISCVISD::SM4ED\0"
430 "RISCVISD::SM4KS\0"
431 "RISCVISD::SMAX_VL\0"
432 "RISCVISD::SMIN_VL\0"
433 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
434 "RISCVISD::SRAW\0"
435 "RISCVISD::SRA_VL\0"
436 "RISCVISD::SREM_VL\0"
437 "RISCVISD::SRET_GLUE\0"
438 "RISCVISD::SRLW\0"
439 "RISCVISD::SRL_VL\0"
440 "RISCVISD::SSUBSAT_VL\0"
441 "RISCVISD::STRICT_FADD_VL\0"
442 "RISCVISD::STRICT_FCVT_WU_RV64\0"
443 "RISCVISD::STRICT_FCVT_W_RV64\0"
444 "RISCVISD::STRICT_FDIV_VL\0"
445 "RISCVISD::STRICT_FMUL_VL\0"
446 "RISCVISD::STRICT_FP_EXTEND_VL\0"
447 "RISCVISD::STRICT_FP_ROUND_VL\0"
448 "RISCVISD::STRICT_FSETCCS_VL\0"
449 "RISCVISD::STRICT_FSETCC_VL\0"
450 "RISCVISD::STRICT_FSQRT_VL\0"
451 "RISCVISD::STRICT_FSUB_VL\0"
452 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
453 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
454 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
455 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
456 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
457 "RISCVISD::STRICT_VFMADD_VL\0"
458 "RISCVISD::STRICT_VFMSUB_VL\0"
459 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
460 "RISCVISD::STRICT_VFNMADD_VL\0"
461 "RISCVISD::STRICT_VFNMSUB_VL\0"
462 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
463 "RISCVISD::SUB_VL\0"
464 "RISCVISD::SWAP_CSR\0"
465 "RISCVISD::SW_GUARDED_BRIND\0"
466 "RISCVISD::SW_GUARDED_CALL\0"
467 "RISCVISD::SW_GUARDED_TAIL\0"
468 "RISCVISD::SplitF64\0"
469 "RISCVISD::SplitGPRPair\0"
470 "RISCVISD::TAIL\0"
471 "RISCVISD::TH_LDD\0"
472 "RISCVISD::TH_LWD\0"
473 "RISCVISD::TH_LWUD\0"
474 "RISCVISD::TH_SDD\0"
475 "RISCVISD::TH_SWD\0"
476 "RISCVISD::TRUNCATE_VECTOR_VL\0"
477 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
478 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
479 "RISCVISD::TUPLE_EXTRACT\0"
480 "RISCVISD::TUPLE_INSERT\0"
481 "RISCVISD::UADDSAT_VL\0"
482 "RISCVISD::UDIV_VL\0"
483 "RISCVISD::UINT_TO_FP_VL\0"
484 "RISCVISD::UMAX_VL\0"
485 "RISCVISD::UMIN_VL\0"
486 "RISCVISD::UNZIP\0"
487 "RISCVISD::UREM_VL\0"
488 "RISCVISD::USUBSAT_VL\0"
489 "RISCVISD::VCPOP_VL\0"
490 "RISCVISD::VECREDUCE_ADD_VL\0"
491 "RISCVISD::VECREDUCE_AND_VL\0"
492 "RISCVISD::VECREDUCE_FADD_VL\0"
493 "RISCVISD::VECREDUCE_FMAX_VL\0"
494 "RISCVISD::VECREDUCE_FMIN_VL\0"
495 "RISCVISD::VECREDUCE_OR_VL\0"
496 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
497 "RISCVISD::VECREDUCE_SMAX_VL\0"
498 "RISCVISD::VECREDUCE_SMIN_VL\0"
499 "RISCVISD::VECREDUCE_UMAX_VL\0"
500 "RISCVISD::VECREDUCE_UMIN_VL\0"
501 "RISCVISD::VECREDUCE_XOR_VL\0"
502 "RISCVISD::VFCVT_RM_F_XU_VL\0"
503 "RISCVISD::VFCVT_RM_F_X_VL\0"
504 "RISCVISD::VFCVT_RM_XU_F_VL\0"
505 "RISCVISD::VFCVT_RM_X_F_VL\0"
506 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
507 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
508 "RISCVISD::VFIRST_VL\0"
509 "RISCVISD::VFMADD_VL\0"
510 "RISCVISD::VFMAX_VL\0"
511 "RISCVISD::VFMIN_VL\0"
512 "RISCVISD::VFMSUB_VL\0"
513 "RISCVISD::VFMV_S_F_VL\0"
514 "RISCVISD::VFMV_V_F_VL\0"
515 "RISCVISD::VFNCVT_ROD_VL\0"
516 "RISCVISD::VFNMADD_VL\0"
517 "RISCVISD::VFNMSUB_VL\0"
518 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
519 "RISCVISD::VFSLIDE1DOWN_VL\0"
520 "RISCVISD::VFSLIDE1UP_VL\0"
521 "RISCVISD::VFWADD_VL\0"
522 "RISCVISD::VFWADD_W_VL\0"
523 "RISCVISD::VFWMADD_VL\0"
524 "RISCVISD::VFWMSUB_VL\0"
525 "RISCVISD::VFWMUL_VL\0"
526 "RISCVISD::VFWNMADD_VL\0"
527 "RISCVISD::VFWNMSUB_VL\0"
528 "RISCVISD::VFWSUB_VL\0"
529 "RISCVISD::VFWSUB_W_VL\0"
530 "RISCVISD::VID_VL\0"
531 "RISCVISD::VMAND_VL\0"
532 "RISCVISD::VMCLR_VL\0"
533 "RISCVISD::VMERGE_VL\0"
534 "RISCVISD::VMOR_VL\0"
535 "RISCVISD::VMSET_VL\0"
536 "RISCVISD::VMV_S_X_VL\0"
537 "RISCVISD::VMV_V_V_VL\0"
538 "RISCVISD::VMV_V_X_VL\0"
539 "RISCVISD::VMV_X_S\0"
540 "RISCVISD::VMXOR_VL\0"
541 "RISCVISD::VQDOTSU_VL\0"
542 "RISCVISD::VQDOTU_VL\0"
543 "RISCVISD::VQDOT_VL\0"
544 "RISCVISD::VRGATHEREI16_VV_VL\0"
545 "RISCVISD::VRGATHER_VV_VL\0"
546 "RISCVISD::VRGATHER_VX_VL\0"
547 "RISCVISD::VSEXT_VL\0"
548 "RISCVISD::VSLIDE1DOWN_VL\0"
549 "RISCVISD::VSLIDE1UP_VL\0"
550 "RISCVISD::VSLIDEDOWN_VL\0"
551 "RISCVISD::VSLIDEUP_VL\0"
552 "RISCVISD::VWADDU_VL\0"
553 "RISCVISD::VWADDU_W_VL\0"
554 "RISCVISD::VWADD_VL\0"
555 "RISCVISD::VWADD_W_VL\0"
556 "RISCVISD::VWMACCSU_VL\0"
557 "RISCVISD::VWMACCU_VL\0"
558 "RISCVISD::VWMACC_VL\0"
559 "RISCVISD::VWMULSU_VL\0"
560 "RISCVISD::VWMULU_VL\0"
561 "RISCVISD::VWMUL_VL\0"
562 "RISCVISD::VWSLL_VL\0"
563 "RISCVISD::VWSUBU_VL\0"
564 "RISCVISD::VWSUBU_W_VL\0"
565 "RISCVISD::VWSUB_VL\0"
566 "RISCVISD::VWSUB_W_VL\0"
567 "RISCVISD::VZEXT_VL\0"
568 "RISCVISD::WRITE_CSR\0"
569 "RISCVISD::XOR_VL\0"
570 "RISCVISD::ZIP\0"
571 ;
572#ifdef __GNUC__
573#pragma GCC diagnostic pop
574#endif
575
576static constexpr llvm::StringTable RISCVSDNodeNames =
577 RISCVSDNodeNamesStorage;
578
579static const SDTypeConstraint RISCVSDTypeConstraints[] = {
580 /* 0 */ {SDTCisVT, 2, 0, MVT::f64}, {SDTCisVT, 1, 0, MVT::i32}, {SDTCisVT, 0, 0, MVT::i32},
581 /* 3 */ {SDTCisPtrTy, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::i32}, {SDTCisVT, 0, 0, MVT::i32},
582 /* 6 */ {SDTCisInt, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::i32}, {SDTCisVT, 0, 0, MVT::i32},
583 /* 10 */ {SDTCisVT, 3, 0, MVT::i32}, {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
584 /* 14 */ {SDTCisVT, 2, 0, MVT::Untyped}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
585 /* 17 */ {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
586 /* 20 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
587 /* 26 */ {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
588 /* 30 */ {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
589 /* 34 */ {SDTCisVT, 1, 0, MVT::f32}, {SDTCisVT, 0, 0, MVT::i64},
590 /* 36 */ {SDTCisVT, 2, 0, MVT::i64}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::i64},
591 /* 39 */ {SDTCisVT, 1, 0, MVT::i64}, {SDTCisVT, 0, 0, MVT::f32},
592 /* 41 */ {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::i32}, {SDTCisVT, 0, 0, MVT::f64},
593 /* 44 */ {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, MVT::Untyped},
594 /* 47 */ {SDTCisPtrTy, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
595 /* 48 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
596 /* 57 */ {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
597 /* 61 */ {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
598 /* 64 */ {SDTCisVT, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
599 /* 71 */ {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
600 /* 74 */ {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
601 /* 78 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
602 /* 82 */ {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
603 /* 84 */ {SDTCisVT, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
604 /* 91 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
605 /* 98 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
606 /* 105 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
607 /* 110 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
608 /* 120 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
609 /* 130 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
610 /* 140 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisEltOfVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
611 /* 145 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
612 /* 155 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
613 /* 166 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
614 /* 170 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
615 /* 177 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
616 /* 186 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i16}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
617 /* 195 */ {SDTCisVT, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::i32}, {SDTCisVT, 2, 0, MVT::i32}, {SDTCisSameAs, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
618 /* 201 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
619 /* 206 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
620 /* 211 */ {SDTCisSameAs, 1, 5, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
621 /* 216 */ {SDTCisSameAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
622 /* 220 */ {SDTCisSameAs, 1, 5, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
623 /* 225 */ {SDTCisSameAs, 1, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
624 /* 230 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
625 /* 238 */ {SDTCisVT, 6, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 2, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
626 /* 246 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
627 /* 254 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
628 /* 262 */ {SDTCisVT, 6, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
629 /* 270 */ {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, MVT::i1}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
630 /* 274 */ {SDTCisVT, 2, 0, MVT::i32}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
631 /* 276 */ {SDTCisVT, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
632 /* 278 */ {SDTCisVT, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
633 /* 283 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisEltOfVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
634 /* 287 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, MVT::i1}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
635 /* 293 */ {SDTCisVT, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
636 /* 296 */ {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
637 /* 299 */ {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
638 /* 302 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
639 /* 310 */ {SDTCisVT, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, MVT::i1}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
640 /* 317 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
641 /* 325 */ {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
642 /* 329 */ {SDTCisVT, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, MVT::i1}, {SDTCisFP, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
643 /* 337 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
644 /* 341 */ {SDTCisInt, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
645 /* 346 */ {SDTCisVT, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisPtrTy, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
646 /* 350 */ {SDTCisVT, 3, 0, MVT::Other}, {SDTCisVT, 2, 0, MVT::Other}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
647 /* 353 */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE},
648 /* 357 */ {SDTCisVT, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, MVT::i1},
649 /* 359 */ {SDTCisVT, 6, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 5, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::Other}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, MVT::i1},
650 /* 367 */ {SDTCisVT, 3, 0, MVT::i32}, {SDTCisVec, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
651 /* 370 */ {SDTCisSameAs, 4, 5, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, MVT::Other}, {SDTCisSameAs, 1, 2, MVT::INVALID_SIMPLE_VALUE_TYPE},
652};
653
654static const SDNodeDesc RISCVSDNodeDescs[] = {
655 {1, 1, 0, 0, 0, 1, 281, 2}, // ABSW
656 {1, 2, 0, 0, 0, 16, 296, 3}, // ADD_LO
657 {1, 3, 0, 0, 0, 33, 325, 4}, // ADD_TPREL
658 {1, 5, 0, 0, 3, 53, 302, 8}, // ADD_VL
659 {1, 5, 0, 0, 3, 70, 302, 8}, // AND_VL
660 {1, 5, 0, 0, 3, 87, 302, 8}, // AVGCEILS_VL
661 {1, 5, 0, 0, 3, 109, 302, 8}, // AVGCEILU_VL
662 {1, 5, 0, 0, 3, 131, 302, 8}, // AVGFLOORS_VL
663 {1, 5, 0, 0, 3, 154, 302, 8}, // AVGFLOORU_VL
664 {1, 4, 0, 0, 3, 177, 310, 7}, // BITREVERSE_VL
665 {1, 1, 0, 0, 0, 201, 281, 2}, // BREV8
666 {0, 4, 0|1<<SDNPHasChain, 0, 0, 217, 350, 3}, // BR_CC
667 {1, 4, 0, 0, 3, 233, 310, 7}, // BSWAP_VL
668 {1, 2, 0, 0, 0, 252, 44, 3}, // BuildGPRPair
669 {1, 2, 0, 0, 0, 275, 41, 3}, // BuildPairF64
670 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 298, 13, 1}, // CALL
671 {1, 2, 0, 0, 0, 313, 296, 3}, // CLMUL
672 {1, 2, 0, 0, 0, 329, 296, 3}, // CLMULH
673 {1, 2, 0, 0, 0, 346, 296, 3}, // CLMULR
674 {1, 1, 0, 0, 0, 363, 276, 2}, // CLZW
675 {1, 4, 0, 0, 3, 378, 310, 7}, // CTLZ_VL
676 {1, 4, 0, 0, 3, 396, 310, 7}, // CTPOP_VL
677 {1, 4, 0, 0, 3, 415, 310, 7}, // CTTZ_VL
678 {1, 1, 0, 0, 0, 433, 276, 2}, // CTZW
679 {1, 2, 0, 0, 0, 448, 296, 3}, // CZERO_EQZ
680 {1, 2, 0, 0, 0, 468, 296, 3}, // CZERO_NEZ
681 {1, 2, 0, 0, 0, 488, 293, 3}, // DIVUW
682 {1, 2, 0, 0, 0, 504, 293, 3}, // DIVW
683 {1, 3, 0, 0, 2, 519, 287, 6}, // FABS_VL
684 {1, 5, 0, 0, 3, 537, 317, 8}, // FADD_VL
685 {1, 1, 0, 0, 0, 555, 18, 2}, // FCLASS
686 {1, 3, 0, 0, 2, 572, 48, 9}, // FCLASS_VL
687 {1, 5, 0, 0, 3, 592, 317, 8}, // FCOPYSIGN_VL
688 {1, 2, 0, 0, 0, 615, 36, 3}, // FCVT_WU_RV64
689 {1, 2, 0, 0, 0, 638, 36, 3}, // FCVT_W_RV64
690 {1, 2, 0, 0, 0, 660, 17, 3}, // FCVT_X
691 {1, 2, 0, 0, 0, 677, 17, 3}, // FCVT_XU
692 {1, 5, 0, 0, 3, 695, 317, 8}, // FDIV_VL
693 {1, 1, 0, 0, 0, 713, 82, 2}, // FLI
694 {1, 2, 0, 0, 0, 727, 299, 3}, // FMAX
695 {1, 2, 0, 0, 0, 742, 299, 3}, // FMIN
696 {1, 5, 0, 0, 3, 757, 317, 8}, // FMUL_VL
697 {1, 1, 0, 0, 0, 775, 82, 2}, // FMV_H_X
698 {1, 1, 0, 0, 0, 793, 39, 2}, // FMV_W_X_RV64
699 {1, 1, 0, 0, 0, 816, 18, 2}, // FMV_X_ANYEXTH
700 {1, 1, 0, 0, 0, 840, 34, 2}, // FMV_X_ANYEXTW_RV64
701 {1, 1, 0, 0, 0, 869, 18, 2}, // FMV_X_SIGNEXTH
702 {1, 3, 0, 0, 2, 894, 287, 6}, // FNEG_VL
703 {1, 3, 0, 0, 2, 912, 98, 7}, // FP_EXTEND_VL
704 {1, 3, 0, 0, 2, 935, 91, 7}, // FP_ROUND_VL
705 {1, 3, 0, 0, 0, 957, 78, 4}, // FROUND
706 {1, 2, 0, 0, 0, 974, 79, 3}, // FSGNJX
707 {1, 3, 0, 0, 2, 991, 287, 6}, // FSQRT_VL
708 {1, 5, 0, 0, 3, 1010, 317, 8}, // FSUB_VL
709 {1, 1, 0, 0, 0, 1028, 281, 2}, // HI
710 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1041, 3, 3}, // LD_RV32
711 {1, 1, 0, 0, 0, 1059, 281, 2}, // LLA
712 {1, 2, 0, 0, 0, 1073, 58, 3}, // MOPR
713 {1, 3, 0, 0, 0, 1088, 57, 4}, // MOPRR
714 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1104, 0, 0}, // MRET_GLUE
715 {1, 2, 0, 0, 0, 1124, 296, 3}, // MULHSU
716 {1, 5, 0, 0, 3, 1141, 302, 8}, // MULHS_VL
717 {1, 5, 0, 0, 3, 1160, 302, 8}, // MULHU_VL
718 {1, 5, 0, 0, 3, 1179, 302, 8}, // MUL_VL
719 {1, 1, 0, 0, 0, 1196, 281, 2}, // ORC_B
720 {1, 5, 0, 0, 3, 1212, 302, 8}, // OR_VL
721 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1228, 47, 1}, // PROBED_ALLOCA
722 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1252, 0, 0}, // QC_C_MILEAVERET_GLUE
723 {2, 2, 0|1<<SDNPHasChain, 0, 0, 1283, 6, 4}, // READ_COUNTER_WIDE
724 {1, 1, 0|1<<SDNPHasChain, 0, 0, 1311, 62, 2}, // READ_CSR
725 {1, 0, 0, 0, 0, 1330, 13, 1}, // READ_VLENB
726 {1, 2, 0, 0, 0, 1351, 293, 3}, // REMUW
727 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1367, 0, 0}, // RET_GLUE
728 {1, 2, 0, 0, 0, 1386, 74, 4}, // RI_VEXTRACT
729 {1, 5, 0, 0, 0, 1408, 278, 5}, // RI_VINSERT_VL
730 {1, 5, 0, 0, 2, 1432, 302, 8}, // RI_VUNZIP2A_VL
731 {1, 5, 0, 0, 2, 1457, 302, 8}, // RI_VUNZIP2B_VL
732 {1, 5, 0, 0, 2, 1482, 302, 8}, // RI_VZIP2A_VL
733 {1, 5, 0, 0, 2, 1505, 302, 8}, // RI_VZIP2B_VL
734 {1, 5, 0, 0, 2, 1528, 302, 8}, // RI_VZIPEVEN_VL
735 {1, 5, 0, 0, 2, 1553, 302, 8}, // RI_VZIPODD_VL
736 {1, 2, 0, 0, 0, 1577, 293, 3}, // ROLW
737 {1, 2, 0, 0, 0, 1592, 293, 3}, // RORW
738 {1, 5, 0, 0, 3, 1607, 302, 8}, // ROTL_VL
739 {1, 5, 0, 0, 3, 1625, 302, 8}, // ROTR_VL
740 {1, 5, 0, 0, 3, 1643, 302, 8}, // SADDSAT_VL
741 {1, 5, 0, 0, 3, 1664, 302, 8}, // SDIV_VL
742 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1682, 3, 3}, // SD_RV32
743 {1, 5, 0, 0, 0, 1700, 370, 4}, // SELECT_CC
744 {1, 6, 0, 0, 3, 1720, 359, 8}, // SETCC_VL
745 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1739, 26, 4}, // SF_VC_FVV_SE
746 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1762, 30, 4}, // SF_VC_FVW_SE
747 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1785, 353, 4}, // SF_VC_FV_SE
748 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1807, 26, 4}, // SF_VC_IVV_SE
749 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1830, 30, 4}, // SF_VC_IVW_SE
750 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1853, 353, 4}, // SF_VC_IV_SE
751 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1875, 26, 4}, // SF_VC_VVV_SE
752 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1898, 30, 4}, // SF_VC_VVW_SE
753 {0, 5, 0|1<<SDNPHasChain, 0, 0, 1921, 353, 4}, // SF_VC_VV_SE
754 {1, 5, 0|1<<SDNPHasChain, 0, 0, 1943, 211, 5}, // SF_VC_V_FVV_SE
755 {1, 5, 0|1<<SDNPHasChain, 0, 0, 1968, 220, 5}, // SF_VC_V_FVW_SE
756 {1, 4, 0|1<<SDNPHasChain, 0, 0, 1993, 216, 4}, // SF_VC_V_FV_SE
757 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2017, 211, 5}, // SF_VC_V_IVV_SE
758 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2042, 220, 5}, // SF_VC_V_IVW_SE
759 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2067, 216, 4}, // SF_VC_V_IV_SE
760 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2091, 225, 5}, // SF_VC_V_I_SE
761 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2114, 211, 5}, // SF_VC_V_VVV_SE
762 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2139, 220, 5}, // SF_VC_V_VVW_SE
763 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2164, 216, 4}, // SF_VC_V_VV_SE
764 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2188, 211, 5}, // SF_VC_V_XVV_SE
765 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2213, 220, 5}, // SF_VC_V_XVW_SE
766 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2238, 216, 4}, // SF_VC_V_XV_SE
767 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2262, 225, 5}, // SF_VC_V_X_SE
768 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2285, 26, 4}, // SF_VC_XVV_SE
769 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2308, 30, 4}, // SF_VC_XVW_SE
770 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2331, 353, 4}, // SF_VC_XV_SE
771 {1, 1, 0, 0, 0, 2353, 281, 2}, // SHA256SIG0
772 {1, 1, 0, 0, 0, 2374, 281, 2}, // SHA256SIG1
773 {1, 1, 0, 0, 0, 2395, 281, 2}, // SHA256SUM0
774 {1, 1, 0, 0, 0, 2416, 281, 2}, // SHA256SUM1
775 {1, 3, 0, 0, 0, 2437, 341, 5}, // SHL_ADD
776 {1, 5, 0, 0, 3, 2455, 302, 8}, // SHL_VL
777 {1, 3, 0, 0, 2, 2472, 85, 6}, // SINT_TO_FP_VL
778 {1, 2, 0, 0, 0, 2496, 293, 3}, // SLLW
779 {1, 1, 0, 0, 0, 2511, 281, 2}, // SM3P0
780 {1, 1, 0, 0, 0, 2527, 281, 2}, // SM3P1
781 {1, 3, 0, 0, 0, 2543, 10, 4}, // SM4ED
782 {1, 3, 0, 0, 0, 2559, 10, 4}, // SM4KS
783 {1, 5, 0, 0, 3, 2575, 302, 8}, // SMAX_VL
784 {1, 5, 0, 0, 3, 2593, 302, 8}, // SMIN_VL
785 {1, 4, 0, 0, 0, 2611, 195, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
786 {1, 2, 0, 0, 0, 2647, 293, 3}, // SRAW
787 {1, 5, 0, 0, 3, 2662, 302, 8}, // SRA_VL
788 {1, 5, 0, 0, 3, 2679, 302, 8}, // SREM_VL
789 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 2697, 0, 0}, // SRET_GLUE
790 {1, 2, 0, 0, 0, 2717, 293, 3}, // SRLW
791 {1, 5, 0, 0, 3, 2732, 302, 8}, // SRL_VL
792 {1, 5, 0, 0, 3, 2749, 302, 8}, // SSUBSAT_VL
793 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 2770, 317, 8}, // STRICT_FADD_VL
794 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 2795, 36, 3}, // STRICT_FCVT_WU_RV64
795 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 2825, 36, 3}, // STRICT_FCVT_W_RV64
796 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 2854, 317, 8}, // STRICT_FDIV_VL
797 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 2879, 317, 8}, // STRICT_FMUL_VL
798 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 2904, 98, 7}, // STRICT_FP_EXTEND_VL
799 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 2934, 91, 7}, // STRICT_FP_ROUND_VL
800 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 2963, 359, 8}, // STRICT_FSETCCS_VL
801 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 2991, 359, 8}, // STRICT_FSETCC_VL
802 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3018, 287, 6}, // STRICT_FSQRT_VL
803 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3044, 317, 8}, // STRICT_FSUB_VL
804 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3069, 85, 6}, // STRICT_SINT_TO_FP_VL
805 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3100, 85, 6}, // STRICT_UINT_TO_FP_VL
806 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3131, 64, 7}, // STRICT_VFCVT_RM_X_F_VL
807 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3164, 65, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
808 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3199, 65, 6}, // STRICT_VFCVT_RTZ_X_F_VL
809 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3233, 329, 8}, // STRICT_VFMADD_VL
810 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3260, 329, 8}, // STRICT_VFMSUB_VL
811 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3287, 91, 7}, // STRICT_VFNCVT_ROD_VL
812 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3318, 329, 8}, // STRICT_VFNMADD_VL
813 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3346, 329, 8}, // STRICT_VFNMSUB_VL
814 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3374, 287, 6}, // STRICT_VFROUND_NOEXCEPT_VL
815 {1, 5, 0, 0, 3, 3411, 302, 8}, // SUB_VL
816 {1, 2, 0|1<<SDNPHasChain, 0, 0, 3428, 61, 3}, // SWAP_CSR
817 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3447, 47, 1}, // SW_GUARDED_BRIND
818 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3474, 13, 1}, // SW_GUARDED_CALL
819 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3500, 13, 1}, // SW_GUARDED_TAIL
820 {2, 1, 0, 0, 0, 3526, 0, 3}, // SplitF64
821 {2, 1, 0, 0, 0, 3545, 14, 3}, // SplitGPRPair
822 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3568, 13, 1}, // TAIL
823 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3583, 346, 4}, // TH_LDD
824 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3600, 346, 4}, // TH_LWD
825 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3617, 346, 4}, // TH_LWUD
826 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3635, 346, 4}, // TH_SDD
827 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3652, 346, 4}, // TH_SWD
828 {1, 3, 0, 0, 2, 3669, 201, 5}, // TRUNCATE_VECTOR_VL
829 {1, 3, 0, 0, 2, 3698, 201, 5}, // TRUNCATE_VECTOR_VL_SSAT
830 {1, 3, 0, 0, 2, 3732, 201, 5}, // TRUNCATE_VECTOR_VL_USAT
831 {1, 2, 0, 0, 0, 3766, 274, 2}, // TUPLE_EXTRACT
832 {1, 3, 0, 0, 0, 3790, 367, 3}, // TUPLE_INSERT
833 {1, 5, 0, 0, 3, 3813, 302, 8}, // UADDSAT_VL
834 {1, 5, 0, 0, 3, 3834, 302, 8}, // UDIV_VL
835 {1, 3, 0, 0, 2, 3852, 85, 6}, // UINT_TO_FP_VL
836 {1, 5, 0, 0, 3, 3876, 302, 8}, // UMAX_VL
837 {1, 5, 0, 0, 3, 3894, 302, 8}, // UMIN_VL
838 {1, 1, 0, 0, 0, 3912, 281, 2}, // UNZIP
839 {1, 5, 0, 0, 3, 3928, 302, 8}, // UREM_VL
840 {1, 5, 0, 0, 3, 3946, 302, 8}, // USUBSAT_VL
841 {1, 3, 0, 0, 2, 3967, 20, 6}, // VCPOP_VL
842 {1, 6, 0, 0, 2, 3986, 238, 8}, // VECREDUCE_ADD_VL
843 {1, 6, 0, 0, 2, 4013, 238, 8}, // VECREDUCE_AND_VL
844 {1, 6, 0, 0, 2, 4040, 238, 8}, // VECREDUCE_FADD_VL
845 {1, 6, 0, 0, 2, 4068, 238, 8}, // VECREDUCE_FMAX_VL
846 {1, 6, 0, 0, 2, 4096, 238, 8}, // VECREDUCE_FMIN_VL
847 {1, 6, 0, 0, 2, 4124, 238, 8}, // VECREDUCE_OR_VL
848 {1, 6, 0, 0, 2, 4150, 238, 8}, // VECREDUCE_SEQ_FADD_VL
849 {1, 6, 0, 0, 2, 4182, 238, 8}, // VECREDUCE_SMAX_VL
850 {1, 6, 0, 0, 2, 4210, 238, 8}, // VECREDUCE_SMIN_VL
851 {1, 6, 0, 0, 2, 4238, 238, 8}, // VECREDUCE_UMAX_VL
852 {1, 6, 0, 0, 2, 4266, 238, 8}, // VECREDUCE_UMIN_VL
853 {1, 6, 0, 0, 2, 4294, 238, 8}, // VECREDUCE_XOR_VL
854 {1, 4, 0, 0, 2, 4321, 84, 7}, // VFCVT_RM_F_XU_VL
855 {1, 4, 0, 0, 2, 4348, 84, 7}, // VFCVT_RM_F_X_VL
856 {1, 4, 0, 0, 2, 4374, 64, 7}, // VFCVT_RM_XU_F_VL
857 {1, 4, 0, 0, 2, 4401, 64, 7}, // VFCVT_RM_X_F_VL
858 {1, 3, 0, 0, 2, 4427, 65, 6}, // VFCVT_RTZ_XU_F_VL
859 {1, 3, 0, 0, 2, 4455, 65, 6}, // VFCVT_RTZ_X_F_VL
860 {1, 3, 0, 0, 2, 4482, 20, 6}, // VFIRST_VL
861 {1, 5, 0, 0, 2, 4502, 329, 8}, // VFMADD_VL
862 {1, 5, 0, 0, 3, 4522, 317, 8}, // VFMAX_VL
863 {1, 5, 0, 0, 3, 4541, 317, 8}, // VFMIN_VL
864 {1, 5, 0, 0, 2, 4560, 329, 8}, // VFMSUB_VL
865 {1, 3, 0, 0, 0, 4580, 283, 4}, // VFMV_S_F_VL
866 {1, 3, 0, 0, 0, 4602, 140, 5}, // VFMV_V_F_VL
867 {1, 3, 0, 0, 2, 4624, 91, 7}, // VFNCVT_ROD_VL
868 {1, 5, 0, 0, 2, 4648, 329, 8}, // VFNMADD_VL
869 {1, 5, 0, 0, 2, 4669, 329, 8}, // VFNMSUB_VL
870 {1, 3, 0, 0, 2, 4690, 287, 6}, // VFROUND_NOEXCEPT_VL
871 {1, 5, 0, 0, 2, 4720, 254, 8}, // VFSLIDE1DOWN_VL
872 {1, 5, 0, 0, 2, 4746, 254, 8}, // VFSLIDE1UP_VL
873 {1, 5, 0, 0, 3, 4770, 145, 10}, // VFWADD_VL
874 {1, 5, 0, 0, 3, 4790, 130, 10}, // VFWADD_W_VL
875 {1, 5, 0, 0, 2, 4812, 155, 11}, // VFWMADD_VL
876 {1, 5, 0, 0, 2, 4833, 155, 11}, // VFWMSUB_VL
877 {1, 5, 0, 0, 3, 4854, 145, 10}, // VFWMUL_VL
878 {1, 5, 0, 0, 2, 4874, 155, 11}, // VFWNMADD_VL
879 {1, 5, 0, 0, 2, 4896, 155, 11}, // VFWNMSUB_VL
880 {1, 5, 0, 0, 3, 4918, 145, 10}, // VFWSUB_VL
881 {1, 5, 0, 0, 3, 4938, 130, 10}, // VFWSUB_W_VL
882 {1, 2, 0, 0, 2, 4960, 270, 4}, // VID_VL
883 {1, 3, 0, 0, 0, 4977, 337, 4}, // VMAND_VL
884 {1, 1, 0, 0, 0, 4996, 357, 2}, // VMCLR_VL
885 {1, 5, 0, 0, 1, 5015, 230, 8}, // VMERGE_VL
886 {1, 3, 0, 0, 0, 5035, 337, 4}, // VMOR_VL
887 {1, 1, 0, 0, 0, 5053, 357, 2}, // VMSET_VL
888 {1, 3, 0, 0, 0, 5072, 279, 4}, // VMV_S_X_VL
889 {1, 3, 0, 0, 0, 5093, 166, 4}, // VMV_V_V_VL
890 {1, 3, 0, 0, 0, 5114, 105, 5}, // VMV_V_X_VL
891 {1, 1, 0, 0, 0, 5135, 71, 3}, // VMV_X_S
892 {1, 3, 0, 0, 0, 5153, 337, 4}, // VMXOR_VL
893 {1, 5, 0, 0, 3, 5172, 302, 8}, // VQDOTSU_VL
894 {1, 5, 0, 0, 3, 5193, 302, 8}, // VQDOTU_VL
895 {1, 5, 0, 0, 3, 5213, 302, 8}, // VQDOT_VL
896 {1, 5, 0, 0, 2, 5232, 186, 9}, // VRGATHEREI16_VV_VL
897 {1, 5, 0, 0, 2, 5261, 177, 9}, // VRGATHER_VV_VL
898 {1, 5, 0, 0, 2, 5286, 170, 7}, // VRGATHER_VX_VL
899 {1, 3, 0, 0, 2, 5311, 206, 5}, // VSEXT_VL
900 {1, 5, 0, 0, 2, 5330, 246, 8}, // VSLIDE1DOWN_VL
901 {1, 5, 0, 0, 2, 5355, 246, 8}, // VSLIDE1UP_VL
902 {1, 6, 0, 0, 2, 5378, 262, 8}, // VSLIDEDOWN_VL
903 {1, 6, 0, 0, 2, 5402, 262, 8}, // VSLIDEUP_VL
904 {1, 5, 0, 0, 3, 5424, 120, 10}, // VWADDU_VL
905 {1, 5, 0, 0, 3, 5444, 110, 10}, // VWADDU_W_VL
906 {1, 5, 0, 0, 3, 5466, 120, 10}, // VWADD_VL
907 {1, 5, 0, 0, 3, 5485, 110, 10}, // VWADD_W_VL
908 {1, 5, 0, 0, 2, 5506, 120, 10}, // VWMACCSU_VL
909 {1, 5, 0, 0, 2, 5528, 120, 10}, // VWMACCU_VL
910 {1, 5, 0, 0, 2, 5549, 120, 10}, // VWMACC_VL
911 {1, 5, 0, 0, 3, 5569, 120, 10}, // VWMULSU_VL
912 {1, 5, 0, 0, 3, 5590, 120, 10}, // VWMULU_VL
913 {1, 5, 0, 0, 3, 5610, 120, 10}, // VWMUL_VL
914 {1, 5, 0, 0, 3, 5629, 120, 10}, // VWSLL_VL
915 {1, 5, 0, 0, 3, 5648, 120, 10}, // VWSUBU_VL
916 {1, 5, 0, 0, 3, 5668, 110, 10}, // VWSUBU_W_VL
917 {1, 5, 0, 0, 3, 5690, 120, 10}, // VWSUB_VL
918 {1, 5, 0, 0, 3, 5709, 110, 10}, // VWSUB_W_VL
919 {1, 3, 0, 0, 2, 5730, 206, 5}, // VZEXT_VL
920 {0, 2, 0|1<<SDNPHasChain, 0, 0, 5749, 62, 2}, // WRITE_CSR
921 {1, 5, 0, 0, 3, 5769, 302, 8}, // XOR_VL
922 {1, 1, 0, 0, 0, 5786, 281, 2}, // ZIP
923};
924
925static const SDNodeInfo RISCVGenSDNodeInfo(
926 /*NumOpcodes=*/268, RISCVSDNodeDescs,
927 RISCVSDNodeNames, RISCVSDTypeConstraints);
928
929} // namespace llvm
930
931#endif // GET_SDNODE_DESC
932
933