1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11namespace llvm::SystemZ {
12 enum {
13 PHI = 0,
14 INLINEASM = 1,
15 INLINEASM_BR = 2,
16 CFI_INSTRUCTION = 3,
17 EH_LABEL = 4,
18 GC_LABEL = 5,
19 ANNOTATION_LABEL = 6,
20 KILL = 7,
21 EXTRACT_SUBREG = 8,
22 INSERT_SUBREG = 9,
23 IMPLICIT_DEF = 10,
24 INIT_UNDEF = 11,
25 SUBREG_TO_REG = 12,
26 COPY_TO_REGCLASS = 13,
27 DBG_VALUE = 14,
28 DBG_VALUE_LIST = 15,
29 DBG_INSTR_REF = 16,
30 DBG_PHI = 17,
31 DBG_LABEL = 18,
32 REG_SEQUENCE = 19,
33 COPY = 20,
34 BUNDLE = 21,
35 LIFETIME_START = 22,
36 LIFETIME_END = 23,
37 PSEUDO_PROBE = 24,
38 ARITH_FENCE = 25,
39 STACKMAP = 26,
40 FENTRY_CALL = 27,
41 PATCHPOINT = 28,
42 LOAD_STACK_GUARD = 29,
43 PREALLOCATED_SETUP = 30,
44 PREALLOCATED_ARG = 31,
45 STATEPOINT = 32,
46 LOCAL_ESCAPE = 33,
47 FAULTING_OP = 34,
48 PATCHABLE_OP = 35,
49 PATCHABLE_FUNCTION_ENTER = 36,
50 PATCHABLE_RET = 37,
51 PATCHABLE_FUNCTION_EXIT = 38,
52 PATCHABLE_TAIL_CALL = 39,
53 PATCHABLE_EVENT_CALL = 40,
54 PATCHABLE_TYPED_EVENT_CALL = 41,
55 ICALL_BRANCH_FUNNEL = 42,
56 FAKE_USE = 43,
57 MEMBARRIER = 44,
58 JUMP_TABLE_DEBUG_INFO = 45,
59 CONVERGENCECTRL_ENTRY = 46,
60 CONVERGENCECTRL_ANCHOR = 47,
61 CONVERGENCECTRL_LOOP = 48,
62 CONVERGENCECTRL_GLUE = 49,
63 G_ASSERT_SEXT = 50,
64 G_ASSERT_ZEXT = 51,
65 G_ASSERT_ALIGN = 52,
66 G_ADD = 53,
67 G_SUB = 54,
68 G_MUL = 55,
69 G_SDIV = 56,
70 G_UDIV = 57,
71 G_SREM = 58,
72 G_UREM = 59,
73 G_SDIVREM = 60,
74 G_UDIVREM = 61,
75 G_AND = 62,
76 G_OR = 63,
77 G_XOR = 64,
78 G_ABDS = 65,
79 G_ABDU = 66,
80 G_IMPLICIT_DEF = 67,
81 G_PHI = 68,
82 G_FRAME_INDEX = 69,
83 G_GLOBAL_VALUE = 70,
84 G_PTRAUTH_GLOBAL_VALUE = 71,
85 G_CONSTANT_POOL = 72,
86 G_EXTRACT = 73,
87 G_UNMERGE_VALUES = 74,
88 G_INSERT = 75,
89 G_MERGE_VALUES = 76,
90 G_BUILD_VECTOR = 77,
91 G_BUILD_VECTOR_TRUNC = 78,
92 G_CONCAT_VECTORS = 79,
93 G_PTRTOINT = 80,
94 G_INTTOPTR = 81,
95 G_BITCAST = 82,
96 G_FREEZE = 83,
97 G_CONSTANT_FOLD_BARRIER = 84,
98 G_INTRINSIC_FPTRUNC_ROUND = 85,
99 G_INTRINSIC_TRUNC = 86,
100 G_INTRINSIC_ROUND = 87,
101 G_INTRINSIC_LRINT = 88,
102 G_INTRINSIC_LLRINT = 89,
103 G_INTRINSIC_ROUNDEVEN = 90,
104 G_READCYCLECOUNTER = 91,
105 G_READSTEADYCOUNTER = 92,
106 G_LOAD = 93,
107 G_SEXTLOAD = 94,
108 G_ZEXTLOAD = 95,
109 G_INDEXED_LOAD = 96,
110 G_INDEXED_SEXTLOAD = 97,
111 G_INDEXED_ZEXTLOAD = 98,
112 G_STORE = 99,
113 G_INDEXED_STORE = 100,
114 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 101,
115 G_ATOMIC_CMPXCHG = 102,
116 G_ATOMICRMW_XCHG = 103,
117 G_ATOMICRMW_ADD = 104,
118 G_ATOMICRMW_SUB = 105,
119 G_ATOMICRMW_AND = 106,
120 G_ATOMICRMW_NAND = 107,
121 G_ATOMICRMW_OR = 108,
122 G_ATOMICRMW_XOR = 109,
123 G_ATOMICRMW_MAX = 110,
124 G_ATOMICRMW_MIN = 111,
125 G_ATOMICRMW_UMAX = 112,
126 G_ATOMICRMW_UMIN = 113,
127 G_ATOMICRMW_FADD = 114,
128 G_ATOMICRMW_FSUB = 115,
129 G_ATOMICRMW_FMAX = 116,
130 G_ATOMICRMW_FMIN = 117,
131 G_ATOMICRMW_FMAXIMUM = 118,
132 G_ATOMICRMW_FMINIMUM = 119,
133 G_ATOMICRMW_UINC_WRAP = 120,
134 G_ATOMICRMW_UDEC_WRAP = 121,
135 G_ATOMICRMW_USUB_COND = 122,
136 G_ATOMICRMW_USUB_SAT = 123,
137 G_FENCE = 124,
138 G_PREFETCH = 125,
139 G_BRCOND = 126,
140 G_BRINDIRECT = 127,
141 G_INVOKE_REGION_START = 128,
142 G_INTRINSIC = 129,
143 G_INTRINSIC_W_SIDE_EFFECTS = 130,
144 G_INTRINSIC_CONVERGENT = 131,
145 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 132,
146 G_ANYEXT = 133,
147 G_TRUNC = 134,
148 G_CONSTANT = 135,
149 G_FCONSTANT = 136,
150 G_VASTART = 137,
151 G_VAARG = 138,
152 G_SEXT = 139,
153 G_SEXT_INREG = 140,
154 G_ZEXT = 141,
155 G_SHL = 142,
156 G_LSHR = 143,
157 G_ASHR = 144,
158 G_FSHL = 145,
159 G_FSHR = 146,
160 G_ROTR = 147,
161 G_ROTL = 148,
162 G_ICMP = 149,
163 G_FCMP = 150,
164 G_SCMP = 151,
165 G_UCMP = 152,
166 G_SELECT = 153,
167 G_UADDO = 154,
168 G_UADDE = 155,
169 G_USUBO = 156,
170 G_USUBE = 157,
171 G_SADDO = 158,
172 G_SADDE = 159,
173 G_SSUBO = 160,
174 G_SSUBE = 161,
175 G_UMULO = 162,
176 G_SMULO = 163,
177 G_UMULH = 164,
178 G_SMULH = 165,
179 G_UADDSAT = 166,
180 G_SADDSAT = 167,
181 G_USUBSAT = 168,
182 G_SSUBSAT = 169,
183 G_USHLSAT = 170,
184 G_SSHLSAT = 171,
185 G_SMULFIX = 172,
186 G_UMULFIX = 173,
187 G_SMULFIXSAT = 174,
188 G_UMULFIXSAT = 175,
189 G_SDIVFIX = 176,
190 G_UDIVFIX = 177,
191 G_SDIVFIXSAT = 178,
192 G_UDIVFIXSAT = 179,
193 G_FADD = 180,
194 G_FSUB = 181,
195 G_FMUL = 182,
196 G_FMA = 183,
197 G_FMAD = 184,
198 G_FDIV = 185,
199 G_FREM = 186,
200 G_FPOW = 187,
201 G_FPOWI = 188,
202 G_FEXP = 189,
203 G_FEXP2 = 190,
204 G_FEXP10 = 191,
205 G_FLOG = 192,
206 G_FLOG2 = 193,
207 G_FLOG10 = 194,
208 G_FLDEXP = 195,
209 G_FFREXP = 196,
210 G_FNEG = 197,
211 G_FPEXT = 198,
212 G_FPTRUNC = 199,
213 G_FPTOSI = 200,
214 G_FPTOUI = 201,
215 G_SITOFP = 202,
216 G_UITOFP = 203,
217 G_FPTOSI_SAT = 204,
218 G_FPTOUI_SAT = 205,
219 G_FABS = 206,
220 G_FCOPYSIGN = 207,
221 G_IS_FPCLASS = 208,
222 G_FCANONICALIZE = 209,
223 G_FMINNUM = 210,
224 G_FMAXNUM = 211,
225 G_FMINNUM_IEEE = 212,
226 G_FMAXNUM_IEEE = 213,
227 G_FMINIMUM = 214,
228 G_FMAXIMUM = 215,
229 G_FMINIMUMNUM = 216,
230 G_FMAXIMUMNUM = 217,
231 G_GET_FPENV = 218,
232 G_SET_FPENV = 219,
233 G_RESET_FPENV = 220,
234 G_GET_FPMODE = 221,
235 G_SET_FPMODE = 222,
236 G_RESET_FPMODE = 223,
237 G_PTR_ADD = 224,
238 G_PTRMASK = 225,
239 G_SMIN = 226,
240 G_SMAX = 227,
241 G_UMIN = 228,
242 G_UMAX = 229,
243 G_ABS = 230,
244 G_LROUND = 231,
245 G_LLROUND = 232,
246 G_BR = 233,
247 G_BRJT = 234,
248 G_VSCALE = 235,
249 G_INSERT_SUBVECTOR = 236,
250 G_EXTRACT_SUBVECTOR = 237,
251 G_INSERT_VECTOR_ELT = 238,
252 G_EXTRACT_VECTOR_ELT = 239,
253 G_SHUFFLE_VECTOR = 240,
254 G_SPLAT_VECTOR = 241,
255 G_STEP_VECTOR = 242,
256 G_VECTOR_COMPRESS = 243,
257 G_CTTZ = 244,
258 G_CTTZ_ZERO_UNDEF = 245,
259 G_CTLZ = 246,
260 G_CTLZ_ZERO_UNDEF = 247,
261 G_CTPOP = 248,
262 G_BSWAP = 249,
263 G_BITREVERSE = 250,
264 G_FCEIL = 251,
265 G_FCOS = 252,
266 G_FSIN = 253,
267 G_FSINCOS = 254,
268 G_FTAN = 255,
269 G_FACOS = 256,
270 G_FASIN = 257,
271 G_FATAN = 258,
272 G_FATAN2 = 259,
273 G_FCOSH = 260,
274 G_FSINH = 261,
275 G_FTANH = 262,
276 G_FSQRT = 263,
277 G_FFLOOR = 264,
278 G_FRINT = 265,
279 G_FNEARBYINT = 266,
280 G_ADDRSPACE_CAST = 267,
281 G_BLOCK_ADDR = 268,
282 G_JUMP_TABLE = 269,
283 G_DYN_STACKALLOC = 270,
284 G_STACKSAVE = 271,
285 G_STACKRESTORE = 272,
286 G_STRICT_FADD = 273,
287 G_STRICT_FSUB = 274,
288 G_STRICT_FMUL = 275,
289 G_STRICT_FDIV = 276,
290 G_STRICT_FREM = 277,
291 G_STRICT_FMA = 278,
292 G_STRICT_FSQRT = 279,
293 G_STRICT_FLDEXP = 280,
294 G_READ_REGISTER = 281,
295 G_WRITE_REGISTER = 282,
296 G_MEMCPY = 283,
297 G_MEMCPY_INLINE = 284,
298 G_MEMMOVE = 285,
299 G_MEMSET = 286,
300 G_BZERO = 287,
301 G_TRAP = 288,
302 G_DEBUGTRAP = 289,
303 G_UBSANTRAP = 290,
304 G_VECREDUCE_SEQ_FADD = 291,
305 G_VECREDUCE_SEQ_FMUL = 292,
306 G_VECREDUCE_FADD = 293,
307 G_VECREDUCE_FMUL = 294,
308 G_VECREDUCE_FMAX = 295,
309 G_VECREDUCE_FMIN = 296,
310 G_VECREDUCE_FMAXIMUM = 297,
311 G_VECREDUCE_FMINIMUM = 298,
312 G_VECREDUCE_ADD = 299,
313 G_VECREDUCE_MUL = 300,
314 G_VECREDUCE_AND = 301,
315 G_VECREDUCE_OR = 302,
316 G_VECREDUCE_XOR = 303,
317 G_VECREDUCE_SMAX = 304,
318 G_VECREDUCE_SMIN = 305,
319 G_VECREDUCE_UMAX = 306,
320 G_VECREDUCE_UMIN = 307,
321 G_SBFX = 308,
322 G_UBFX = 309,
323 ADA_ENTRY = 310,
324 ADA_ENTRY_VALUE = 311,
325 ADB_MemFoldPseudo = 312,
326 ADJCALLSTACKDOWN = 313,
327 ADJCALLSTACKUP = 314,
328 ADJDYNALLOC = 315,
329 AEB_MemFoldPseudo = 316,
330 AEXT128 = 317,
331 AFIMux = 318,
332 AG_MemFoldPseudo = 319,
333 AHIMux = 320,
334 AHIMuxK = 321,
335 ALG_MemFoldPseudo = 322,
336 AL_MemFoldPseudo = 323,
337 ATOMIC_CMP_SWAPW = 324,
338 ATOMIC_LOADW_AFI = 325,
339 ATOMIC_LOADW_AR = 326,
340 ATOMIC_LOADW_MAX = 327,
341 ATOMIC_LOADW_MIN = 328,
342 ATOMIC_LOADW_NILH = 329,
343 ATOMIC_LOADW_NILHi = 330,
344 ATOMIC_LOADW_NR = 331,
345 ATOMIC_LOADW_NRi = 332,
346 ATOMIC_LOADW_OILH = 333,
347 ATOMIC_LOADW_OR = 334,
348 ATOMIC_LOADW_SR = 335,
349 ATOMIC_LOADW_UMAX = 336,
350 ATOMIC_LOADW_UMIN = 337,
351 ATOMIC_LOADW_XILF = 338,
352 ATOMIC_LOADW_XR = 339,
353 ATOMIC_SWAPW = 340,
354 A_MemFoldPseudo = 341,
355 CFIMux = 342,
356 CGIBCall = 343,
357 CGIBReturn = 344,
358 CGRBCall = 345,
359 CGRBReturn = 346,
360 CHIMux = 347,
361 CIBCall = 348,
362 CIBReturn = 349,
363 CLCImm = 350,
364 CLCReg = 351,
365 CLFIMux = 352,
366 CLGIBCall = 353,
367 CLGIBReturn = 354,
368 CLGRBCall = 355,
369 CLGRBReturn = 356,
370 CLIBCall = 357,
371 CLIBReturn = 358,
372 CLMux = 359,
373 CLRBCall = 360,
374 CLRBReturn = 361,
375 CLSTLoop = 362,
376 CMux = 363,
377 CRBCall = 364,
378 CRBReturn = 365,
379 CallBASR = 366,
380 CallBASR_STACKEXT = 367,
381 CallBASR_XPLINK64 = 368,
382 CallBCR = 369,
383 CallBR = 370,
384 CallBRASL = 371,
385 CallBRASL_XPLINK64 = 372,
386 CallBRCL = 373,
387 CallJG = 374,
388 CondReturn = 375,
389 CondReturn_XPLINK = 376,
390 CondStore16 = 377,
391 CondStore16Inv = 378,
392 CondStore16Mux = 379,
393 CondStore16MuxInv = 380,
394 CondStore32 = 381,
395 CondStore32Inv = 382,
396 CondStore32Mux = 383,
397 CondStore32MuxInv = 384,
398 CondStore64 = 385,
399 CondStore64Inv = 386,
400 CondStore8 = 387,
401 CondStore8Inv = 388,
402 CondStore8Mux = 389,
403 CondStore8MuxInv = 390,
404 CondStoreF32 = 391,
405 CondStoreF32Inv = 392,
406 CondStoreF64 = 393,
407 CondStoreF64Inv = 394,
408 CondTrap = 395,
409 DDB_MemFoldPseudo = 396,
410 DEB_MemFoldPseudo = 397,
411 EH_SjLj_LongJmp = 398,
412 EH_SjLj_SetJmp = 399,
413 EH_SjLj_Setup = 400,
414 EXRL_Pseudo = 401,
415 GOT = 402,
416 IIFMux = 403,
417 IIHF64 = 404,
418 IIHH64 = 405,
419 IIHL64 = 406,
420 IIHMux = 407,
421 IILF64 = 408,
422 IILH64 = 409,
423 IILL64 = 410,
424 IILMux = 411,
425 L128 = 412,
426 LBMux = 413,
427 LEFR = 414,
428 LEFR_16 = 415,
429 LFER = 416,
430 LFER_16 = 417,
431 LHIMux = 418,
432 LHMux = 419,
433 LLCMux = 420,
434 LLCRMux = 421,
435 LLHMux = 422,
436 LLHRMux = 423,
437 LMux = 424,
438 LOCG_MemFoldPseudo = 425,
439 LOCHIMux = 426,
440 LOCMux = 427,
441 LOCMux_MemFoldPseudo = 428,
442 LOCRMux = 429,
443 LTDBRCompare_Pseudo = 430,
444 LTEBRCompare_Pseudo = 431,
445 LTXBRCompare_Pseudo = 432,
446 LX = 433,
447 MADB_MemFoldPseudo = 434,
448 MAEB_MemFoldPseudo = 435,
449 MDB_MemFoldPseudo = 436,
450 MEEB_MemFoldPseudo = 437,
451 MSC_MemFoldPseudo = 438,
452 MSDB_MemFoldPseudo = 439,
453 MSEB_MemFoldPseudo = 440,
454 MSGC_MemFoldPseudo = 441,
455 MVCImm = 442,
456 MVCReg = 443,
457 MVSTLoop = 444,
458 MemsetImmImm = 445,
459 MemsetImmReg = 446,
460 MemsetRegImm = 447,
461 MemsetRegReg = 448,
462 NCImm = 449,
463 NCReg = 450,
464 NG_MemFoldPseudo = 451,
465 NIFMux = 452,
466 NIHF64 = 453,
467 NIHH64 = 454,
468 NIHL64 = 455,
469 NIHMux = 456,
470 NILF64 = 457,
471 NILH64 = 458,
472 NILL64 = 459,
473 NILMux = 460,
474 N_MemFoldPseudo = 461,
475 OCImm = 462,
476 OCReg = 463,
477 OG_MemFoldPseudo = 464,
478 OIFMux = 465,
479 OIHF64 = 466,
480 OIHH64 = 467,
481 OIHL64 = 468,
482 OIHMux = 469,
483 OILF64 = 470,
484 OILH64 = 471,
485 OILL64 = 472,
486 OILMux = 473,
487 O_MemFoldPseudo = 474,
488 PAIR128 = 475,
489 PROBED_ALLOCA = 476,
490 PROBED_STACKALLOC = 477,
491 RISBHH = 478,
492 RISBHHOpt = 479,
493 RISBHL = 480,
494 RISBHLOpt = 481,
495 RISBLH = 482,
496 RISBLHOpt = 483,
497 RISBLL = 484,
498 RISBLLOpt = 485,
499 RISBMux = 486,
500 Return = 487,
501 Return_XPLINK = 488,
502 SCmp128Hi = 489,
503 SDB_MemFoldPseudo = 490,
504 SEB_MemFoldPseudo = 491,
505 SELRMux = 492,
506 SG_MemFoldPseudo = 493,
507 SLG_MemFoldPseudo = 494,
508 SL_MemFoldPseudo = 495,
509 SRSTLoop = 496,
510 ST128 = 497,
511 STCMux = 498,
512 STHMux = 499,
513 STMux = 500,
514 STOCMux = 501,
515 STX = 502,
516 S_MemFoldPseudo = 503,
517 Select128 = 504,
518 Select32 = 505,
519 Select64 = 506,
520 SelectF128 = 507,
521 SelectF32 = 508,
522 SelectF64 = 509,
523 SelectVR128 = 510,
524 SelectVR32 = 511,
525 SelectVR64 = 512,
526 Serialize = 513,
527 TBEGIN_nofloat = 514,
528 TLS_GDCALL = 515,
529 TLS_LDCALL = 516,
530 TMHH64 = 517,
531 TMHL64 = 518,
532 TMHMux = 519,
533 TMLH64 = 520,
534 TMLL64 = 521,
535 TMLMux = 522,
536 Trap = 523,
537 UCmp128Hi = 524,
538 VL16 = 525,
539 VL32 = 526,
540 VL64 = 527,
541 VLR32 = 528,
542 VLR64 = 529,
543 VLVGP32 = 530,
544 VST16 = 531,
545 VST32 = 532,
546 VST64 = 533,
547 XCImm = 534,
548 XCReg = 535,
549 XG_MemFoldPseudo = 536,
550 XIFMux = 537,
551 XIHF64 = 538,
552 XILF64 = 539,
553 XPLINK_STACKALLOC = 540,
554 X_MemFoldPseudo = 541,
555 ZEXT128 = 542,
556 A = 543,
557 AD = 544,
558 ADB = 545,
559 ADBR = 546,
560 ADR = 547,
561 ADTR = 548,
562 ADTRA = 549,
563 AE = 550,
564 AEB = 551,
565 AEBR = 552,
566 AER = 553,
567 AFI = 554,
568 AG = 555,
569 AGF = 556,
570 AGFI = 557,
571 AGFR = 558,
572 AGH = 559,
573 AGHI = 560,
574 AGHIK = 561,
575 AGR = 562,
576 AGRK = 563,
577 AGSI = 564,
578 AH = 565,
579 AHHHR = 566,
580 AHHLR = 567,
581 AHI = 568,
582 AHIK = 569,
583 AHY = 570,
584 AIH = 571,
585 AL = 572,
586 ALC = 573,
587 ALCG = 574,
588 ALCGR = 575,
589 ALCR = 576,
590 ALFI = 577,
591 ALG = 578,
592 ALGF = 579,
593 ALGFI = 580,
594 ALGFR = 581,
595 ALGHSIK = 582,
596 ALGR = 583,
597 ALGRK = 584,
598 ALGSI = 585,
599 ALHHHR = 586,
600 ALHHLR = 587,
601 ALHSIK = 588,
602 ALR = 589,
603 ALRK = 590,
604 ALSI = 591,
605 ALSIH = 592,
606 ALSIHN = 593,
607 ALY = 594,
608 AP = 595,
609 AR = 596,
610 ARK = 597,
611 ASI = 598,
612 AU = 599,
613 AUR = 600,
614 AW = 601,
615 AWR = 602,
616 AXBR = 603,
617 AXR = 604,
618 AXTR = 605,
619 AXTRA = 606,
620 AY = 607,
621 B = 608,
622 BAKR = 609,
623 BAL = 610,
624 BALR = 611,
625 BAS = 612,
626 BASR = 613,
627 BASSM = 614,
628 BAsmE = 615,
629 BAsmH = 616,
630 BAsmHE = 617,
631 BAsmL = 618,
632 BAsmLE = 619,
633 BAsmLH = 620,
634 BAsmM = 621,
635 BAsmNE = 622,
636 BAsmNH = 623,
637 BAsmNHE = 624,
638 BAsmNL = 625,
639 BAsmNLE = 626,
640 BAsmNLH = 627,
641 BAsmNM = 628,
642 BAsmNO = 629,
643 BAsmNP = 630,
644 BAsmNZ = 631,
645 BAsmO = 632,
646 BAsmP = 633,
647 BAsmZ = 634,
648 BC = 635,
649 BCAsm = 636,
650 BCR = 637,
651 BCRAsm = 638,
652 BCT = 639,
653 BCTG = 640,
654 BCTGR = 641,
655 BCTR = 642,
656 BDEPG = 643,
657 BEXTG = 644,
658 BI = 645,
659 BIAsmE = 646,
660 BIAsmH = 647,
661 BIAsmHE = 648,
662 BIAsmL = 649,
663 BIAsmLE = 650,
664 BIAsmLH = 651,
665 BIAsmM = 652,
666 BIAsmNE = 653,
667 BIAsmNH = 654,
668 BIAsmNHE = 655,
669 BIAsmNL = 656,
670 BIAsmNLE = 657,
671 BIAsmNLH = 658,
672 BIAsmNM = 659,
673 BIAsmNO = 660,
674 BIAsmNP = 661,
675 BIAsmNZ = 662,
676 BIAsmO = 663,
677 BIAsmP = 664,
678 BIAsmZ = 665,
679 BIC = 666,
680 BICAsm = 667,
681 BPP = 668,
682 BPRP = 669,
683 BR = 670,
684 BRAS = 671,
685 BRASL = 672,
686 BRAsmE = 673,
687 BRAsmH = 674,
688 BRAsmHE = 675,
689 BRAsmL = 676,
690 BRAsmLE = 677,
691 BRAsmLH = 678,
692 BRAsmM = 679,
693 BRAsmNE = 680,
694 BRAsmNH = 681,
695 BRAsmNHE = 682,
696 BRAsmNL = 683,
697 BRAsmNLE = 684,
698 BRAsmNLH = 685,
699 BRAsmNM = 686,
700 BRAsmNO = 687,
701 BRAsmNP = 688,
702 BRAsmNZ = 689,
703 BRAsmO = 690,
704 BRAsmP = 691,
705 BRAsmZ = 692,
706 BRC = 693,
707 BRCAsm = 694,
708 BRCL = 695,
709 BRCLAsm = 696,
710 BRCT = 697,
711 BRCTG = 698,
712 BRCTH = 699,
713 BRXH = 700,
714 BRXHG = 701,
715 BRXLE = 702,
716 BRXLG = 703,
717 BSA = 704,
718 BSG = 705,
719 BSM = 706,
720 BXH = 707,
721 BXHG = 708,
722 BXLE = 709,
723 BXLEG = 710,
724 C = 711,
725 CAL = 712,
726 CALG = 713,
727 CALGF = 714,
728 CD = 715,
729 CDB = 716,
730 CDBR = 717,
731 CDFBR = 718,
732 CDFBRA = 719,
733 CDFR = 720,
734 CDFTR = 721,
735 CDGBR = 722,
736 CDGBRA = 723,
737 CDGR = 724,
738 CDGTR = 725,
739 CDGTRA = 726,
740 CDLFBR = 727,
741 CDLFTR = 728,
742 CDLGBR = 729,
743 CDLGTR = 730,
744 CDPT = 731,
745 CDR = 732,
746 CDS = 733,
747 CDSG = 734,
748 CDSTR = 735,
749 CDSY = 736,
750 CDTR = 737,
751 CDUTR = 738,
752 CDZT = 739,
753 CE = 740,
754 CEB = 741,
755 CEBR = 742,
756 CEDTR = 743,
757 CEFBR = 744,
758 CEFBRA = 745,
759 CEFR = 746,
760 CEGBR = 747,
761 CEGBRA = 748,
762 CEGR = 749,
763 CELFBR = 750,
764 CELGBR = 751,
765 CER = 752,
766 CEXTR = 753,
767 CFC = 754,
768 CFDBR = 755,
769 CFDBRA = 756,
770 CFDR = 757,
771 CFDTR = 758,
772 CFEBR = 759,
773 CFEBRA = 760,
774 CFER = 761,
775 CFI = 762,
776 CFXBR = 763,
777 CFXBRA = 764,
778 CFXR = 765,
779 CFXTR = 766,
780 CG = 767,
781 CGDBR = 768,
782 CGDBRA = 769,
783 CGDR = 770,
784 CGDTR = 771,
785 CGDTRA = 772,
786 CGEBR = 773,
787 CGEBRA = 774,
788 CGER = 775,
789 CGF = 776,
790 CGFI = 777,
791 CGFR = 778,
792 CGFRL = 779,
793 CGH = 780,
794 CGHI = 781,
795 CGHRL = 782,
796 CGHSI = 783,
797 CGIB = 784,
798 CGIBAsm = 785,
799 CGIBAsmE = 786,
800 CGIBAsmH = 787,
801 CGIBAsmHE = 788,
802 CGIBAsmL = 789,
803 CGIBAsmLE = 790,
804 CGIBAsmLH = 791,
805 CGIBAsmNE = 792,
806 CGIBAsmNH = 793,
807 CGIBAsmNHE = 794,
808 CGIBAsmNL = 795,
809 CGIBAsmNLE = 796,
810 CGIBAsmNLH = 797,
811 CGIJ = 798,
812 CGIJAsm = 799,
813 CGIJAsmE = 800,
814 CGIJAsmH = 801,
815 CGIJAsmHE = 802,
816 CGIJAsmL = 803,
817 CGIJAsmLE = 804,
818 CGIJAsmLH = 805,
819 CGIJAsmNE = 806,
820 CGIJAsmNH = 807,
821 CGIJAsmNHE = 808,
822 CGIJAsmNL = 809,
823 CGIJAsmNLE = 810,
824 CGIJAsmNLH = 811,
825 CGIT = 812,
826 CGITAsm = 813,
827 CGITAsmE = 814,
828 CGITAsmH = 815,
829 CGITAsmHE = 816,
830 CGITAsmL = 817,
831 CGITAsmLE = 818,
832 CGITAsmLH = 819,
833 CGITAsmNE = 820,
834 CGITAsmNH = 821,
835 CGITAsmNHE = 822,
836 CGITAsmNL = 823,
837 CGITAsmNLE = 824,
838 CGITAsmNLH = 825,
839 CGR = 826,
840 CGRB = 827,
841 CGRBAsm = 828,
842 CGRBAsmE = 829,
843 CGRBAsmH = 830,
844 CGRBAsmHE = 831,
845 CGRBAsmL = 832,
846 CGRBAsmLE = 833,
847 CGRBAsmLH = 834,
848 CGRBAsmNE = 835,
849 CGRBAsmNH = 836,
850 CGRBAsmNHE = 837,
851 CGRBAsmNL = 838,
852 CGRBAsmNLE = 839,
853 CGRBAsmNLH = 840,
854 CGRJ = 841,
855 CGRJAsm = 842,
856 CGRJAsmE = 843,
857 CGRJAsmH = 844,
858 CGRJAsmHE = 845,
859 CGRJAsmL = 846,
860 CGRJAsmLE = 847,
861 CGRJAsmLH = 848,
862 CGRJAsmNE = 849,
863 CGRJAsmNH = 850,
864 CGRJAsmNHE = 851,
865 CGRJAsmNL = 852,
866 CGRJAsmNLE = 853,
867 CGRJAsmNLH = 854,
868 CGRL = 855,
869 CGRT = 856,
870 CGRTAsm = 857,
871 CGRTAsmE = 858,
872 CGRTAsmH = 859,
873 CGRTAsmHE = 860,
874 CGRTAsmL = 861,
875 CGRTAsmLE = 862,
876 CGRTAsmLH = 863,
877 CGRTAsmNE = 864,
878 CGRTAsmNH = 865,
879 CGRTAsmNHE = 866,
880 CGRTAsmNL = 867,
881 CGRTAsmNLE = 868,
882 CGRTAsmNLH = 869,
883 CGXBR = 870,
884 CGXBRA = 871,
885 CGXR = 872,
886 CGXTR = 873,
887 CGXTRA = 874,
888 CH = 875,
889 CHF = 876,
890 CHHR = 877,
891 CHHSI = 878,
892 CHI = 879,
893 CHLR = 880,
894 CHRL = 881,
895 CHSI = 882,
896 CHY = 883,
897 CIB = 884,
898 CIBAsm = 885,
899 CIBAsmE = 886,
900 CIBAsmH = 887,
901 CIBAsmHE = 888,
902 CIBAsmL = 889,
903 CIBAsmLE = 890,
904 CIBAsmLH = 891,
905 CIBAsmNE = 892,
906 CIBAsmNH = 893,
907 CIBAsmNHE = 894,
908 CIBAsmNL = 895,
909 CIBAsmNLE = 896,
910 CIBAsmNLH = 897,
911 CIH = 898,
912 CIJ = 899,
913 CIJAsm = 900,
914 CIJAsmE = 901,
915 CIJAsmH = 902,
916 CIJAsmHE = 903,
917 CIJAsmL = 904,
918 CIJAsmLE = 905,
919 CIJAsmLH = 906,
920 CIJAsmNE = 907,
921 CIJAsmNH = 908,
922 CIJAsmNHE = 909,
923 CIJAsmNL = 910,
924 CIJAsmNLE = 911,
925 CIJAsmNLH = 912,
926 CIT = 913,
927 CITAsm = 914,
928 CITAsmE = 915,
929 CITAsmH = 916,
930 CITAsmHE = 917,
931 CITAsmL = 918,
932 CITAsmLE = 919,
933 CITAsmLH = 920,
934 CITAsmNE = 921,
935 CITAsmNH = 922,
936 CITAsmNHE = 923,
937 CITAsmNL = 924,
938 CITAsmNLE = 925,
939 CITAsmNLH = 926,
940 CKSM = 927,
941 CL = 928,
942 CLC = 929,
943 CLCL = 930,
944 CLCLE = 931,
945 CLCLU = 932,
946 CLFDBR = 933,
947 CLFDTR = 934,
948 CLFEBR = 935,
949 CLFHSI = 936,
950 CLFI = 937,
951 CLFIT = 938,
952 CLFITAsm = 939,
953 CLFITAsmE = 940,
954 CLFITAsmH = 941,
955 CLFITAsmHE = 942,
956 CLFITAsmL = 943,
957 CLFITAsmLE = 944,
958 CLFITAsmLH = 945,
959 CLFITAsmNE = 946,
960 CLFITAsmNH = 947,
961 CLFITAsmNHE = 948,
962 CLFITAsmNL = 949,
963 CLFITAsmNLE = 950,
964 CLFITAsmNLH = 951,
965 CLFXBR = 952,
966 CLFXTR = 953,
967 CLG = 954,
968 CLGDBR = 955,
969 CLGDTR = 956,
970 CLGEBR = 957,
971 CLGF = 958,
972 CLGFI = 959,
973 CLGFR = 960,
974 CLGFRL = 961,
975 CLGHRL = 962,
976 CLGHSI = 963,
977 CLGIB = 964,
978 CLGIBAsm = 965,
979 CLGIBAsmE = 966,
980 CLGIBAsmH = 967,
981 CLGIBAsmHE = 968,
982 CLGIBAsmL = 969,
983 CLGIBAsmLE = 970,
984 CLGIBAsmLH = 971,
985 CLGIBAsmNE = 972,
986 CLGIBAsmNH = 973,
987 CLGIBAsmNHE = 974,
988 CLGIBAsmNL = 975,
989 CLGIBAsmNLE = 976,
990 CLGIBAsmNLH = 977,
991 CLGIJ = 978,
992 CLGIJAsm = 979,
993 CLGIJAsmE = 980,
994 CLGIJAsmH = 981,
995 CLGIJAsmHE = 982,
996 CLGIJAsmL = 983,
997 CLGIJAsmLE = 984,
998 CLGIJAsmLH = 985,
999 CLGIJAsmNE = 986,
1000 CLGIJAsmNH = 987,
1001 CLGIJAsmNHE = 988,
1002 CLGIJAsmNL = 989,
1003 CLGIJAsmNLE = 990,
1004 CLGIJAsmNLH = 991,
1005 CLGIT = 992,
1006 CLGITAsm = 993,
1007 CLGITAsmE = 994,
1008 CLGITAsmH = 995,
1009 CLGITAsmHE = 996,
1010 CLGITAsmL = 997,
1011 CLGITAsmLE = 998,
1012 CLGITAsmLH = 999,
1013 CLGITAsmNE = 1000,
1014 CLGITAsmNH = 1001,
1015 CLGITAsmNHE = 1002,
1016 CLGITAsmNL = 1003,
1017 CLGITAsmNLE = 1004,
1018 CLGITAsmNLH = 1005,
1019 CLGR = 1006,
1020 CLGRB = 1007,
1021 CLGRBAsm = 1008,
1022 CLGRBAsmE = 1009,
1023 CLGRBAsmH = 1010,
1024 CLGRBAsmHE = 1011,
1025 CLGRBAsmL = 1012,
1026 CLGRBAsmLE = 1013,
1027 CLGRBAsmLH = 1014,
1028 CLGRBAsmNE = 1015,
1029 CLGRBAsmNH = 1016,
1030 CLGRBAsmNHE = 1017,
1031 CLGRBAsmNL = 1018,
1032 CLGRBAsmNLE = 1019,
1033 CLGRBAsmNLH = 1020,
1034 CLGRJ = 1021,
1035 CLGRJAsm = 1022,
1036 CLGRJAsmE = 1023,
1037 CLGRJAsmH = 1024,
1038 CLGRJAsmHE = 1025,
1039 CLGRJAsmL = 1026,
1040 CLGRJAsmLE = 1027,
1041 CLGRJAsmLH = 1028,
1042 CLGRJAsmNE = 1029,
1043 CLGRJAsmNH = 1030,
1044 CLGRJAsmNHE = 1031,
1045 CLGRJAsmNL = 1032,
1046 CLGRJAsmNLE = 1033,
1047 CLGRJAsmNLH = 1034,
1048 CLGRL = 1035,
1049 CLGRT = 1036,
1050 CLGRTAsm = 1037,
1051 CLGRTAsmE = 1038,
1052 CLGRTAsmH = 1039,
1053 CLGRTAsmHE = 1040,
1054 CLGRTAsmL = 1041,
1055 CLGRTAsmLE = 1042,
1056 CLGRTAsmLH = 1043,
1057 CLGRTAsmNE = 1044,
1058 CLGRTAsmNH = 1045,
1059 CLGRTAsmNHE = 1046,
1060 CLGRTAsmNL = 1047,
1061 CLGRTAsmNLE = 1048,
1062 CLGRTAsmNLH = 1049,
1063 CLGT = 1050,
1064 CLGTAsm = 1051,
1065 CLGTAsmE = 1052,
1066 CLGTAsmH = 1053,
1067 CLGTAsmHE = 1054,
1068 CLGTAsmL = 1055,
1069 CLGTAsmLE = 1056,
1070 CLGTAsmLH = 1057,
1071 CLGTAsmNE = 1058,
1072 CLGTAsmNH = 1059,
1073 CLGTAsmNHE = 1060,
1074 CLGTAsmNL = 1061,
1075 CLGTAsmNLE = 1062,
1076 CLGTAsmNLH = 1063,
1077 CLGXBR = 1064,
1078 CLGXTR = 1065,
1079 CLHF = 1066,
1080 CLHHR = 1067,
1081 CLHHSI = 1068,
1082 CLHLR = 1069,
1083 CLHRL = 1070,
1084 CLI = 1071,
1085 CLIB = 1072,
1086 CLIBAsm = 1073,
1087 CLIBAsmE = 1074,
1088 CLIBAsmH = 1075,
1089 CLIBAsmHE = 1076,
1090 CLIBAsmL = 1077,
1091 CLIBAsmLE = 1078,
1092 CLIBAsmLH = 1079,
1093 CLIBAsmNE = 1080,
1094 CLIBAsmNH = 1081,
1095 CLIBAsmNHE = 1082,
1096 CLIBAsmNL = 1083,
1097 CLIBAsmNLE = 1084,
1098 CLIBAsmNLH = 1085,
1099 CLIH = 1086,
1100 CLIJ = 1087,
1101 CLIJAsm = 1088,
1102 CLIJAsmE = 1089,
1103 CLIJAsmH = 1090,
1104 CLIJAsmHE = 1091,
1105 CLIJAsmL = 1092,
1106 CLIJAsmLE = 1093,
1107 CLIJAsmLH = 1094,
1108 CLIJAsmNE = 1095,
1109 CLIJAsmNH = 1096,
1110 CLIJAsmNHE = 1097,
1111 CLIJAsmNL = 1098,
1112 CLIJAsmNLE = 1099,
1113 CLIJAsmNLH = 1100,
1114 CLIY = 1101,
1115 CLM = 1102,
1116 CLMH = 1103,
1117 CLMY = 1104,
1118 CLR = 1105,
1119 CLRB = 1106,
1120 CLRBAsm = 1107,
1121 CLRBAsmE = 1108,
1122 CLRBAsmH = 1109,
1123 CLRBAsmHE = 1110,
1124 CLRBAsmL = 1111,
1125 CLRBAsmLE = 1112,
1126 CLRBAsmLH = 1113,
1127 CLRBAsmNE = 1114,
1128 CLRBAsmNH = 1115,
1129 CLRBAsmNHE = 1116,
1130 CLRBAsmNL = 1117,
1131 CLRBAsmNLE = 1118,
1132 CLRBAsmNLH = 1119,
1133 CLRJ = 1120,
1134 CLRJAsm = 1121,
1135 CLRJAsmE = 1122,
1136 CLRJAsmH = 1123,
1137 CLRJAsmHE = 1124,
1138 CLRJAsmL = 1125,
1139 CLRJAsmLE = 1126,
1140 CLRJAsmLH = 1127,
1141 CLRJAsmNE = 1128,
1142 CLRJAsmNH = 1129,
1143 CLRJAsmNHE = 1130,
1144 CLRJAsmNL = 1131,
1145 CLRJAsmNLE = 1132,
1146 CLRJAsmNLH = 1133,
1147 CLRL = 1134,
1148 CLRT = 1135,
1149 CLRTAsm = 1136,
1150 CLRTAsmE = 1137,
1151 CLRTAsmH = 1138,
1152 CLRTAsmHE = 1139,
1153 CLRTAsmL = 1140,
1154 CLRTAsmLE = 1141,
1155 CLRTAsmLH = 1142,
1156 CLRTAsmNE = 1143,
1157 CLRTAsmNH = 1144,
1158 CLRTAsmNHE = 1145,
1159 CLRTAsmNL = 1146,
1160 CLRTAsmNLE = 1147,
1161 CLRTAsmNLH = 1148,
1162 CLST = 1149,
1163 CLT = 1150,
1164 CLTAsm = 1151,
1165 CLTAsmE = 1152,
1166 CLTAsmH = 1153,
1167 CLTAsmHE = 1154,
1168 CLTAsmL = 1155,
1169 CLTAsmLE = 1156,
1170 CLTAsmLH = 1157,
1171 CLTAsmNE = 1158,
1172 CLTAsmNH = 1159,
1173 CLTAsmNHE = 1160,
1174 CLTAsmNL = 1161,
1175 CLTAsmNLE = 1162,
1176 CLTAsmNLH = 1163,
1177 CLY = 1164,
1178 CLZG = 1165,
1179 CMPSC = 1166,
1180 CP = 1167,
1181 CPDT = 1168,
1182 CPSDRdd = 1169,
1183 CPSDRdh = 1170,
1184 CPSDRds = 1171,
1185 CPSDRhd = 1172,
1186 CPSDRhh = 1173,
1187 CPSDRhs = 1174,
1188 CPSDRsd = 1175,
1189 CPSDRsh = 1176,
1190 CPSDRss = 1177,
1191 CPXT = 1178,
1192 CPYA = 1179,
1193 CR = 1180,
1194 CRB = 1181,
1195 CRBAsm = 1182,
1196 CRBAsmE = 1183,
1197 CRBAsmH = 1184,
1198 CRBAsmHE = 1185,
1199 CRBAsmL = 1186,
1200 CRBAsmLE = 1187,
1201 CRBAsmLH = 1188,
1202 CRBAsmNE = 1189,
1203 CRBAsmNH = 1190,
1204 CRBAsmNHE = 1191,
1205 CRBAsmNL = 1192,
1206 CRBAsmNLE = 1193,
1207 CRBAsmNLH = 1194,
1208 CRDTE = 1195,
1209 CRDTEOpt = 1196,
1210 CRJ = 1197,
1211 CRJAsm = 1198,
1212 CRJAsmE = 1199,
1213 CRJAsmH = 1200,
1214 CRJAsmHE = 1201,
1215 CRJAsmL = 1202,
1216 CRJAsmLE = 1203,
1217 CRJAsmLH = 1204,
1218 CRJAsmNE = 1205,
1219 CRJAsmNH = 1206,
1220 CRJAsmNHE = 1207,
1221 CRJAsmNL = 1208,
1222 CRJAsmNLE = 1209,
1223 CRJAsmNLH = 1210,
1224 CRL = 1211,
1225 CRT = 1212,
1226 CRTAsm = 1213,
1227 CRTAsmE = 1214,
1228 CRTAsmH = 1215,
1229 CRTAsmHE = 1216,
1230 CRTAsmL = 1217,
1231 CRTAsmLE = 1218,
1232 CRTAsmLH = 1219,
1233 CRTAsmNE = 1220,
1234 CRTAsmNH = 1221,
1235 CRTAsmNHE = 1222,
1236 CRTAsmNL = 1223,
1237 CRTAsmNLE = 1224,
1238 CRTAsmNLH = 1225,
1239 CS = 1226,
1240 CSCH = 1227,
1241 CSDTR = 1228,
1242 CSG = 1229,
1243 CSP = 1230,
1244 CSPG = 1231,
1245 CSST = 1232,
1246 CSXTR = 1233,
1247 CSY = 1234,
1248 CTZG = 1235,
1249 CU12 = 1236,
1250 CU12Opt = 1237,
1251 CU14 = 1238,
1252 CU14Opt = 1239,
1253 CU21 = 1240,
1254 CU21Opt = 1241,
1255 CU24 = 1242,
1256 CU24Opt = 1243,
1257 CU41 = 1244,
1258 CU42 = 1245,
1259 CUDTR = 1246,
1260 CUSE = 1247,
1261 CUTFU = 1248,
1262 CUTFUOpt = 1249,
1263 CUUTF = 1250,
1264 CUUTFOpt = 1251,
1265 CUXTR = 1252,
1266 CVB = 1253,
1267 CVBG = 1254,
1268 CVBY = 1255,
1269 CVD = 1256,
1270 CVDG = 1257,
1271 CVDY = 1258,
1272 CXBR = 1259,
1273 CXFBR = 1260,
1274 CXFBRA = 1261,
1275 CXFR = 1262,
1276 CXFTR = 1263,
1277 CXGBR = 1264,
1278 CXGBRA = 1265,
1279 CXGR = 1266,
1280 CXGTR = 1267,
1281 CXGTRA = 1268,
1282 CXLFBR = 1269,
1283 CXLFTR = 1270,
1284 CXLGBR = 1271,
1285 CXLGTR = 1272,
1286 CXPT = 1273,
1287 CXR = 1274,
1288 CXSTR = 1275,
1289 CXTR = 1276,
1290 CXUTR = 1277,
1291 CXZT = 1278,
1292 CY = 1279,
1293 CZDT = 1280,
1294 CZXT = 1281,
1295 D = 1282,
1296 DD = 1283,
1297 DDB = 1284,
1298 DDBR = 1285,
1299 DDR = 1286,
1300 DDTR = 1287,
1301 DDTRA = 1288,
1302 DE = 1289,
1303 DEB = 1290,
1304 DEBR = 1291,
1305 DER = 1292,
1306 DFLTCC = 1293,
1307 DIAG = 1294,
1308 DIDBR = 1295,
1309 DIEBR = 1296,
1310 DL = 1297,
1311 DLG = 1298,
1312 DLGR = 1299,
1313 DLR = 1300,
1314 DP = 1301,
1315 DR = 1302,
1316 DSG = 1303,
1317 DSGF = 1304,
1318 DSGFR = 1305,
1319 DSGR = 1306,
1320 DXBR = 1307,
1321 DXR = 1308,
1322 DXTR = 1309,
1323 DXTRA = 1310,
1324 EAR = 1311,
1325 ECAG = 1312,
1326 ECCTR = 1313,
1327 ECPGA = 1314,
1328 ECTG = 1315,
1329 ED = 1316,
1330 EDMK = 1317,
1331 EEDTR = 1318,
1332 EEXTR = 1319,
1333 EFPC = 1320,
1334 EPAIR = 1321,
1335 EPAR = 1322,
1336 EPCTR = 1323,
1337 EPSW = 1324,
1338 EREG = 1325,
1339 EREGG = 1326,
1340 ESAIR = 1327,
1341 ESAR = 1328,
1342 ESDTR = 1329,
1343 ESEA = 1330,
1344 ESTA = 1331,
1345 ESXTR = 1332,
1346 ETND = 1333,
1347 EX = 1334,
1348 EXRL = 1335,
1349 FIDBR = 1336,
1350 FIDBRA = 1337,
1351 FIDR = 1338,
1352 FIDTR = 1339,
1353 FIEBR = 1340,
1354 FIEBRA = 1341,
1355 FIER = 1342,
1356 FIXBR = 1343,
1357 FIXBRA = 1344,
1358 FIXR = 1345,
1359 FIXTR = 1346,
1360 FLOGR = 1347,
1361 HDR = 1348,
1362 HER = 1349,
1363 HSCH = 1350,
1364 IAC = 1351,
1365 IC = 1352,
1366 IC32 = 1353,
1367 IC32Y = 1354,
1368 ICM = 1355,
1369 ICMH = 1356,
1370 ICMY = 1357,
1371 ICY = 1358,
1372 IDTE = 1359,
1373 IDTEOpt = 1360,
1374 IEDTR = 1361,
1375 IEXTR = 1362,
1376 IIHF = 1363,
1377 IIHH = 1364,
1378 IIHL = 1365,
1379 IILF = 1366,
1380 IILH = 1367,
1381 IILL = 1368,
1382 IPK = 1369,
1383 IPM = 1370,
1384 IPTE = 1371,
1385 IPTEOpt = 1372,
1386 IPTEOptOpt = 1373,
1387 IRBM = 1374,
1388 ISKE = 1375,
1389 IVSK = 1376,
1390 InsnE = 1377,
1391 InsnRI = 1378,
1392 InsnRIE = 1379,
1393 InsnRIL = 1380,
1394 InsnRILU = 1381,
1395 InsnRIS = 1382,
1396 InsnRR = 1383,
1397 InsnRRE = 1384,
1398 InsnRRF = 1385,
1399 InsnRRS = 1386,
1400 InsnRS = 1387,
1401 InsnRSE = 1388,
1402 InsnRSI = 1389,
1403 InsnRSY = 1390,
1404 InsnRX = 1391,
1405 InsnRXE = 1392,
1406 InsnRXF = 1393,
1407 InsnRXY = 1394,
1408 InsnS = 1395,
1409 InsnSI = 1396,
1410 InsnSIL = 1397,
1411 InsnSIY = 1398,
1412 InsnSS = 1399,
1413 InsnSSE = 1400,
1414 InsnSSF = 1401,
1415 InsnVRI = 1402,
1416 InsnVRR = 1403,
1417 InsnVRS = 1404,
1418 InsnVRV = 1405,
1419 InsnVRX = 1406,
1420 InsnVSI = 1407,
1421 J = 1408,
1422 JAsmE = 1409,
1423 JAsmH = 1410,
1424 JAsmHE = 1411,
1425 JAsmL = 1412,
1426 JAsmLE = 1413,
1427 JAsmLH = 1414,
1428 JAsmM = 1415,
1429 JAsmNE = 1416,
1430 JAsmNH = 1417,
1431 JAsmNHE = 1418,
1432 JAsmNL = 1419,
1433 JAsmNLE = 1420,
1434 JAsmNLH = 1421,
1435 JAsmNM = 1422,
1436 JAsmNO = 1423,
1437 JAsmNP = 1424,
1438 JAsmNZ = 1425,
1439 JAsmO = 1426,
1440 JAsmP = 1427,
1441 JAsmZ = 1428,
1442 JG = 1429,
1443 JGAsmE = 1430,
1444 JGAsmH = 1431,
1445 JGAsmHE = 1432,
1446 JGAsmL = 1433,
1447 JGAsmLE = 1434,
1448 JGAsmLH = 1435,
1449 JGAsmM = 1436,
1450 JGAsmNE = 1437,
1451 JGAsmNH = 1438,
1452 JGAsmNHE = 1439,
1453 JGAsmNL = 1440,
1454 JGAsmNLE = 1441,
1455 JGAsmNLH = 1442,
1456 JGAsmNM = 1443,
1457 JGAsmNO = 1444,
1458 JGAsmNP = 1445,
1459 JGAsmNZ = 1446,
1460 JGAsmO = 1447,
1461 JGAsmP = 1448,
1462 JGAsmZ = 1449,
1463 JGNOP = 1450,
1464 JNOP = 1451,
1465 KDB = 1452,
1466 KDBR = 1453,
1467 KDSA = 1454,
1468 KDTR = 1455,
1469 KEB = 1456,
1470 KEBR = 1457,
1471 KIMD = 1458,
1472 KIMDOpt = 1459,
1473 KLMD = 1460,
1474 KLMDOpt = 1461,
1475 KM = 1462,
1476 KMA = 1463,
1477 KMAC = 1464,
1478 KMC = 1465,
1479 KMCTR = 1466,
1480 KMF = 1467,
1481 KMO = 1468,
1482 KXBR = 1469,
1483 KXTR = 1470,
1484 L = 1471,
1485 LA = 1472,
1486 LAA = 1473,
1487 LAAG = 1474,
1488 LAAL = 1475,
1489 LAALG = 1476,
1490 LAE = 1477,
1491 LAEY = 1478,
1492 LAM = 1479,
1493 LAMY = 1480,
1494 LAN = 1481,
1495 LANG = 1482,
1496 LAO = 1483,
1497 LAOG = 1484,
1498 LARL = 1485,
1499 LASP = 1486,
1500 LAT = 1487,
1501 LAX = 1488,
1502 LAXG = 1489,
1503 LAY = 1490,
1504 LB = 1491,
1505 LBEAR = 1492,
1506 LBH = 1493,
1507 LBR = 1494,
1508 LCBB = 1495,
1509 LCCTL = 1496,
1510 LCDBR = 1497,
1511 LCDFR = 1498,
1512 LCDFR_16 = 1499,
1513 LCDFR_32 = 1500,
1514 LCDR = 1501,
1515 LCEBR = 1502,
1516 LCER = 1503,
1517 LCGFR = 1504,
1518 LCGR = 1505,
1519 LCR = 1506,
1520 LCTL = 1507,
1521 LCTLG = 1508,
1522 LCXBR = 1509,
1523 LCXR = 1510,
1524 LD = 1511,
1525 LDE = 1512,
1526 LDE32 = 1513,
1527 LDEB = 1514,
1528 LDEBR = 1515,
1529 LDER = 1516,
1530 LDETR = 1517,
1531 LDGR = 1518,
1532 LDR = 1519,
1533 LDR16 = 1520,
1534 LDR32 = 1521,
1535 LDXBR = 1522,
1536 LDXBRA = 1523,
1537 LDXR = 1524,
1538 LDXTR = 1525,
1539 LDY = 1526,
1540 LE = 1527,
1541 LE16 = 1528,
1542 LE16Y = 1529,
1543 LEDBR = 1530,
1544 LEDBRA = 1531,
1545 LEDR = 1532,
1546 LEDTR = 1533,
1547 LER = 1534,
1548 LER16 = 1535,
1549 LEXBR = 1536,
1550 LEXBRA = 1537,
1551 LEXR = 1538,
1552 LEY = 1539,
1553 LFAS = 1540,
1554 LFH = 1541,
1555 LFHAT = 1542,
1556 LFPC = 1543,
1557 LG = 1544,
1558 LGAT = 1545,
1559 LGB = 1546,
1560 LGBR = 1547,
1561 LGDR = 1548,
1562 LGF = 1549,
1563 LGFI = 1550,
1564 LGFR = 1551,
1565 LGFRL = 1552,
1566 LGG = 1553,
1567 LGH = 1554,
1568 LGHI = 1555,
1569 LGHR = 1556,
1570 LGHRL = 1557,
1571 LGR = 1558,
1572 LGRL = 1559,
1573 LGSC = 1560,
1574 LH = 1561,
1575 LHH = 1562,
1576 LHI = 1563,
1577 LHR = 1564,
1578 LHRL = 1565,
1579 LHY = 1566,
1580 LLC = 1567,
1581 LLCH = 1568,
1582 LLCR = 1569,
1583 LLGC = 1570,
1584 LLGCR = 1571,
1585 LLGF = 1572,
1586 LLGFAT = 1573,
1587 LLGFR = 1574,
1588 LLGFRL = 1575,
1589 LLGFSG = 1576,
1590 LLGH = 1577,
1591 LLGHR = 1578,
1592 LLGHRL = 1579,
1593 LLGT = 1580,
1594 LLGTAT = 1581,
1595 LLGTR = 1582,
1596 LLH = 1583,
1597 LLHH = 1584,
1598 LLHR = 1585,
1599 LLHRL = 1586,
1600 LLIHF = 1587,
1601 LLIHH = 1588,
1602 LLIHL = 1589,
1603 LLILF = 1590,
1604 LLILH = 1591,
1605 LLILL = 1592,
1606 LLXAB = 1593,
1607 LLXAF = 1594,
1608 LLXAG = 1595,
1609 LLXAH = 1596,
1610 LLXAQ = 1597,
1611 LLZRGF = 1598,
1612 LM = 1599,
1613 LMD = 1600,
1614 LMG = 1601,
1615 LMH = 1602,
1616 LMY = 1603,
1617 LNDBR = 1604,
1618 LNDFR = 1605,
1619 LNDFR_16 = 1606,
1620 LNDFR_32 = 1607,
1621 LNDR = 1608,
1622 LNEBR = 1609,
1623 LNER = 1610,
1624 LNGFR = 1611,
1625 LNGR = 1612,
1626 LNR = 1613,
1627 LNXBR = 1614,
1628 LNXR = 1615,
1629 LOC = 1616,
1630 LOCAsm = 1617,
1631 LOCAsmE = 1618,
1632 LOCAsmH = 1619,
1633 LOCAsmHE = 1620,
1634 LOCAsmL = 1621,
1635 LOCAsmLE = 1622,
1636 LOCAsmLH = 1623,
1637 LOCAsmM = 1624,
1638 LOCAsmNE = 1625,
1639 LOCAsmNH = 1626,
1640 LOCAsmNHE = 1627,
1641 LOCAsmNL = 1628,
1642 LOCAsmNLE = 1629,
1643 LOCAsmNLH = 1630,
1644 LOCAsmNM = 1631,
1645 LOCAsmNO = 1632,
1646 LOCAsmNP = 1633,
1647 LOCAsmNZ = 1634,
1648 LOCAsmO = 1635,
1649 LOCAsmP = 1636,
1650 LOCAsmZ = 1637,
1651 LOCFH = 1638,
1652 LOCFHAsm = 1639,
1653 LOCFHAsmE = 1640,
1654 LOCFHAsmH = 1641,
1655 LOCFHAsmHE = 1642,
1656 LOCFHAsmL = 1643,
1657 LOCFHAsmLE = 1644,
1658 LOCFHAsmLH = 1645,
1659 LOCFHAsmM = 1646,
1660 LOCFHAsmNE = 1647,
1661 LOCFHAsmNH = 1648,
1662 LOCFHAsmNHE = 1649,
1663 LOCFHAsmNL = 1650,
1664 LOCFHAsmNLE = 1651,
1665 LOCFHAsmNLH = 1652,
1666 LOCFHAsmNM = 1653,
1667 LOCFHAsmNO = 1654,
1668 LOCFHAsmNP = 1655,
1669 LOCFHAsmNZ = 1656,
1670 LOCFHAsmO = 1657,
1671 LOCFHAsmP = 1658,
1672 LOCFHAsmZ = 1659,
1673 LOCFHR = 1660,
1674 LOCFHRAsm = 1661,
1675 LOCFHRAsmE = 1662,
1676 LOCFHRAsmH = 1663,
1677 LOCFHRAsmHE = 1664,
1678 LOCFHRAsmL = 1665,
1679 LOCFHRAsmLE = 1666,
1680 LOCFHRAsmLH = 1667,
1681 LOCFHRAsmM = 1668,
1682 LOCFHRAsmNE = 1669,
1683 LOCFHRAsmNH = 1670,
1684 LOCFHRAsmNHE = 1671,
1685 LOCFHRAsmNL = 1672,
1686 LOCFHRAsmNLE = 1673,
1687 LOCFHRAsmNLH = 1674,
1688 LOCFHRAsmNM = 1675,
1689 LOCFHRAsmNO = 1676,
1690 LOCFHRAsmNP = 1677,
1691 LOCFHRAsmNZ = 1678,
1692 LOCFHRAsmO = 1679,
1693 LOCFHRAsmP = 1680,
1694 LOCFHRAsmZ = 1681,
1695 LOCG = 1682,
1696 LOCGAsm = 1683,
1697 LOCGAsmE = 1684,
1698 LOCGAsmH = 1685,
1699 LOCGAsmHE = 1686,
1700 LOCGAsmL = 1687,
1701 LOCGAsmLE = 1688,
1702 LOCGAsmLH = 1689,
1703 LOCGAsmM = 1690,
1704 LOCGAsmNE = 1691,
1705 LOCGAsmNH = 1692,
1706 LOCGAsmNHE = 1693,
1707 LOCGAsmNL = 1694,
1708 LOCGAsmNLE = 1695,
1709 LOCGAsmNLH = 1696,
1710 LOCGAsmNM = 1697,
1711 LOCGAsmNO = 1698,
1712 LOCGAsmNP = 1699,
1713 LOCGAsmNZ = 1700,
1714 LOCGAsmO = 1701,
1715 LOCGAsmP = 1702,
1716 LOCGAsmZ = 1703,
1717 LOCGHI = 1704,
1718 LOCGHIAsm = 1705,
1719 LOCGHIAsmE = 1706,
1720 LOCGHIAsmH = 1707,
1721 LOCGHIAsmHE = 1708,
1722 LOCGHIAsmL = 1709,
1723 LOCGHIAsmLE = 1710,
1724 LOCGHIAsmLH = 1711,
1725 LOCGHIAsmM = 1712,
1726 LOCGHIAsmNE = 1713,
1727 LOCGHIAsmNH = 1714,
1728 LOCGHIAsmNHE = 1715,
1729 LOCGHIAsmNL = 1716,
1730 LOCGHIAsmNLE = 1717,
1731 LOCGHIAsmNLH = 1718,
1732 LOCGHIAsmNM = 1719,
1733 LOCGHIAsmNO = 1720,
1734 LOCGHIAsmNP = 1721,
1735 LOCGHIAsmNZ = 1722,
1736 LOCGHIAsmO = 1723,
1737 LOCGHIAsmP = 1724,
1738 LOCGHIAsmZ = 1725,
1739 LOCGR = 1726,
1740 LOCGRAsm = 1727,
1741 LOCGRAsmE = 1728,
1742 LOCGRAsmH = 1729,
1743 LOCGRAsmHE = 1730,
1744 LOCGRAsmL = 1731,
1745 LOCGRAsmLE = 1732,
1746 LOCGRAsmLH = 1733,
1747 LOCGRAsmM = 1734,
1748 LOCGRAsmNE = 1735,
1749 LOCGRAsmNH = 1736,
1750 LOCGRAsmNHE = 1737,
1751 LOCGRAsmNL = 1738,
1752 LOCGRAsmNLE = 1739,
1753 LOCGRAsmNLH = 1740,
1754 LOCGRAsmNM = 1741,
1755 LOCGRAsmNO = 1742,
1756 LOCGRAsmNP = 1743,
1757 LOCGRAsmNZ = 1744,
1758 LOCGRAsmO = 1745,
1759 LOCGRAsmP = 1746,
1760 LOCGRAsmZ = 1747,
1761 LOCHHI = 1748,
1762 LOCHHIAsm = 1749,
1763 LOCHHIAsmE = 1750,
1764 LOCHHIAsmH = 1751,
1765 LOCHHIAsmHE = 1752,
1766 LOCHHIAsmL = 1753,
1767 LOCHHIAsmLE = 1754,
1768 LOCHHIAsmLH = 1755,
1769 LOCHHIAsmM = 1756,
1770 LOCHHIAsmNE = 1757,
1771 LOCHHIAsmNH = 1758,
1772 LOCHHIAsmNHE = 1759,
1773 LOCHHIAsmNL = 1760,
1774 LOCHHIAsmNLE = 1761,
1775 LOCHHIAsmNLH = 1762,
1776 LOCHHIAsmNM = 1763,
1777 LOCHHIAsmNO = 1764,
1778 LOCHHIAsmNP = 1765,
1779 LOCHHIAsmNZ = 1766,
1780 LOCHHIAsmO = 1767,
1781 LOCHHIAsmP = 1768,
1782 LOCHHIAsmZ = 1769,
1783 LOCHI = 1770,
1784 LOCHIAsm = 1771,
1785 LOCHIAsmE = 1772,
1786 LOCHIAsmH = 1773,
1787 LOCHIAsmHE = 1774,
1788 LOCHIAsmL = 1775,
1789 LOCHIAsmLE = 1776,
1790 LOCHIAsmLH = 1777,
1791 LOCHIAsmM = 1778,
1792 LOCHIAsmNE = 1779,
1793 LOCHIAsmNH = 1780,
1794 LOCHIAsmNHE = 1781,
1795 LOCHIAsmNL = 1782,
1796 LOCHIAsmNLE = 1783,
1797 LOCHIAsmNLH = 1784,
1798 LOCHIAsmNM = 1785,
1799 LOCHIAsmNO = 1786,
1800 LOCHIAsmNP = 1787,
1801 LOCHIAsmNZ = 1788,
1802 LOCHIAsmO = 1789,
1803 LOCHIAsmP = 1790,
1804 LOCHIAsmZ = 1791,
1805 LOCR = 1792,
1806 LOCRAsm = 1793,
1807 LOCRAsmE = 1794,
1808 LOCRAsmH = 1795,
1809 LOCRAsmHE = 1796,
1810 LOCRAsmL = 1797,
1811 LOCRAsmLE = 1798,
1812 LOCRAsmLH = 1799,
1813 LOCRAsmM = 1800,
1814 LOCRAsmNE = 1801,
1815 LOCRAsmNH = 1802,
1816 LOCRAsmNHE = 1803,
1817 LOCRAsmNL = 1804,
1818 LOCRAsmNLE = 1805,
1819 LOCRAsmNLH = 1806,
1820 LOCRAsmNM = 1807,
1821 LOCRAsmNO = 1808,
1822 LOCRAsmNP = 1809,
1823 LOCRAsmNZ = 1810,
1824 LOCRAsmO = 1811,
1825 LOCRAsmP = 1812,
1826 LOCRAsmZ = 1813,
1827 LPCTL = 1814,
1828 LPD = 1815,
1829 LPDBR = 1816,
1830 LPDFR = 1817,
1831 LPDFR_16 = 1818,
1832 LPDFR_32 = 1819,
1833 LPDG = 1820,
1834 LPDR = 1821,
1835 LPEBR = 1822,
1836 LPER = 1823,
1837 LPGFR = 1824,
1838 LPGR = 1825,
1839 LPP = 1826,
1840 LPQ = 1827,
1841 LPR = 1828,
1842 LPSW = 1829,
1843 LPSWE = 1830,
1844 LPSWEY = 1831,
1845 LPTEA = 1832,
1846 LPXBR = 1833,
1847 LPXR = 1834,
1848 LR = 1835,
1849 LRA = 1836,
1850 LRAG = 1837,
1851 LRAY = 1838,
1852 LRDR = 1839,
1853 LRER = 1840,
1854 LRL = 1841,
1855 LRV = 1842,
1856 LRVG = 1843,
1857 LRVGR = 1844,
1858 LRVH = 1845,
1859 LRVR = 1846,
1860 LSCTL = 1847,
1861 LT = 1848,
1862 LTDBR = 1849,
1863 LTDR = 1850,
1864 LTDTR = 1851,
1865 LTEBR = 1852,
1866 LTER = 1853,
1867 LTG = 1854,
1868 LTGF = 1855,
1869 LTGFR = 1856,
1870 LTGR = 1857,
1871 LTR = 1858,
1872 LTXBR = 1859,
1873 LTXR = 1860,
1874 LTXTR = 1861,
1875 LURA = 1862,
1876 LURAG = 1863,
1877 LXAB = 1864,
1878 LXAF = 1865,
1879 LXAG = 1866,
1880 LXAH = 1867,
1881 LXAQ = 1868,
1882 LXD = 1869,
1883 LXDB = 1870,
1884 LXDBR = 1871,
1885 LXDR = 1872,
1886 LXDTR = 1873,
1887 LXE = 1874,
1888 LXEB = 1875,
1889 LXEBR = 1876,
1890 LXER = 1877,
1891 LXR = 1878,
1892 LY = 1879,
1893 LZDR = 1880,
1894 LZER = 1881,
1895 LZER_16 = 1882,
1896 LZRF = 1883,
1897 LZRG = 1884,
1898 LZXR = 1885,
1899 M = 1886,
1900 MAD = 1887,
1901 MADB = 1888,
1902 MADBR = 1889,
1903 MADR = 1890,
1904 MAE = 1891,
1905 MAEB = 1892,
1906 MAEBR = 1893,
1907 MAER = 1894,
1908 MAY = 1895,
1909 MAYH = 1896,
1910 MAYHR = 1897,
1911 MAYL = 1898,
1912 MAYLR = 1899,
1913 MAYR = 1900,
1914 MC = 1901,
1915 MD = 1902,
1916 MDB = 1903,
1917 MDBR = 1904,
1918 MDE = 1905,
1919 MDEB = 1906,
1920 MDEBR = 1907,
1921 MDER = 1908,
1922 MDR = 1909,
1923 MDTR = 1910,
1924 MDTRA = 1911,
1925 ME = 1912,
1926 MEE = 1913,
1927 MEEB = 1914,
1928 MEEBR = 1915,
1929 MEER = 1916,
1930 MER = 1917,
1931 MFY = 1918,
1932 MG = 1919,
1933 MGH = 1920,
1934 MGHI = 1921,
1935 MGRK = 1922,
1936 MH = 1923,
1937 MHI = 1924,
1938 MHY = 1925,
1939 ML = 1926,
1940 MLG = 1927,
1941 MLGR = 1928,
1942 MLR = 1929,
1943 MP = 1930,
1944 MR = 1931,
1945 MS = 1932,
1946 MSC = 1933,
1947 MSCH = 1934,
1948 MSD = 1935,
1949 MSDB = 1936,
1950 MSDBR = 1937,
1951 MSDR = 1938,
1952 MSE = 1939,
1953 MSEB = 1940,
1954 MSEBR = 1941,
1955 MSER = 1942,
1956 MSFI = 1943,
1957 MSG = 1944,
1958 MSGC = 1945,
1959 MSGF = 1946,
1960 MSGFI = 1947,
1961 MSGFR = 1948,
1962 MSGR = 1949,
1963 MSGRKC = 1950,
1964 MSR = 1951,
1965 MSRKC = 1952,
1966 MSTA = 1953,
1967 MSY = 1954,
1968 MVC = 1955,
1969 MVCDK = 1956,
1970 MVCIN = 1957,
1971 MVCK = 1958,
1972 MVCL = 1959,
1973 MVCLE = 1960,
1974 MVCLU = 1961,
1975 MVCOS = 1962,
1976 MVCP = 1963,
1977 MVCRL = 1964,
1978 MVCS = 1965,
1979 MVCSK = 1966,
1980 MVGHI = 1967,
1981 MVHHI = 1968,
1982 MVHI = 1969,
1983 MVI = 1970,
1984 MVIY = 1971,
1985 MVN = 1972,
1986 MVO = 1973,
1987 MVPG = 1974,
1988 MVST = 1975,
1989 MVZ = 1976,
1990 MXBR = 1977,
1991 MXD = 1978,
1992 MXDB = 1979,
1993 MXDBR = 1980,
1994 MXDR = 1981,
1995 MXR = 1982,
1996 MXTR = 1983,
1997 MXTRA = 1984,
1998 MY = 1985,
1999 MYH = 1986,
2000 MYHR = 1987,
2001 MYL = 1988,
2002 MYLR = 1989,
2003 MYR = 1990,
2004 N = 1991,
2005 NC = 1992,
2006 NCGRK = 1993,
2007 NCRK = 1994,
2008 NG = 1995,
2009 NGR = 1996,
2010 NGRK = 1997,
2011 NI = 1998,
2012 NIAI = 1999,
2013 NIHF = 2000,
2014 NIHH = 2001,
2015 NIHL = 2002,
2016 NILF = 2003,
2017 NILH = 2004,
2018 NILL = 2005,
2019 NIY = 2006,
2020 NNGRK = 2007,
2021 NNPA = 2008,
2022 NNRK = 2009,
2023 NOGRK = 2010,
2024 NOP = 2011,
2025 NOPOpt = 2012,
2026 NOPR = 2013,
2027 NOPROpt = 2014,
2028 NORK = 2015,
2029 NOTGR = 2016,
2030 NOTR = 2017,
2031 NR = 2018,
2032 NRK = 2019,
2033 NTSTG = 2020,
2034 NXGRK = 2021,
2035 NXRK = 2022,
2036 NY = 2023,
2037 O = 2024,
2038 OC = 2025,
2039 OCGRK = 2026,
2040 OCRK = 2027,
2041 OG = 2028,
2042 OGR = 2029,
2043 OGRK = 2030,
2044 OI = 2031,
2045 OIHF = 2032,
2046 OIHH = 2033,
2047 OIHL = 2034,
2048 OILF = 2035,
2049 OILH = 2036,
2050 OILL = 2037,
2051 OIY = 2038,
2052 OR = 2039,
2053 ORK = 2040,
2054 OY = 2041,
2055 PACK = 2042,
2056 PALB = 2043,
2057 PC = 2044,
2058 PCC = 2045,
2059 PCKMO = 2046,
2060 PFCR = 2047,
2061 PFD = 2048,
2062 PFDRL = 2049,
2063 PFMF = 2050,
2064 PFPO = 2051,
2065 PGIN = 2052,
2066 PGOUT = 2053,
2067 PKA = 2054,
2068 PKU = 2055,
2069 PLO = 2056,
2070 POPCNT = 2057,
2071 POPCNTOpt = 2058,
2072 PPA = 2059,
2073 PPNO = 2060,
2074 PR = 2061,
2075 PRNO = 2062,
2076 PT = 2063,
2077 PTF = 2064,
2078 PTFF = 2065,
2079 PTI = 2066,
2080 PTLB = 2067,
2081 QADTR = 2068,
2082 QAXTR = 2069,
2083 QCTRI = 2070,
2084 QPACI = 2071,
2085 QSI = 2072,
2086 RCHP = 2073,
2087 RDP = 2074,
2088 RDPOpt = 2075,
2089 RISBG = 2076,
2090 RISBG32 = 2077,
2091 RISBG32Opt = 2078,
2092 RISBGN = 2079,
2093 RISBGNOpt = 2080,
2094 RISBGNZ = 2081,
2095 RISBGNZOpt = 2082,
2096 RISBGOpt = 2083,
2097 RISBGZ = 2084,
2098 RISBGZOpt = 2085,
2099 RISBHG = 2086,
2100 RISBHGOpt = 2087,
2101 RISBLG = 2088,
2102 RISBLGOpt = 2089,
2103 RLL = 2090,
2104 RLLG = 2091,
2105 RNSBG = 2092,
2106 RNSBGOpt = 2093,
2107 ROSBG = 2094,
2108 ROSBGOpt = 2095,
2109 RP = 2096,
2110 RRBE = 2097,
2111 RRBM = 2098,
2112 RRDTR = 2099,
2113 RRXTR = 2100,
2114 RSCH = 2101,
2115 RXSBG = 2102,
2116 RXSBGOpt = 2103,
2117 S = 2104,
2118 SAC = 2105,
2119 SACF = 2106,
2120 SAL = 2107,
2121 SAM24 = 2108,
2122 SAM31 = 2109,
2123 SAM64 = 2110,
2124 SAR = 2111,
2125 SCCTR = 2112,
2126 SCHM = 2113,
2127 SCK = 2114,
2128 SCKC = 2115,
2129 SCKPF = 2116,
2130 SD = 2117,
2131 SDB = 2118,
2132 SDBR = 2119,
2133 SDR = 2120,
2134 SDTR = 2121,
2135 SDTRA = 2122,
2136 SE = 2123,
2137 SEB = 2124,
2138 SEBR = 2125,
2139 SELFHR = 2126,
2140 SELFHRAsm = 2127,
2141 SELFHRAsmE = 2128,
2142 SELFHRAsmH = 2129,
2143 SELFHRAsmHE = 2130,
2144 SELFHRAsmL = 2131,
2145 SELFHRAsmLE = 2132,
2146 SELFHRAsmLH = 2133,
2147 SELFHRAsmM = 2134,
2148 SELFHRAsmNE = 2135,
2149 SELFHRAsmNH = 2136,
2150 SELFHRAsmNHE = 2137,
2151 SELFHRAsmNL = 2138,
2152 SELFHRAsmNLE = 2139,
2153 SELFHRAsmNLH = 2140,
2154 SELFHRAsmNM = 2141,
2155 SELFHRAsmNO = 2142,
2156 SELFHRAsmNP = 2143,
2157 SELFHRAsmNZ = 2144,
2158 SELFHRAsmO = 2145,
2159 SELFHRAsmP = 2146,
2160 SELFHRAsmZ = 2147,
2161 SELGR = 2148,
2162 SELGRAsm = 2149,
2163 SELGRAsmE = 2150,
2164 SELGRAsmH = 2151,
2165 SELGRAsmHE = 2152,
2166 SELGRAsmL = 2153,
2167 SELGRAsmLE = 2154,
2168 SELGRAsmLH = 2155,
2169 SELGRAsmM = 2156,
2170 SELGRAsmNE = 2157,
2171 SELGRAsmNH = 2158,
2172 SELGRAsmNHE = 2159,
2173 SELGRAsmNL = 2160,
2174 SELGRAsmNLE = 2161,
2175 SELGRAsmNLH = 2162,
2176 SELGRAsmNM = 2163,
2177 SELGRAsmNO = 2164,
2178 SELGRAsmNP = 2165,
2179 SELGRAsmNZ = 2166,
2180 SELGRAsmO = 2167,
2181 SELGRAsmP = 2168,
2182 SELGRAsmZ = 2169,
2183 SELR = 2170,
2184 SELRAsm = 2171,
2185 SELRAsmE = 2172,
2186 SELRAsmH = 2173,
2187 SELRAsmHE = 2174,
2188 SELRAsmL = 2175,
2189 SELRAsmLE = 2176,
2190 SELRAsmLH = 2177,
2191 SELRAsmM = 2178,
2192 SELRAsmNE = 2179,
2193 SELRAsmNH = 2180,
2194 SELRAsmNHE = 2181,
2195 SELRAsmNL = 2182,
2196 SELRAsmNLE = 2183,
2197 SELRAsmNLH = 2184,
2198 SELRAsmNM = 2185,
2199 SELRAsmNO = 2186,
2200 SELRAsmNP = 2187,
2201 SELRAsmNZ = 2188,
2202 SELRAsmO = 2189,
2203 SELRAsmP = 2190,
2204 SELRAsmZ = 2191,
2205 SER = 2192,
2206 SFASR = 2193,
2207 SFPC = 2194,
2208 SG = 2195,
2209 SGF = 2196,
2210 SGFR = 2197,
2211 SGH = 2198,
2212 SGR = 2199,
2213 SGRK = 2200,
2214 SH = 2201,
2215 SHHHR = 2202,
2216 SHHLR = 2203,
2217 SHY = 2204,
2218 SIE = 2205,
2219 SIGA = 2206,
2220 SIGP = 2207,
2221 SL = 2208,
2222 SLA = 2209,
2223 SLAG = 2210,
2224 SLAK = 2211,
2225 SLB = 2212,
2226 SLBG = 2213,
2227 SLBGR = 2214,
2228 SLBR = 2215,
2229 SLDA = 2216,
2230 SLDL = 2217,
2231 SLDT = 2218,
2232 SLFI = 2219,
2233 SLG = 2220,
2234 SLGF = 2221,
2235 SLGFI = 2222,
2236 SLGFR = 2223,
2237 SLGR = 2224,
2238 SLGRK = 2225,
2239 SLHHHR = 2226,
2240 SLHHLR = 2227,
2241 SLL = 2228,
2242 SLLG = 2229,
2243 SLLK = 2230,
2244 SLR = 2231,
2245 SLRK = 2232,
2246 SLXT = 2233,
2247 SLY = 2234,
2248 SORTL = 2235,
2249 SP = 2236,
2250 SPCTR = 2237,
2251 SPKA = 2238,
2252 SPM = 2239,
2253 SPT = 2240,
2254 SPX = 2241,
2255 SQD = 2242,
2256 SQDB = 2243,
2257 SQDBR = 2244,
2258 SQDR = 2245,
2259 SQE = 2246,
2260 SQEB = 2247,
2261 SQEBR = 2248,
2262 SQER = 2249,
2263 SQXBR = 2250,
2264 SQXR = 2251,
2265 SR = 2252,
2266 SRA = 2253,
2267 SRAG = 2254,
2268 SRAK = 2255,
2269 SRDA = 2256,
2270 SRDL = 2257,
2271 SRDT = 2258,
2272 SRK = 2259,
2273 SRL = 2260,
2274 SRLG = 2261,
2275 SRLK = 2262,
2276 SRNM = 2263,
2277 SRNMB = 2264,
2278 SRNMT = 2265,
2279 SRP = 2266,
2280 SRST = 2267,
2281 SRSTU = 2268,
2282 SRXT = 2269,
2283 SSAIR = 2270,
2284 SSAR = 2271,
2285 SSCH = 2272,
2286 SSKE = 2273,
2287 SSKEOpt = 2274,
2288 SSM = 2275,
2289 ST = 2276,
2290 STAM = 2277,
2291 STAMY = 2278,
2292 STAP = 2279,
2293 STBEAR = 2280,
2294 STC = 2281,
2295 STCH = 2282,
2296 STCK = 2283,
2297 STCKC = 2284,
2298 STCKE = 2285,
2299 STCKF = 2286,
2300 STCM = 2287,
2301 STCMH = 2288,
2302 STCMY = 2289,
2303 STCPS = 2290,
2304 STCRW = 2291,
2305 STCTG = 2292,
2306 STCTL = 2293,
2307 STCY = 2294,
2308 STD = 2295,
2309 STDY = 2296,
2310 STE = 2297,
2311 STE16 = 2298,
2312 STE16Y = 2299,
2313 STEY = 2300,
2314 STFH = 2301,
2315 STFL = 2302,
2316 STFLE = 2303,
2317 STFPC = 2304,
2318 STG = 2305,
2319 STGRL = 2306,
2320 STGSC = 2307,
2321 STH = 2308,
2322 STHH = 2309,
2323 STHRL = 2310,
2324 STHY = 2311,
2325 STIDP = 2312,
2326 STM = 2313,
2327 STMG = 2314,
2328 STMH = 2315,
2329 STMY = 2316,
2330 STNSM = 2317,
2331 STOC = 2318,
2332 STOCAsm = 2319,
2333 STOCAsmE = 2320,
2334 STOCAsmH = 2321,
2335 STOCAsmHE = 2322,
2336 STOCAsmL = 2323,
2337 STOCAsmLE = 2324,
2338 STOCAsmLH = 2325,
2339 STOCAsmM = 2326,
2340 STOCAsmNE = 2327,
2341 STOCAsmNH = 2328,
2342 STOCAsmNHE = 2329,
2343 STOCAsmNL = 2330,
2344 STOCAsmNLE = 2331,
2345 STOCAsmNLH = 2332,
2346 STOCAsmNM = 2333,
2347 STOCAsmNO = 2334,
2348 STOCAsmNP = 2335,
2349 STOCAsmNZ = 2336,
2350 STOCAsmO = 2337,
2351 STOCAsmP = 2338,
2352 STOCAsmZ = 2339,
2353 STOCFH = 2340,
2354 STOCFHAsm = 2341,
2355 STOCFHAsmE = 2342,
2356 STOCFHAsmH = 2343,
2357 STOCFHAsmHE = 2344,
2358 STOCFHAsmL = 2345,
2359 STOCFHAsmLE = 2346,
2360 STOCFHAsmLH = 2347,
2361 STOCFHAsmM = 2348,
2362 STOCFHAsmNE = 2349,
2363 STOCFHAsmNH = 2350,
2364 STOCFHAsmNHE = 2351,
2365 STOCFHAsmNL = 2352,
2366 STOCFHAsmNLE = 2353,
2367 STOCFHAsmNLH = 2354,
2368 STOCFHAsmNM = 2355,
2369 STOCFHAsmNO = 2356,
2370 STOCFHAsmNP = 2357,
2371 STOCFHAsmNZ = 2358,
2372 STOCFHAsmO = 2359,
2373 STOCFHAsmP = 2360,
2374 STOCFHAsmZ = 2361,
2375 STOCG = 2362,
2376 STOCGAsm = 2363,
2377 STOCGAsmE = 2364,
2378 STOCGAsmH = 2365,
2379 STOCGAsmHE = 2366,
2380 STOCGAsmL = 2367,
2381 STOCGAsmLE = 2368,
2382 STOCGAsmLH = 2369,
2383 STOCGAsmM = 2370,
2384 STOCGAsmNE = 2371,
2385 STOCGAsmNH = 2372,
2386 STOCGAsmNHE = 2373,
2387 STOCGAsmNL = 2374,
2388 STOCGAsmNLE = 2375,
2389 STOCGAsmNLH = 2376,
2390 STOCGAsmNM = 2377,
2391 STOCGAsmNO = 2378,
2392 STOCGAsmNP = 2379,
2393 STOCGAsmNZ = 2380,
2394 STOCGAsmO = 2381,
2395 STOCGAsmP = 2382,
2396 STOCGAsmZ = 2383,
2397 STOSM = 2384,
2398 STPQ = 2385,
2399 STPT = 2386,
2400 STPX = 2387,
2401 STRAG = 2388,
2402 STRL = 2389,
2403 STRV = 2390,
2404 STRVG = 2391,
2405 STRVH = 2392,
2406 STSCH = 2393,
2407 STSI = 2394,
2408 STURA = 2395,
2409 STURG = 2396,
2410 STY = 2397,
2411 SU = 2398,
2412 SUR = 2399,
2413 SVC = 2400,
2414 SW = 2401,
2415 SWR = 2402,
2416 SXBR = 2403,
2417 SXR = 2404,
2418 SXTR = 2405,
2419 SXTRA = 2406,
2420 SY = 2407,
2421 TABORT = 2408,
2422 TAM = 2409,
2423 TAR = 2410,
2424 TB = 2411,
2425 TBDR = 2412,
2426 TBEDR = 2413,
2427 TBEGIN = 2414,
2428 TBEGINC = 2415,
2429 TCDB = 2416,
2430 TCEB = 2417,
2431 TCXB = 2418,
2432 TDCDT = 2419,
2433 TDCET = 2420,
2434 TDCXT = 2421,
2435 TDGDT = 2422,
2436 TDGET = 2423,
2437 TDGXT = 2424,
2438 TEND = 2425,
2439 THDER = 2426,
2440 THDR = 2427,
2441 TM = 2428,
2442 TMHH = 2429,
2443 TMHL = 2430,
2444 TMLH = 2431,
2445 TMLL = 2432,
2446 TMY = 2433,
2447 TP = 2434,
2448 TPEI = 2435,
2449 TPI = 2436,
2450 TPROT = 2437,
2451 TR = 2438,
2452 TRACE = 2439,
2453 TRACG = 2440,
2454 TRAP2 = 2441,
2455 TRAP4 = 2442,
2456 TRE = 2443,
2457 TROO = 2444,
2458 TROOOpt = 2445,
2459 TROT = 2446,
2460 TROTOpt = 2447,
2461 TRT = 2448,
2462 TRTE = 2449,
2463 TRTEOpt = 2450,
2464 TRTO = 2451,
2465 TRTOOpt = 2452,
2466 TRTR = 2453,
2467 TRTRE = 2454,
2468 TRTREOpt = 2455,
2469 TRTT = 2456,
2470 TRTTOpt = 2457,
2471 TS = 2458,
2472 TSCH = 2459,
2473 UNPK = 2460,
2474 UNPKA = 2461,
2475 UNPKU = 2462,
2476 UPT = 2463,
2477 VA = 2464,
2478 VAB = 2465,
2479 VAC = 2466,
2480 VACC = 2467,
2481 VACCB = 2468,
2482 VACCC = 2469,
2483 VACCCQ = 2470,
2484 VACCF = 2471,
2485 VACCG = 2472,
2486 VACCH = 2473,
2487 VACCQ = 2474,
2488 VACQ = 2475,
2489 VAF = 2476,
2490 VAG = 2477,
2491 VAH = 2478,
2492 VAP = 2479,
2493 VAQ = 2480,
2494 VAVG = 2481,
2495 VAVGB = 2482,
2496 VAVGF = 2483,
2497 VAVGG = 2484,
2498 VAVGH = 2485,
2499 VAVGL = 2486,
2500 VAVGLB = 2487,
2501 VAVGLF = 2488,
2502 VAVGLG = 2489,
2503 VAVGLH = 2490,
2504 VAVGLQ = 2491,
2505 VAVGQ = 2492,
2506 VBLEND = 2493,
2507 VBLENDB = 2494,
2508 VBLENDF = 2495,
2509 VBLENDG = 2496,
2510 VBLENDH = 2497,
2511 VBLENDQ = 2498,
2512 VBPERM = 2499,
2513 VCDG = 2500,
2514 VCDGB = 2501,
2515 VCDLG = 2502,
2516 VCDLGB = 2503,
2517 VCEFB = 2504,
2518 VCELFB = 2505,
2519 VCEQ = 2506,
2520 VCEQB = 2507,
2521 VCEQBS = 2508,
2522 VCEQF = 2509,
2523 VCEQFS = 2510,
2524 VCEQG = 2511,
2525 VCEQGS = 2512,
2526 VCEQH = 2513,
2527 VCEQHS = 2514,
2528 VCEQQ = 2515,
2529 VCEQQS = 2516,
2530 VCFEB = 2517,
2531 VCFN = 2518,
2532 VCFPL = 2519,
2533 VCFPS = 2520,
2534 VCGD = 2521,
2535 VCGDB = 2522,
2536 VCH = 2523,
2537 VCHB = 2524,
2538 VCHBS = 2525,
2539 VCHF = 2526,
2540 VCHFS = 2527,
2541 VCHG = 2528,
2542 VCHGS = 2529,
2543 VCHH = 2530,
2544 VCHHS = 2531,
2545 VCHL = 2532,
2546 VCHLB = 2533,
2547 VCHLBS = 2534,
2548 VCHLF = 2535,
2549 VCHLFS = 2536,
2550 VCHLG = 2537,
2551 VCHLGS = 2538,
2552 VCHLH = 2539,
2553 VCHLHS = 2540,
2554 VCHLQ = 2541,
2555 VCHLQS = 2542,
2556 VCHQ = 2543,
2557 VCHQS = 2544,
2558 VCKSM = 2545,
2559 VCLFEB = 2546,
2560 VCLFNH = 2547,
2561 VCLFNL = 2548,
2562 VCLFP = 2549,
2563 VCLGD = 2550,
2564 VCLGDB = 2551,
2565 VCLZ = 2552,
2566 VCLZB = 2553,
2567 VCLZDP = 2554,
2568 VCLZF = 2555,
2569 VCLZG = 2556,
2570 VCLZH = 2557,
2571 VCLZQ = 2558,
2572 VCNF = 2559,
2573 VCP = 2560,
2574 VCRNF = 2561,
2575 VCSFP = 2562,
2576 VCSPH = 2563,
2577 VCTZ = 2564,
2578 VCTZB = 2565,
2579 VCTZF = 2566,
2580 VCTZG = 2567,
2581 VCTZH = 2568,
2582 VCTZQ = 2569,
2583 VCVB = 2570,
2584 VCVBG = 2571,
2585 VCVBGOpt = 2572,
2586 VCVBOpt = 2573,
2587 VCVBQ = 2574,
2588 VCVD = 2575,
2589 VCVDG = 2576,
2590 VCVDQ = 2577,
2591 VD = 2578,
2592 VDF = 2579,
2593 VDG = 2580,
2594 VDL = 2581,
2595 VDLF = 2582,
2596 VDLG = 2583,
2597 VDLQ = 2584,
2598 VDP = 2585,
2599 VDQ = 2586,
2600 VEC = 2587,
2601 VECB = 2588,
2602 VECF = 2589,
2603 VECG = 2590,
2604 VECH = 2591,
2605 VECL = 2592,
2606 VECLB = 2593,
2607 VECLF = 2594,
2608 VECLG = 2595,
2609 VECLH = 2596,
2610 VECLQ = 2597,
2611 VECQ = 2598,
2612 VERIM = 2599,
2613 VERIMB = 2600,
2614 VERIMF = 2601,
2615 VERIMG = 2602,
2616 VERIMH = 2603,
2617 VERLL = 2604,
2618 VERLLB = 2605,
2619 VERLLF = 2606,
2620 VERLLG = 2607,
2621 VERLLH = 2608,
2622 VERLLV = 2609,
2623 VERLLVB = 2610,
2624 VERLLVF = 2611,
2625 VERLLVG = 2612,
2626 VERLLVH = 2613,
2627 VESL = 2614,
2628 VESLB = 2615,
2629 VESLF = 2616,
2630 VESLG = 2617,
2631 VESLH = 2618,
2632 VESLV = 2619,
2633 VESLVB = 2620,
2634 VESLVF = 2621,
2635 VESLVG = 2622,
2636 VESLVH = 2623,
2637 VESRA = 2624,
2638 VESRAB = 2625,
2639 VESRAF = 2626,
2640 VESRAG = 2627,
2641 VESRAH = 2628,
2642 VESRAV = 2629,
2643 VESRAVB = 2630,
2644 VESRAVF = 2631,
2645 VESRAVG = 2632,
2646 VESRAVH = 2633,
2647 VESRL = 2634,
2648 VESRLB = 2635,
2649 VESRLF = 2636,
2650 VESRLG = 2637,
2651 VESRLH = 2638,
2652 VESRLV = 2639,
2653 VESRLVB = 2640,
2654 VESRLVF = 2641,
2655 VESRLVG = 2642,
2656 VESRLVH = 2643,
2657 VEVAL = 2644,
2658 VFA = 2645,
2659 VFADB = 2646,
2660 VFAE = 2647,
2661 VFAEB = 2648,
2662 VFAEBS = 2649,
2663 VFAEF = 2650,
2664 VFAEFS = 2651,
2665 VFAEH = 2652,
2666 VFAEHS = 2653,
2667 VFAEZB = 2654,
2668 VFAEZBS = 2655,
2669 VFAEZF = 2656,
2670 VFAEZFS = 2657,
2671 VFAEZH = 2658,
2672 VFAEZHS = 2659,
2673 VFASB = 2660,
2674 VFCE = 2661,
2675 VFCEDB = 2662,
2676 VFCEDBS = 2663,
2677 VFCESB = 2664,
2678 VFCESBS = 2665,
2679 VFCH = 2666,
2680 VFCHDB = 2667,
2681 VFCHDBS = 2668,
2682 VFCHE = 2669,
2683 VFCHEDB = 2670,
2684 VFCHEDBS = 2671,
2685 VFCHESB = 2672,
2686 VFCHESBS = 2673,
2687 VFCHSB = 2674,
2688 VFCHSBS = 2675,
2689 VFD = 2676,
2690 VFDDB = 2677,
2691 VFDSB = 2678,
2692 VFEE = 2679,
2693 VFEEB = 2680,
2694 VFEEBS = 2681,
2695 VFEEF = 2682,
2696 VFEEFS = 2683,
2697 VFEEH = 2684,
2698 VFEEHS = 2685,
2699 VFEEZB = 2686,
2700 VFEEZBS = 2687,
2701 VFEEZF = 2688,
2702 VFEEZFS = 2689,
2703 VFEEZH = 2690,
2704 VFEEZHS = 2691,
2705 VFENE = 2692,
2706 VFENEB = 2693,
2707 VFENEBS = 2694,
2708 VFENEF = 2695,
2709 VFENEFS = 2696,
2710 VFENEH = 2697,
2711 VFENEHS = 2698,
2712 VFENEZB = 2699,
2713 VFENEZBS = 2700,
2714 VFENEZF = 2701,
2715 VFENEZFS = 2702,
2716 VFENEZH = 2703,
2717 VFENEZHS = 2704,
2718 VFI = 2705,
2719 VFIDB = 2706,
2720 VFISB = 2707,
2721 VFKEDB = 2708,
2722 VFKEDBS = 2709,
2723 VFKESB = 2710,
2724 VFKESBS = 2711,
2725 VFKHDB = 2712,
2726 VFKHDBS = 2713,
2727 VFKHEDB = 2714,
2728 VFKHEDBS = 2715,
2729 VFKHESB = 2716,
2730 VFKHESBS = 2717,
2731 VFKHSB = 2718,
2732 VFKHSBS = 2719,
2733 VFLCDB = 2720,
2734 VFLCSB = 2721,
2735 VFLL = 2722,
2736 VFLLS = 2723,
2737 VFLNDB = 2724,
2738 VFLNSB = 2725,
2739 VFLPDB = 2726,
2740 VFLPSB = 2727,
2741 VFLR = 2728,
2742 VFLRD = 2729,
2743 VFM = 2730,
2744 VFMA = 2731,
2745 VFMADB = 2732,
2746 VFMASB = 2733,
2747 VFMAX = 2734,
2748 VFMAXDB = 2735,
2749 VFMAXSB = 2736,
2750 VFMDB = 2737,
2751 VFMIN = 2738,
2752 VFMINDB = 2739,
2753 VFMINSB = 2740,
2754 VFMS = 2741,
2755 VFMSB = 2742,
2756 VFMSDB = 2743,
2757 VFMSSB = 2744,
2758 VFNMA = 2745,
2759 VFNMADB = 2746,
2760 VFNMASB = 2747,
2761 VFNMS = 2748,
2762 VFNMSDB = 2749,
2763 VFNMSSB = 2750,
2764 VFPSO = 2751,
2765 VFPSODB = 2752,
2766 VFPSOSB = 2753,
2767 VFS = 2754,
2768 VFSDB = 2755,
2769 VFSQ = 2756,
2770 VFSQDB = 2757,
2771 VFSQSB = 2758,
2772 VFSSB = 2759,
2773 VFTCI = 2760,
2774 VFTCIDB = 2761,
2775 VFTCISB = 2762,
2776 VGBM = 2763,
2777 VGEF = 2764,
2778 VGEG = 2765,
2779 VGEM = 2766,
2780 VGEMB = 2767,
2781 VGEMF = 2768,
2782 VGEMG = 2769,
2783 VGEMH = 2770,
2784 VGEMQ = 2771,
2785 VGFM = 2772,
2786 VGFMA = 2773,
2787 VGFMAB = 2774,
2788 VGFMAF = 2775,
2789 VGFMAG = 2776,
2790 VGFMAH = 2777,
2791 VGFMB = 2778,
2792 VGFMF = 2779,
2793 VGFMG = 2780,
2794 VGFMH = 2781,
2795 VGM = 2782,
2796 VGMB = 2783,
2797 VGMF = 2784,
2798 VGMG = 2785,
2799 VGMH = 2786,
2800 VISTR = 2787,
2801 VISTRB = 2788,
2802 VISTRBS = 2789,
2803 VISTRF = 2790,
2804 VISTRFS = 2791,
2805 VISTRH = 2792,
2806 VISTRHS = 2793,
2807 VL = 2794,
2808 VLAlign = 2795,
2809 VLBB = 2796,
2810 VLBR = 2797,
2811 VLBRF = 2798,
2812 VLBRG = 2799,
2813 VLBRH = 2800,
2814 VLBRQ = 2801,
2815 VLBRREP = 2802,
2816 VLBRREPF = 2803,
2817 VLBRREPG = 2804,
2818 VLBRREPH = 2805,
2819 VLC = 2806,
2820 VLCB = 2807,
2821 VLCF = 2808,
2822 VLCG = 2809,
2823 VLCH = 2810,
2824 VLCQ = 2811,
2825 VLDE = 2812,
2826 VLDEB = 2813,
2827 VLEB = 2814,
2828 VLEBRF = 2815,
2829 VLEBRG = 2816,
2830 VLEBRH = 2817,
2831 VLED = 2818,
2832 VLEDB = 2819,
2833 VLEF = 2820,
2834 VLEG = 2821,
2835 VLEH = 2822,
2836 VLEIB = 2823,
2837 VLEIF = 2824,
2838 VLEIG = 2825,
2839 VLEIH = 2826,
2840 VLER = 2827,
2841 VLERF = 2828,
2842 VLERG = 2829,
2843 VLERH = 2830,
2844 VLGV = 2831,
2845 VLGVB = 2832,
2846 VLGVF = 2833,
2847 VLGVG = 2834,
2848 VLGVH = 2835,
2849 VLIP = 2836,
2850 VLL = 2837,
2851 VLLEBRZ = 2838,
2852 VLLEBRZE = 2839,
2853 VLLEBRZF = 2840,
2854 VLLEBRZG = 2841,
2855 VLLEBRZH = 2842,
2856 VLLEZ = 2843,
2857 VLLEZB = 2844,
2858 VLLEZF = 2845,
2859 VLLEZG = 2846,
2860 VLLEZH = 2847,
2861 VLLEZLF = 2848,
2862 VLM = 2849,
2863 VLMAlign = 2850,
2864 VLP = 2851,
2865 VLPB = 2852,
2866 VLPF = 2853,
2867 VLPG = 2854,
2868 VLPH = 2855,
2869 VLPQ = 2856,
2870 VLR = 2857,
2871 VLREP = 2858,
2872 VLREPB = 2859,
2873 VLREPF = 2860,
2874 VLREPG = 2861,
2875 VLREPH = 2862,
2876 VLRL = 2863,
2877 VLRLR = 2864,
2878 VLVG = 2865,
2879 VLVGB = 2866,
2880 VLVGF = 2867,
2881 VLVGG = 2868,
2882 VLVGH = 2869,
2883 VLVGP = 2870,
2884 VMAE = 2871,
2885 VMAEB = 2872,
2886 VMAEF = 2873,
2887 VMAEG = 2874,
2888 VMAEH = 2875,
2889 VMAH = 2876,
2890 VMAHB = 2877,
2891 VMAHF = 2878,
2892 VMAHG = 2879,
2893 VMAHH = 2880,
2894 VMAHQ = 2881,
2895 VMAL = 2882,
2896 VMALB = 2883,
2897 VMALE = 2884,
2898 VMALEB = 2885,
2899 VMALEF = 2886,
2900 VMALEG = 2887,
2901 VMALEH = 2888,
2902 VMALF = 2889,
2903 VMALG = 2890,
2904 VMALH = 2891,
2905 VMALHB = 2892,
2906 VMALHF = 2893,
2907 VMALHG = 2894,
2908 VMALHH = 2895,
2909 VMALHQ = 2896,
2910 VMALHW = 2897,
2911 VMALO = 2898,
2912 VMALOB = 2899,
2913 VMALOF = 2900,
2914 VMALOG = 2901,
2915 VMALOH = 2902,
2916 VMALQ = 2903,
2917 VMAO = 2904,
2918 VMAOB = 2905,
2919 VMAOF = 2906,
2920 VMAOG = 2907,
2921 VMAOH = 2908,
2922 VME = 2909,
2923 VMEB = 2910,
2924 VMEF = 2911,
2925 VMEG = 2912,
2926 VMEH = 2913,
2927 VMH = 2914,
2928 VMHB = 2915,
2929 VMHF = 2916,
2930 VMHG = 2917,
2931 VMHH = 2918,
2932 VMHQ = 2919,
2933 VML = 2920,
2934 VMLB = 2921,
2935 VMLE = 2922,
2936 VMLEB = 2923,
2937 VMLEF = 2924,
2938 VMLEG = 2925,
2939 VMLEH = 2926,
2940 VMLF = 2927,
2941 VMLG = 2928,
2942 VMLH = 2929,
2943 VMLHB = 2930,
2944 VMLHF = 2931,
2945 VMLHG = 2932,
2946 VMLHH = 2933,
2947 VMLHQ = 2934,
2948 VMLHW = 2935,
2949 VMLO = 2936,
2950 VMLOB = 2937,
2951 VMLOF = 2938,
2952 VMLOG = 2939,
2953 VMLOH = 2940,
2954 VMLQ = 2941,
2955 VMN = 2942,
2956 VMNB = 2943,
2957 VMNF = 2944,
2958 VMNG = 2945,
2959 VMNH = 2946,
2960 VMNL = 2947,
2961 VMNLB = 2948,
2962 VMNLF = 2949,
2963 VMNLG = 2950,
2964 VMNLH = 2951,
2965 VMNLQ = 2952,
2966 VMNQ = 2953,
2967 VMO = 2954,
2968 VMOB = 2955,
2969 VMOF = 2956,
2970 VMOG = 2957,
2971 VMOH = 2958,
2972 VMP = 2959,
2973 VMRH = 2960,
2974 VMRHB = 2961,
2975 VMRHF = 2962,
2976 VMRHG = 2963,
2977 VMRHH = 2964,
2978 VMRL = 2965,
2979 VMRLB = 2966,
2980 VMRLF = 2967,
2981 VMRLG = 2968,
2982 VMRLH = 2969,
2983 VMSL = 2970,
2984 VMSLG = 2971,
2985 VMSP = 2972,
2986 VMX = 2973,
2987 VMXB = 2974,
2988 VMXF = 2975,
2989 VMXG = 2976,
2990 VMXH = 2977,
2991 VMXL = 2978,
2992 VMXLB = 2979,
2993 VMXLF = 2980,
2994 VMXLG = 2981,
2995 VMXLH = 2982,
2996 VMXLQ = 2983,
2997 VMXQ = 2984,
2998 VN = 2985,
2999 VNC = 2986,
3000 VNN = 2987,
3001 VNO = 2988,
3002 VNX = 2989,
3003 VO = 2990,
3004 VOC = 2991,
3005 VONE = 2992,
3006 VPDI = 2993,
3007 VPERM = 2994,
3008 VPK = 2995,
3009 VPKF = 2996,
3010 VPKG = 2997,
3011 VPKH = 2998,
3012 VPKLS = 2999,
3013 VPKLSF = 3000,
3014 VPKLSFS = 3001,
3015 VPKLSG = 3002,
3016 VPKLSGS = 3003,
3017 VPKLSH = 3004,
3018 VPKLSHS = 3005,
3019 VPKS = 3006,
3020 VPKSF = 3007,
3021 VPKSFS = 3008,
3022 VPKSG = 3009,
3023 VPKSGS = 3010,
3024 VPKSH = 3011,
3025 VPKSHS = 3012,
3026 VPKZ = 3013,
3027 VPKZR = 3014,
3028 VPOPCT = 3015,
3029 VPOPCTB = 3016,
3030 VPOPCTF = 3017,
3031 VPOPCTG = 3018,
3032 VPOPCTH = 3019,
3033 VPSOP = 3020,
3034 VR = 3021,
3035 VREP = 3022,
3036 VREPB = 3023,
3037 VREPF = 3024,
3038 VREPG = 3025,
3039 VREPH = 3026,
3040 VREPI = 3027,
3041 VREPIB = 3028,
3042 VREPIF = 3029,
3043 VREPIG = 3030,
3044 VREPIH = 3031,
3045 VRF = 3032,
3046 VRG = 3033,
3047 VRL = 3034,
3048 VRLF = 3035,
3049 VRLG = 3036,
3050 VRLQ = 3037,
3051 VRP = 3038,
3052 VRQ = 3039,
3053 VS = 3040,
3054 VSB = 3041,
3055 VSBCBI = 3042,
3056 VSBCBIQ = 3043,
3057 VSBI = 3044,
3058 VSBIQ = 3045,
3059 VSCBI = 3046,
3060 VSCBIB = 3047,
3061 VSCBIF = 3048,
3062 VSCBIG = 3049,
3063 VSCBIH = 3050,
3064 VSCBIQ = 3051,
3065 VSCEF = 3052,
3066 VSCEG = 3053,
3067 VSCHDP = 3054,
3068 VSCHP = 3055,
3069 VSCHSP = 3056,
3070 VSCHXP = 3057,
3071 VSCSHP = 3058,
3072 VSDP = 3059,
3073 VSEG = 3060,
3074 VSEGB = 3061,
3075 VSEGF = 3062,
3076 VSEGH = 3063,
3077 VSEL = 3064,
3078 VSF = 3065,
3079 VSG = 3066,
3080 VSH = 3067,
3081 VSL = 3068,
3082 VSLB = 3069,
3083 VSLD = 3070,
3084 VSLDB = 3071,
3085 VSP = 3072,
3086 VSQ = 3073,
3087 VSRA = 3074,
3088 VSRAB = 3075,
3089 VSRD = 3076,
3090 VSRL = 3077,
3091 VSRLB = 3078,
3092 VSRP = 3079,
3093 VSRPR = 3080,
3094 VST = 3081,
3095 VSTAlign = 3082,
3096 VSTBR = 3083,
3097 VSTBRF = 3084,
3098 VSTBRG = 3085,
3099 VSTBRH = 3086,
3100 VSTBRQ = 3087,
3101 VSTEB = 3088,
3102 VSTEBRF = 3089,
3103 VSTEBRG = 3090,
3104 VSTEBRH = 3091,
3105 VSTEF = 3092,
3106 VSTEG = 3093,
3107 VSTEH = 3094,
3108 VSTER = 3095,
3109 VSTERF = 3096,
3110 VSTERG = 3097,
3111 VSTERH = 3098,
3112 VSTL = 3099,
3113 VSTM = 3100,
3114 VSTMAlign = 3101,
3115 VSTRC = 3102,
3116 VSTRCB = 3103,
3117 VSTRCBS = 3104,
3118 VSTRCF = 3105,
3119 VSTRCFS = 3106,
3120 VSTRCH = 3107,
3121 VSTRCHS = 3108,
3122 VSTRCZB = 3109,
3123 VSTRCZBS = 3110,
3124 VSTRCZF = 3111,
3125 VSTRCZFS = 3112,
3126 VSTRCZH = 3113,
3127 VSTRCZHS = 3114,
3128 VSTRL = 3115,
3129 VSTRLR = 3116,
3130 VSTRS = 3117,
3131 VSTRSB = 3118,
3132 VSTRSF = 3119,
3133 VSTRSH = 3120,
3134 VSTRSZB = 3121,
3135 VSTRSZF = 3122,
3136 VSTRSZH = 3123,
3137 VSUM = 3124,
3138 VSUMB = 3125,
3139 VSUMG = 3126,
3140 VSUMGF = 3127,
3141 VSUMGH = 3128,
3142 VSUMH = 3129,
3143 VSUMQ = 3130,
3144 VSUMQF = 3131,
3145 VSUMQG = 3132,
3146 VTM = 3133,
3147 VTP = 3134,
3148 VTPOpt = 3135,
3149 VTZ = 3136,
3150 VUPH = 3137,
3151 VUPHB = 3138,
3152 VUPHF = 3139,
3153 VUPHG = 3140,
3154 VUPHH = 3141,
3155 VUPKZ = 3142,
3156 VUPKZH = 3143,
3157 VUPKZL = 3144,
3158 VUPL = 3145,
3159 VUPLB = 3146,
3160 VUPLF = 3147,
3161 VUPLG = 3148,
3162 VUPLH = 3149,
3163 VUPLHB = 3150,
3164 VUPLHF = 3151,
3165 VUPLHG = 3152,
3166 VUPLHH = 3153,
3167 VUPLHW = 3154,
3168 VUPLL = 3155,
3169 VUPLLB = 3156,
3170 VUPLLF = 3157,
3171 VUPLLG = 3158,
3172 VUPLLH = 3159,
3173 VX = 3160,
3174 VZERO = 3161,
3175 WCDGB = 3162,
3176 WCDLGB = 3163,
3177 WCEFB = 3164,
3178 WCELFB = 3165,
3179 WCFEB = 3166,
3180 WCGDB = 3167,
3181 WCLFEB = 3168,
3182 WCLGDB = 3169,
3183 WFADB = 3170,
3184 WFASB = 3171,
3185 WFAXB = 3172,
3186 WFC = 3173,
3187 WFCDB = 3174,
3188 WFCEDB = 3175,
3189 WFCEDBS = 3176,
3190 WFCESB = 3177,
3191 WFCESBS = 3178,
3192 WFCEXB = 3179,
3193 WFCEXBS = 3180,
3194 WFCHDB = 3181,
3195 WFCHDBS = 3182,
3196 WFCHEDB = 3183,
3197 WFCHEDBS = 3184,
3198 WFCHESB = 3185,
3199 WFCHESBS = 3186,
3200 WFCHEXB = 3187,
3201 WFCHEXBS = 3188,
3202 WFCHSB = 3189,
3203 WFCHSBS = 3190,
3204 WFCHXB = 3191,
3205 WFCHXBS = 3192,
3206 WFCSB = 3193,
3207 WFCXB = 3194,
3208 WFDDB = 3195,
3209 WFDSB = 3196,
3210 WFDXB = 3197,
3211 WFIDB = 3198,
3212 WFISB = 3199,
3213 WFIXB = 3200,
3214 WFK = 3201,
3215 WFKDB = 3202,
3216 WFKEDB = 3203,
3217 WFKEDBS = 3204,
3218 WFKESB = 3205,
3219 WFKESBS = 3206,
3220 WFKEXB = 3207,
3221 WFKEXBS = 3208,
3222 WFKHDB = 3209,
3223 WFKHDBS = 3210,
3224 WFKHEDB = 3211,
3225 WFKHEDBS = 3212,
3226 WFKHESB = 3213,
3227 WFKHESBS = 3214,
3228 WFKHEXB = 3215,
3229 WFKHEXBS = 3216,
3230 WFKHSB = 3217,
3231 WFKHSBS = 3218,
3232 WFKHXB = 3219,
3233 WFKHXBS = 3220,
3234 WFKSB = 3221,
3235 WFKXB = 3222,
3236 WFLCDB = 3223,
3237 WFLCSB = 3224,
3238 WFLCXB = 3225,
3239 WFLLD = 3226,
3240 WFLLS = 3227,
3241 WFLNDB = 3228,
3242 WFLNSB = 3229,
3243 WFLNXB = 3230,
3244 WFLPDB = 3231,
3245 WFLPSB = 3232,
3246 WFLPXB = 3233,
3247 WFLRD = 3234,
3248 WFLRX = 3235,
3249 WFMADB = 3236,
3250 WFMASB = 3237,
3251 WFMAXB = 3238,
3252 WFMAXDB = 3239,
3253 WFMAXSB = 3240,
3254 WFMAXXB = 3241,
3255 WFMDB = 3242,
3256 WFMINDB = 3243,
3257 WFMINSB = 3244,
3258 WFMINXB = 3245,
3259 WFMSB = 3246,
3260 WFMSDB = 3247,
3261 WFMSSB = 3248,
3262 WFMSXB = 3249,
3263 WFMXB = 3250,
3264 WFNMADB = 3251,
3265 WFNMASB = 3252,
3266 WFNMAXB = 3253,
3267 WFNMSDB = 3254,
3268 WFNMSSB = 3255,
3269 WFNMSXB = 3256,
3270 WFPSODB = 3257,
3271 WFPSOSB = 3258,
3272 WFPSOXB = 3259,
3273 WFSDB = 3260,
3274 WFSQDB = 3261,
3275 WFSQSB = 3262,
3276 WFSQXB = 3263,
3277 WFSSB = 3264,
3278 WFSXB = 3265,
3279 WFTCIDB = 3266,
3280 WFTCISB = 3267,
3281 WFTCIXB = 3268,
3282 WLDEB = 3269,
3283 WLEDB = 3270,
3284 X = 3271,
3285 XC = 3272,
3286 XG = 3273,
3287 XGR = 3274,
3288 XGRK = 3275,
3289 XI = 3276,
3290 XIHF = 3277,
3291 XILF = 3278,
3292 XIY = 3279,
3293 XR = 3280,
3294 XRK = 3281,
3295 XSCH = 3282,
3296 XY = 3283,
3297 ZAP = 3284,
3298 INSTRUCTION_LIST_END = 3285
3299 };
3300
3301} // end namespace llvm::SystemZ
3302#endif // GET_INSTRINFO_ENUM
3303
3304#ifdef GET_INSTRINFO_SCHED_ENUM
3305#undef GET_INSTRINFO_SCHED_ENUM
3306namespace llvm::SystemZ::Sched {
3307
3308 enum {
3309 NoInstrModel = 0,
3310 ADJDYNALLOC = 1,
3311 CallBRCL_BRC_BRCAsm_BRCL_BRCLAsm = 2,
3312 CallJG_J_JAsmE_JAsmH_JAsmHE_JAsmL_JAsmLE_JAsmLH_JAsmM_JAsmNE_JAsmNH_JAsmNHE_JAsmNL_JAsmNLE_JAsmNLH_JAsmNM_JAsmNO_JAsmNP_JAsmNZ_JAsmO_JAsmP_JAsmZ_JG_JGAsmE_JGAsmH_JGAsmHE_JGAsmL_JGAsmLE_JGAsmLH_JGAsmM_JGAsmNE_JGAsmNH_JGAsmNHE_JGAsmNL_JGAsmNLE_JGAsmNLH_JGAsmNM_JGAsmNO_JGAsmNP_JGAsmNZ_JGAsmO_JGAsmP_JGAsmZ = 3,
3313 CallBCR_BC_BCAsm_BCR_BCRAsm = 4,
3314 CallBR_B_BAsmE_BAsmH_BAsmHE_BAsmL_BAsmLE_BAsmLH_BAsmM_BAsmNE_BAsmNH_BAsmNHE_BAsmNL_BAsmNLE_BAsmNLH_BAsmNM_BAsmNO_BAsmNP_BAsmNZ_BAsmO_BAsmP_BAsmZ_BR_BRAsmE_BRAsmH_BRAsmHE_BRAsmL_BRAsmLE_BRAsmLH_BRAsmM_BRAsmNE_BRAsmNH_BRAsmNHE_BRAsmNL_BRAsmNLE_BRAsmNLH_BRAsmNM_BRAsmNO_BRAsmNP_BRAsmNZ_BRAsmO_BRAsmP_BRAsmZ = 5,
3315 BI_BIAsmE_BIAsmH_BIAsmHE_BIAsmL_BIAsmLE_BIAsmLH_BIAsmM_BIAsmNE_BIAsmNH_BIAsmNHE_BIAsmNL_BIAsmNLE_BIAsmNLH_BIAsmNM_BIAsmNO_BIAsmNP_BIAsmNZ_BIAsmO_BIAsmP_BIAsmZ_BIC_BICAsm = 6,
3316 BRCT_BRCTG = 7,
3317 BRCTH = 8,
3318 BCT_BCTG_BCTGR_BCTR = 9,
3319 BRXH_BRXHG_BRXLE_BRXLG_BXH_BXHG_BXLE_BXLEG = 10,
3320 CGIJ_CGIJAsm_CGIJAsmE_CGIJAsmH_CGIJAsmHE_CGIJAsmL_CGIJAsmLE_CGIJAsmLH_CGIJAsmNE_CGIJAsmNH_CGIJAsmNHE_CGIJAsmNL_CGIJAsmNLE_CGIJAsmNLH_CGRJ_CGRJAsm_CGRJAsmE_CGRJAsmH_CGRJAsmHE_CGRJAsmL_CGRJAsmLE_CGRJAsmLH_CGRJAsmNE_CGRJAsmNH_CGRJAsmNHE_CGRJAsmNL_CGRJAsmNLE_CGRJAsmNLH_CIJ_CIJAsm_CIJAsmE_CIJAsmH_CIJAsmHE_CIJAsmL_CIJAsmLE_CIJAsmLH_CIJAsmNE_CIJAsmNH_CIJAsmNHE_CIJAsmNL_CIJAsmNLE_CIJAsmNLH_CLGIJ_CLGIJAsm_CLGIJAsmE_CLGIJAsmH_CLGIJAsmHE_CLGIJAsmL_CLGIJAsmLE_CLGIJAsmLH_CLGIJAsmNE_CLGIJAsmNH_CLGIJAsmNHE_CLGIJAsmNL_CLGIJAsmNLE_CLGIJAsmNLH_CLGRJ_CLGRJAsm_CLGRJAsmE_CLGRJAsmH_CLGRJAsmHE_CLGRJAsmL_CLGRJAsmLE_CLGRJAsmLH_CLGRJAsmNE_CLGRJAsmNH_CLGRJAsmNHE_CLGRJAsmNL_CLGRJAsmNLE_CLGRJAsmNLH_CLIJ_CLIJAsm_CLIJAsmE_CLIJAsmH_CLIJAsmHE_CLIJAsmL_CLIJAsmLE_CLIJAsmLH_CLIJAsmNE_CLIJAsmNH_CLIJAsmNHE_CLIJAsmNL_CLIJAsmNLE_CLIJAsmNLH_CLRJ_CLRJAsm_CLRJAsmE_CLRJAsmH_CLRJAsmHE_CLRJAsmL_CLRJAsmLE_CLRJAsmLH_CLRJAsmNE_CLRJAsmNH_CLRJAsmNHE_CLRJAsmNL_CLRJAsmNLE_CLRJAsmNLH_CRJ_CRJAsm_CRJAsmE_CRJAsmH_CRJAsmHE_CRJAsmL_CRJAsmLE_CRJAsmLH_CRJAsmNE_CRJAsmNH_CRJAsmNHE_CRJAsmNL_CRJAsmNLE_CRJAsmNLH = 11,
3321 CGIBCall_CGIBReturn_CGRBCall_CGRBReturn_CIBCall_CIBReturn_CLGIBCall_CLGIBReturn_CLGRBCall_CLGRBReturn_CLIBCall_CLIBReturn_CLRBCall_CLRBReturn_CRBCall_CRBReturn_CGIB_CGIBAsm_CGIBAsmE_CGIBAsmH_CGIBAsmHE_CGIBAsmL_CGIBAsmLE_CGIBAsmLH_CGIBAsmNE_CGIBAsmNH_CGIBAsmNHE_CGIBAsmNL_CGIBAsmNLE_CGIBAsmNLH_CGRB_CGRBAsm_CGRBAsmE_CGRBAsmH_CGRBAsmHE_CGRBAsmL_CGRBAsmLE_CGRBAsmLH_CGRBAsmNE_CGRBAsmNH_CGRBAsmNHE_CGRBAsmNL_CGRBAsmNLE_CGRBAsmNLH_CIB_CIBAsm_CIBAsmE_CIBAsmH_CIBAsmHE_CIBAsmL_CIBAsmLE_CIBAsmLH_CIBAsmNE_CIBAsmNH_CIBAsmNHE_CIBAsmNL_CIBAsmNLE_CIBAsmNLH_CLGIB_CLGIBAsm_CLGIBAsmE_CLGIBAsmH_CLGIBAsmHE_CLGIBAsmL_CLGIBAsmLE_CLGIBAsmLH_CLGIBAsmNE_CLGIBAsmNH_CLGIBAsmNHE_CLGIBAsmNL_CLGIBAsmNLE_CLGIBAsmNLH_CLGRB_CLGRBAsm_CLGRBAsmE_CLGRBAsmH_CLGRBAsmHE_CLGRBAsmL_CLGRBAsmLE_CLGRBAsmLH_CLGRBAsmNE_CLGRBAsmNH_CLGRBAsmNHE_CLGRBAsmNL_CLGRBAsmNLE_CLGRBAsmNLH_CLIB_CLIBAsm_CLIBAsmE_CLIBAsmH_CLIBAsmHE_CLIBAsmL_CLIBAsmLE_CLIBAsmLH_CLIBAsmNE_CLIBAsmNH_CLIBAsmNHE_CLIBAsmNL_CLIBAsmNLE_CLIBAsmNLH_CLRB_CLRBAsm_CLRBAsmE_CLRBAsmH_CLRBAsmHE_CLRBAsmL_CLRBAsmLE_CLRBAsmLH_CLRBAsmNE_CLRBAsmNH_CLRBAsmNHE_CLRBAsmNL_CLRBAsmNLE_CLRBAsmNLH_CRB_CRBAsm_CRBAsmE_CRBAsmH_CRBAsmHE_CRBAsmL_CRBAsmLE_CRBAsmLH_CRBAsmNE_CRBAsmNH_CRBAsmNHE_CRBAsmNL_CRBAsmNLE_CRBAsmNLH = 12,
3322 CondTrap_Trap = 13,
3323 CGIT_CGITAsm_CGITAsmE_CGITAsmH_CGITAsmHE_CGITAsmL_CGITAsmLE_CGITAsmLH_CGITAsmNE_CGITAsmNH_CGITAsmNHE_CGITAsmNL_CGITAsmNLE_CGITAsmNLH_CGRT_CGRTAsm_CGRTAsmE_CGRTAsmH_CGRTAsmHE_CGRTAsmL_CGRTAsmLE_CGRTAsmLH_CGRTAsmNE_CGRTAsmNH_CGRTAsmNHE_CGRTAsmNL_CGRTAsmNLE_CGRTAsmNLH_CIT_CITAsm_CITAsmE_CITAsmH_CITAsmHE_CITAsmL_CITAsmLE_CITAsmLH_CITAsmNE_CITAsmNH_CITAsmNHE_CITAsmNL_CITAsmNLE_CITAsmNLH_CRT_CRTAsm_CRTAsmE_CRTAsmH_CRTAsmHE_CRTAsmL_CRTAsmLE_CRTAsmLH_CRTAsmNE_CRTAsmNH_CRTAsmNHE_CRTAsmNL_CRTAsmNLE_CRTAsmNLH = 14,
3324 CLGRT_CLGRTAsm_CLGRTAsmE_CLGRTAsmH_CLGRTAsmHE_CLGRTAsmL_CLGRTAsmLE_CLGRTAsmLH_CLGRTAsmNE_CLGRTAsmNH_CLGRTAsmNHE_CLGRTAsmNL_CLGRTAsmNLE_CLGRTAsmNLH_CLRT_CLRTAsm_CLRTAsmE_CLRTAsmH_CLRTAsmHE_CLRTAsmL_CLRTAsmLE_CLRTAsmLH_CLRTAsmNE_CLRTAsmNH_CLRTAsmNHE_CLRTAsmNL_CLRTAsmNLE_CLRTAsmNLH = 15,
3325 CLFIT_CLFITAsm_CLFITAsmE_CLFITAsmH_CLFITAsmHE_CLFITAsmL_CLFITAsmLE_CLFITAsmLH_CLFITAsmNE_CLFITAsmNH_CLFITAsmNHE_CLFITAsmNL_CLFITAsmNLE_CLFITAsmNLH_CLGIT_CLGITAsm_CLGITAsmE_CLGITAsmH_CLGITAsmHE_CLGITAsmL_CLGITAsmLE_CLGITAsmLH_CLGITAsmNE_CLGITAsmNH_CLGITAsmNHE_CLGITAsmNL_CLGITAsmNLE_CLGITAsmNLH = 16,
3326 CLGT_CLGTAsm_CLGTAsmE_CLGTAsmH_CLGTAsmHE_CLGTAsmL_CLGTAsmLE_CLGTAsmLH_CLGTAsmNE_CLGTAsmNH_CLGTAsmNHE_CLGTAsmNL_CLGTAsmNLE_CLGTAsmNLH_CLT_CLTAsm_CLTAsmE_CLTAsmH_CLTAsmHE_CLTAsmL_CLTAsmLE_CLTAsmLH_CLTAsmNE_CLTAsmNH_CLTAsmNHE_CLTAsmNL_CLTAsmNLE_CLTAsmNLH = 17,
3327 BRAS = 18,
3328 CallBRASL_CallBRASL_XPLINK64_BRASL = 19,
3329 CallBASR_CallBASR_STACKEXT_CallBASR_XPLINK64_BAS_BASR = 20,
3330 TLS_GDCALL_TLS_LDCALL = 21,
3331 Return_Return_XPLINK = 22,
3332 CondReturn_CondReturn_XPLINK = 23,
3333 MVGHI_MVHHI_MVHI = 24,
3334 MVI_MVIY = 25,
3335 MVC = 26,
3336 MVCL_MVCLE_MVCLU = 27,
3337 MVCRL = 28,
3338 COPY_TO_REGCLASS_COPY = 29,
3339 EXTRACT_SUBREG = 30,
3340 INSERT_SUBREG = 31,
3341 REG_SEQUENCE = 32,
3342 LMux_L_LFH_LRL_LY = 33,
3343 LCBB = 34,
3344 LG_LGRL = 35,
3345 L128 = 36,
3346 LLIHF_LLIHH_LLIHL = 37,
3347 LLILF_LLILH_LLILL = 38,
3348 LGFI_LGHI = 39,
3349 LHIMux_LHI = 40,
3350 LR = 41,
3351 LZRF_LZRG = 42,
3352 LAT_LFHAT_LGAT = 43,
3353 LT_LTG = 44,
3354 LTGR_LTR = 45,
3355 STG_STGRL = 46,
3356 ST128 = 47,
3357 STMux_ST_STFH_STRL_STY = 48,
3358 MVST = 49,
3359 LOCRMux = 50,
3360 LOCFHR_LOCFHRAsm_LOCFHRAsmE_LOCFHRAsmH_LOCFHRAsmHE_LOCFHRAsmL_LOCFHRAsmLE_LOCFHRAsmLH_LOCFHRAsmM_LOCFHRAsmNE_LOCFHRAsmNH_LOCFHRAsmNHE_LOCFHRAsmNL_LOCFHRAsmNLE_LOCFHRAsmNLH_LOCFHRAsmNM_LOCFHRAsmNO_LOCFHRAsmNP_LOCFHRAsmNZ_LOCFHRAsmO_LOCFHRAsmP_LOCFHRAsmZ_LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 51,
3361 LOCHIMux_LOCGHI_LOCGHIAsm_LOCGHIAsmE_LOCGHIAsmH_LOCGHIAsmHE_LOCGHIAsmL_LOCGHIAsmLE_LOCGHIAsmLH_LOCGHIAsmM_LOCGHIAsmNE_LOCGHIAsmNH_LOCGHIAsmNHE_LOCGHIAsmNL_LOCGHIAsmNLE_LOCGHIAsmNLH_LOCGHIAsmNM_LOCGHIAsmNO_LOCGHIAsmNP_LOCGHIAsmNZ_LOCGHIAsmO_LOCGHIAsmP_LOCGHIAsmZ_LOCHHI_LOCHHIAsm_LOCHHIAsmE_LOCHHIAsmH_LOCHHIAsmHE_LOCHHIAsmL_LOCHHIAsmLE_LOCHHIAsmLH_LOCHHIAsmM_LOCHHIAsmNE_LOCHHIAsmNH_LOCHHIAsmNHE_LOCHHIAsmNL_LOCHHIAsmNLE_LOCHHIAsmNLH_LOCHHIAsmNM_LOCHHIAsmNO_LOCHHIAsmNP_LOCHHIAsmNZ_LOCHHIAsmO_LOCHHIAsmP_LOCHHIAsmZ_LOCHI_LOCHIAsm_LOCHIAsmE_LOCHIAsmH_LOCHIAsmHE_LOCHIAsmL_LOCHIAsmLE_LOCHIAsmLH_LOCHIAsmM_LOCHIAsmNE_LOCHIAsmNH_LOCHIAsmNHE_LOCHIAsmNL_LOCHIAsmNLE_LOCHIAsmNLH_LOCHIAsmNM_LOCHIAsmNO_LOCHIAsmNP_LOCHIAsmNZ_LOCHIAsmO_LOCHIAsmP_LOCHIAsmZ = 52,
3362 LOCMux_LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCFH_LOCFHAsm_LOCFHAsmE_LOCFHAsmH_LOCFHAsmHE_LOCFHAsmL_LOCFHAsmLE_LOCFHAsmLH_LOCFHAsmM_LOCFHAsmNE_LOCFHAsmNH_LOCFHAsmNHE_LOCFHAsmNL_LOCFHAsmNLE_LOCFHAsmNLH_LOCFHAsmNM_LOCFHAsmNO_LOCFHAsmNP_LOCFHAsmNZ_LOCFHAsmO_LOCFHAsmP_LOCFHAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 53,
3363 STOCMux_STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCFH_STOCFHAsm_STOCFHAsmE_STOCFHAsmH_STOCFHAsmHE_STOCFHAsmL_STOCFHAsmLE_STOCFHAsmLH_STOCFHAsmM_STOCFHAsmNE_STOCFHAsmNH_STOCFHAsmNHE_STOCFHAsmNL_STOCFHAsmNLE_STOCFHAsmNLH_STOCFHAsmNM_STOCFHAsmNO_STOCFHAsmNP_STOCFHAsmNZ_STOCFHAsmO_STOCFHAsmP_STOCFHAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 54,
3364 SELRMux = 55,
3365 SELFHR_SELFHRAsm_SELFHRAsmE_SELFHRAsmH_SELFHRAsmHE_SELFHRAsmL_SELFHRAsmLE_SELFHRAsmLH_SELFHRAsmM_SELFHRAsmNE_SELFHRAsmNH_SELFHRAsmNHE_SELFHRAsmNL_SELFHRAsmNLE_SELFHRAsmNLH_SELFHRAsmNM_SELFHRAsmNO_SELFHRAsmNP_SELFHRAsmNZ_SELFHRAsmO_SELFHRAsmP_SELFHRAsmZ_SELGR_SELGRAsm_SELGRAsmE_SELGRAsmH_SELGRAsmHE_SELGRAsmL_SELGRAsmLE_SELGRAsmLH_SELGRAsmM_SELGRAsmNE_SELGRAsmNH_SELGRAsmNHE_SELGRAsmNL_SELGRAsmNLE_SELGRAsmNLH_SELGRAsmNM_SELGRAsmNO_SELGRAsmNP_SELGRAsmNZ_SELGRAsmO_SELGRAsmP_SELGRAsmZ_SELR_SELRAsm_SELRAsmE_SELRAsmH_SELRAsmHE_SELRAsmL_SELRAsmLE_SELRAsmLH_SELRAsmM_SELRAsmNE_SELRAsmNH_SELRAsmNHE_SELRAsmNL_SELRAsmNLE_SELRAsmNLH_SELRAsmNM_SELRAsmNO_SELRAsmNP_SELRAsmNZ_SELRAsmO_SELRAsmP_SELRAsmZ = 56,
3366 LBR_LGR_LHR = 57,
3367 LGBR_LGFR_LGHR = 58,
3368 LTGF = 59,
3369 LTGFR = 60,
3370 LBMux_LB_LBH = 61,
3371 LH_LHY = 62,
3372 LHMux_LHH_LHRL = 63,
3373 LGB_LGF_LGH = 64,
3374 LGFRL_LGHRL = 65,
3375 LLCRMux_LLCR = 66,
3376 LLHRMux_LLHR = 67,
3377 LLGCR_LLGFR_LLGHR_LLGTR = 68,
3378 LLCMux_LLC = 69,
3379 LLHMux_LLH = 70,
3380 LLCH_LLHH = 71,
3381 LLHRL = 72,
3382 LLGC_LLGF_LLGFRL_LLGH_LLGHRL_LLGT = 73,
3383 LLZRGF = 74,
3384 LLGFAT_LLGTAT = 75,
3385 STCMux_STC_STCH_STCY = 76,
3386 STHMux_STH_STHH_STHRL_STHY = 77,
3387 STCM_STCMH_STCMY = 78,
3388 LM_LMG_LMH_LMY = 79,
3389 LMD = 80,
3390 STM_STMG_STMH_STMY = 81,
3391 LRVGR_LRVR = 82,
3392 LRV_LRVG_LRVH = 83,
3393 STRV_STRVG_STRVH = 84,
3394 MVCIN = 85,
3395 LA_LARL_LAY = 86,
3396 GOT = 87,
3397 LLXAB_LLXAF_LLXAG_LLXAH_LLXAQ_LXAB_LXAF_LXAG_LXAH_LXAQ = 88,
3398 LPGR_LPR = 89,
3399 LNGFR_LPGFR = 90,
3400 LNGR_LNR = 91,
3401 LCGR_LCR = 92,
3402 LCGFR = 93,
3403 IC_ICY = 94,
3404 IC32_IC32Y = 95,
3405 ICM_ICMH_ICMY = 96,
3406 IIFMux_IIHMux_IILMux = 97,
3407 IIHF64_IIHF = 98,
3408 IIHH64_IIHH = 99,
3409 IIHL64_IIHL = 100,
3410 IILF64_IILF = 101,
3411 IILH64_IILH = 102,
3412 IILL64_IILL = 103,
3413 A_AY = 104,
3414 AH_AHY = 105,
3415 AIH = 106,
3416 AFIMux_AFI = 107,
3417 AG = 108,
3418 AGFI = 109,
3419 AGHI_AGHIK = 110,
3420 AGR_AGRK = 111,
3421 AHI_AHIK = 112,
3422 AHIMux_AHIMuxK = 113,
3423 AL_ALY = 114,
3424 ALFI_ALHSIK = 115,
3425 ALG_ALGF = 116,
3426 ALGHSIK = 117,
3427 ALGFI_ALGFR = 118,
3428 ALGR_ALGRK = 119,
3429 ALR_ALRK = 120,
3430 AR_ARK = 121,
3431 AHHHR_ALHHHR = 122,
3432 AHHLR_ALHHLR = 123,
3433 ALSIH_ALSIHN = 124,
3434 AGSI_ALGSI_ALSI_ASI = 125,
3435 ALC_ALCG = 126,
3436 ALCGR_ALCR = 127,
3437 AGF_AGH = 128,
3438 AGFR = 129,
3439 S_SG_SY = 130,
3440 SH_SHY = 131,
3441 SGR_SGRK = 132,
3442 SLFI = 133,
3443 SL_SLG_SLGF_SLY = 134,
3444 SLGFI_SLGFR = 135,
3445 SLGR_SLGRK = 136,
3446 SLR_SLRK = 137,
3447 SR_SRK = 138,
3448 SHHHR_SLHHHR = 139,
3449 SHHLR_SLHHLR = 140,
3450 SLB_SLBG = 141,
3451 SLBGR_SLBR = 142,
3452 SGF_SGH = 143,
3453 SGFR = 144,
3454 N_NG_NY = 145,
3455 NGR_NGRK = 146,
3456 NIFMux_NIHMux_NILMux = 147,
3457 NI_NIY = 148,
3458 NIHF64_NIHF = 149,
3459 NIHH64_NIHH = 150,
3460 NIHL64_NIHL = 151,
3461 NILF64_NILF = 152,
3462 NILH64_NILH = 153,
3463 NILL64_NILL = 154,
3464 NR_NRK = 155,
3465 NC = 156,
3466 O_OG_OY = 157,
3467 OGR_OGRK = 158,
3468 OI_OIY = 159,
3469 OIFMux_OIHMux_OILMux = 160,
3470 OIHF64_OIHF = 161,
3471 OIHH64_OIHH = 162,
3472 OIHL64_OIHL = 163,
3473 OILF64_OILF = 164,
3474 OILH64_OILH = 165,
3475 OILL64_OILL = 166,
3476 OR_ORK = 167,
3477 OC = 168,
3478 X_XG_XY = 169,
3479 XI_XIY = 170,
3480 XIFMux = 171,
3481 XGR_XGRK = 172,
3482 XIHF64_XIHF = 173,
3483 XILF64_XILF = 174,
3484 XR_XRK = 175,
3485 XC = 176,
3486 NCGRK_NCRK = 177,
3487 OCGRK_OCRK = 178,
3488 NNGRK_NNRK = 179,
3489 NOGRK_NORK = 180,
3490 NOTGR_NOTR = 181,
3491 NXGRK_NXRK = 182,
3492 MS_MSGF_MSY = 183,
3493 MSFI_MSR = 184,
3494 MSG = 185,
3495 MSGR = 186,
3496 MSGFI_MSGFR = 187,
3497 MLG = 188,
3498 MLGR = 189,
3499 MGHI = 190,
3500 MHI = 191,
3501 MH_MHY = 192,
3502 MLR_MR = 193,
3503 M_MFY_ML = 194,
3504 MGH = 195,
3505 MG = 196,
3506 MGRK = 197,
3507 MSC = 198,
3508 MSGC = 199,
3509 MSRKC = 200,
3510 MSGRKC = 201,
3511 DR = 202,
3512 D = 203,
3513 DSGFR_DSGR = 204,
3514 DSG_DSGF = 205,
3515 DLR = 206,
3516 DLGR = 207,
3517 DL_DLG = 208,
3518 SLL_SLLG_SLLK = 209,
3519 SRL_SRLG_SRLK = 210,
3520 SRA_SRAG_SRAK = 211,
3521 SLA_SLAG_SLAK = 212,
3522 SLDA_SLDL_SRDA_SRDL = 213,
3523 RLL_RLLG = 214,
3524 RISBHH_RISBHHOpt_RISBHL_RISBHLOpt_RISBHG_RISBHGOpt = 215,
3525 RISBLH_RISBLHOpt_RISBLL_RISBLLOpt_RISBLG_RISBLGOpt = 216,
3526 RISBG_RISBG32_RISBG32Opt_RISBGN_RISBGNOpt_RISBGNZ_RISBGNZOpt_RISBGOpt_RISBGZ_RISBGZOpt = 217,
3527 RISBMux = 218,
3528 RNSBG_RNSBGOpt_ROSBG_ROSBGOpt_RXSBG_RXSBGOpt = 219,
3529 CMux_C_CG_CY = 220,
3530 CRL = 221,
3531 CFIMux_CHIMux_CFI_CHI = 222,
3532 CGFI_CGHI = 223,
3533 CGHSI_CGRL = 224,
3534 CGR_CR = 225,
3535 CIH = 226,
3536 CHF = 227,
3537 CHSI = 228,
3538 CLMux_CL_CLY = 229,
3539 CLFHSI = 230,
3540 CLFIMux_CLFI = 231,
3541 CLG = 232,
3542 CLGHRL_CLGHSI = 233,
3543 CLGF = 234,
3544 CLGFRL = 235,
3545 CLGFI_CLGFR = 236,
3546 CLGR = 237,
3547 CLGRL = 238,
3548 CLHF = 239,
3549 CLHHSI_CLHRL = 240,
3550 CLIH = 241,
3551 CLI_CLIY = 242,
3552 CLR = 243,
3553 CLRL = 244,
3554 CHHR_CLHHR = 245,
3555 CHLR_CLHLR = 246,
3556 CH_CHY = 247,
3557 CHRL = 248,
3558 CGH = 249,
3559 CGHRL = 250,
3560 CHHSI = 251,
3561 CGF = 252,
3562 CGFRL = 253,
3563 CGFR = 254,
3564 CLC = 255,
3565 CLCL_CLCLE_CLCLU = 256,
3566 CLST = 257,
3567 TM_TMY = 258,
3568 TMHMux_TMLMux = 259,
3569 TMHH64_TMHH = 260,
3570 TMHL64_TMHL = 261,
3571 TMLH64_TMLH = 262,
3572 TMLL64_TMLL = 263,
3573 CLM_CLMH_CLMY = 264,
3574 PFD_PFDRL = 265,
3575 BPP = 266,
3576 BPRP = 267,
3577 NIAI = 268,
3578 Serialize = 269,
3579 LAA_LAAG = 270,
3580 LAAL_LAALG = 271,
3581 LAN_LANG = 272,
3582 LAO_LAOG = 273,
3583 LAX_LAXG = 274,
3584 TS = 275,
3585 CS_CSG_CSY = 276,
3586 CDS_CDSY = 277,
3587 CDSG = 278,
3588 CSST = 279,
3589 PLO = 280,
3590 LPQ = 281,
3591 STPQ = 282,
3592 LPD_LPDG = 283,
3593 CAL_CALG_CALGF = 284,
3594 PFCR = 285,
3595 TR = 286,
3596 TRT = 287,
3597 TRTR = 288,
3598 TRE = 289,
3599 TRTE_TRTEOpt_TRTRE_TRTREOpt = 290,
3600 TROO_TROOOpt_TROT_TROTOpt_TRTO_TRTOOpt_TRTT_TRTTOpt = 291,
3601 CU12_CU12Opt_CU14_CU14Opt_CU21_CU21Opt_CU24_CU24Opt_CU41_CU42 = 292,
3602 CUTFU_CUTFUOpt_CUUTF_CUUTFOpt = 293,
3603 KM_KMA_KMC_KMCTR_KMF_KMO = 294,
3604 KDSA_KIMD_KIMDOpt_KLMD_KLMDOpt_KMAC = 295,
3605 PCC_PPNO_PRNO = 296,
3606 LGG = 297,
3607 LLGFSG = 298,
3608 LGSC_STGSC = 299,
3609 CVBG = 300,
3610 CVB_CVBY = 301,
3611 CVDG = 302,
3612 CVD_CVDY = 303,
3613 MVN_MVO_MVZ = 304,
3614 PACK_PKA_PKU = 305,
3615 UNPKA_UNPKU = 306,
3616 UNPK = 307,
3617 AP_SP_ZAP = 308,
3618 MP = 309,
3619 DP = 310,
3620 SRP = 311,
3621 CP = 312,
3622 TP = 313,
3623 ED_EDMK = 314,
3624 CPYA_EAR_SAR = 315,
3625 LAE_LAEY = 316,
3626 LAM_LAMY = 317,
3627 STAM_STAMY = 318,
3628 IPM = 319,
3629 SPM = 320,
3630 BAL_BALR = 321,
3631 TAM = 322,
3632 SAM24_SAM31_SAM64 = 323,
3633 BSM = 324,
3634 BASSM = 325,
3635 TBEGIN_TBEGINC = 326,
3636 TEND = 327,
3637 TABORT = 328,
3638 ETND = 329,
3639 NTSTG = 330,
3640 PPA = 331,
3641 CLZG_CTZG = 332,
3642 FLOGR = 333,
3643 POPCNT_POPCNTOpt = 334,
3644 BDEPG_BEXTG = 335,
3645 SRST_SRSTU = 336,
3646 CUSE = 337,
3647 CFC = 338,
3648 UPT = 339,
3649 CKSM = 340,
3650 CMPSC = 341,
3651 SORTL = 342,
3652 DFLTCC = 343,
3653 NNPA = 344,
3654 EX_EXRL = 345,
3655 InsnE_InsnRI_InsnRIE_InsnRIL_InsnRILU_InsnRIS_InsnRR_InsnRRE_InsnRRF_InsnRRS_InsnRS_InsnRSE_InsnRSI_InsnRSY_InsnRX_InsnRXE_InsnRXF_InsnRXY_InsnS_InsnSI_InsnSIL_InsnSIY_InsnSS_InsnSSE_InsnSSF_InsnVRI_InsnVRR_InsnVRS_InsnVRV_InsnVRX_InsnVSI = 346,
3656 LZDR_LZER_LZER_16 = 347,
3657 LZXR = 348,
3658 LER_LER16 = 349,
3659 LDGR_LDR_LDR16_LDR32 = 350,
3660 LGDR = 351,
3661 LXR = 352,
3662 LTDBR_LTEBR = 353,
3663 LTXBR = 354,
3664 CPSDRdd_CPSDRdh_CPSDRds_CPSDRhd_CPSDRhh_CPSDRhs_CPSDRsd_CPSDRsh_CPSDRss = 355,
3665 LE_LE16_LE16Y_LEY = 356,
3666 LD_LDE32_LDY = 357,
3667 LX = 358,
3668 STD_STDY_STE_STE16_STE16Y_STEY = 359,
3669 STX = 360,
3670 LEDBR_LEDBRA = 361,
3671 LDXBR_LDXBRA_LEXBR_LEXBRA = 362,
3672 LDEB = 363,
3673 LDEBR = 364,
3674 LXDB_LXEB = 365,
3675 LXDBR_LXEBR = 366,
3676 CDFBR_CDFBRA_CDGBR_CDGBRA_CEFBR_CEFBRA_CEGBR_CEGBRA = 367,
3677 CXFBR_CXFBRA_CXGBR_CXGBRA = 368,
3678 CDLFBR_CDLGBR_CELFBR_CELGBR = 369,
3679 CXLFBR_CXLGBR = 370,
3680 CFDBR_CFDBRA_CFEBR_CFEBRA_CGDBR_CGDBRA_CGEBR_CGEBRA = 371,
3681 CFXBR_CFXBRA_CGXBR_CGXBRA = 372,
3682 CLFEBR = 373,
3683 CLFDBR = 374,
3684 CLGDBR_CLGEBR = 375,
3685 CLFXBR_CLGXBR = 376,
3686 LCDBR_LCEBR_LNDBR_LNEBR_LPDBR_LPEBR = 377,
3687 LCDFR_LCDFR_16_LCDFR_32_LNDFR_LNDFR_16_LNDFR_32_LPDFR_LPDFR_16_LPDFR_32 = 378,
3688 LCXBR_LNXBR_LPXBR = 379,
3689 SQDB_SQEB = 380,
3690 SQEBR = 381,
3691 SQDBR = 382,
3692 SQXBR = 383,
3693 FIDBR_FIDBRA_FIEBR_FIEBRA = 384,
3694 FIXBR_FIXBRA = 385,
3695 ADB_AEB = 386,
3696 ADBR_AEBR = 387,
3697 AXBR = 388,
3698 SDB_SEB = 389,
3699 SDBR_SEBR = 390,
3700 SXBR = 391,
3701 MDB_MDEB_MEEB = 392,
3702 MDBR_MDEBR_MEEBR = 393,
3703 MXDB = 394,
3704 MXDBR = 395,
3705 MXBR = 396,
3706 MAEB_MSEB = 397,
3707 MAEBR_MSEBR = 398,
3708 MADB_MSDB = 399,
3709 MADBR_MSDBR = 400,
3710 DEB = 401,
3711 DDB = 402,
3712 DEBR = 403,
3713 DDBR = 404,
3714 DXBR = 405,
3715 DIDBR_DIEBR = 406,
3716 CDB_CEB_KDB_KEB = 407,
3717 CDBR_CEBR_KDBR_KEBR = 408,
3718 CXBR_KXBR = 409,
3719 TCDB_TCEB = 410,
3720 TCXB = 411,
3721 EFPC = 412,
3722 STFPC = 413,
3723 SFPC = 414,
3724 LFPC = 415,
3725 SFASR = 416,
3726 LFAS = 417,
3727 SRNM_SRNMB_SRNMT = 418,
3728 LTDR_LTER = 419,
3729 LTXR = 420,
3730 LEDR_LRER = 421,
3731 LEXR = 422,
3732 LDXR_LRDR = 423,
3733 LDE = 424,
3734 LDER = 425,
3735 LXD_LXE = 426,
3736 LXDR_LXER = 427,
3737 CDFR_CDGR_CEFR_CEGR = 428,
3738 CXFR_CXGR = 429,
3739 CFDR_CFER_CGDR_CGER = 430,
3740 CFXR_CGXR = 431,
3741 THDER_THDR = 432,
3742 TBDR_TBEDR = 433,
3743 LCDR_LCER_LNDR_LNER_LPDR_LPER = 434,
3744 LCXR_LNXR_LPXR = 435,
3745 HDR_HER = 436,
3746 SQD_SQE = 437,
3747 SQER = 438,
3748 SQDR = 439,
3749 SQXR = 440,
3750 FIDR_FIER = 441,
3751 FIXR = 442,
3752 AD_AE_AU_AW = 443,
3753 ADR_AER_AUR_AWR = 444,
3754 AXR = 445,
3755 SD_SE_SU_SW = 446,
3756 SDR_SER_SUR_SWR = 447,
3757 SXR = 448,
3758 MD_MDE_ME_MEE = 449,
3759 MDER_MDR_MEER_MER = 450,
3760 MXD = 451,
3761 MXDR = 452,
3762 MXR = 453,
3763 MY = 454,
3764 MYH_MYL = 455,
3765 MYR = 456,
3766 MYHR_MYLR = 457,
3767 MAD_MAE_MSD_MSE = 458,
3768 MADR_MAER_MSDR_MSER = 459,
3769 MAY = 460,
3770 MAYH_MAYL = 461,
3771 MAYR = 462,
3772 MAYHR_MAYLR = 463,
3773 DE = 464,
3774 DD = 465,
3775 DER = 466,
3776 DDR = 467,
3777 DXR = 468,
3778 CD_CE = 469,
3779 CDR_CER = 470,
3780 CXR = 471,
3781 LTDTR = 472,
3782 LTXTR = 473,
3783 LEDTR = 474,
3784 LDXTR = 475,
3785 LDETR = 476,
3786 LXDTR = 477,
3787 CDFTR = 478,
3788 CDGTR_CDGTRA = 479,
3789 CXFTR = 480,
3790 CXGTR_CXGTRA = 481,
3791 CDLFTR = 482,
3792 CDLGTR = 483,
3793 CXLFTR = 484,
3794 CXLGTR = 485,
3795 CFDTR_CGDTR_CGDTRA = 486,
3796 CFXTR_CGXTR_CGXTRA = 487,
3797 CLFDTR_CLGDTR = 488,
3798 CLFXTR_CLGXTR = 489,
3799 CDSTR_CDUTR = 490,
3800 CXSTR_CXUTR = 491,
3801 CSDTR_CUDTR = 492,
3802 CSXTR_CUXTR = 493,
3803 CDZT = 494,
3804 CXZT = 495,
3805 CZDT = 496,
3806 CZXT = 497,
3807 CDPT = 498,
3808 CXPT = 499,
3809 CPDT = 500,
3810 CPXT = 501,
3811 PFPO = 502,
3812 FIDTR = 503,
3813 FIXTR = 504,
3814 EEDTR = 505,
3815 EEXTR = 506,
3816 ESDTR = 507,
3817 ESXTR = 508,
3818 ADTR_ADTRA = 509,
3819 AXTR_AXTRA = 510,
3820 SDTR_SDTRA = 511,
3821 SXTR_SXTRA = 512,
3822 MDTR_MDTRA = 513,
3823 MXTR_MXTRA = 514,
3824 DDTR_DDTRA = 515,
3825 DXTR_DXTRA = 516,
3826 QADTR = 517,
3827 QAXTR = 518,
3828 RRDTR = 519,
3829 RRXTR = 520,
3830 SLDT_SRDT = 521,
3831 SLXT_SRXT = 522,
3832 IEDTR = 523,
3833 IEXTR = 524,
3834 CDTR_KDTR = 525,
3835 CXTR_KXTR = 526,
3836 CEDTR = 527,
3837 CEXTR = 528,
3838 TDCDT_TDCET_TDGDT_TDGET = 529,
3839 TDCXT_TDGXT = 530,
3840 VLR32_VLR64_VLR = 531,
3841 VLGV_VLGVB_VLGVF_VLGVG_VLGVH = 532,
3842 VLVG_VLVGB_VLVGF_VLVGG_VLVGH = 533,
3843 VLVGP32_VLVGP = 534,
3844 VZERO = 535,
3845 VONE = 536,
3846 VGBM = 537,
3847 VGM_VGMB_VGMF_VGMG_VGMH = 538,
3848 VREPI_VREPIB_VREPIF_VREPIG_VREPIH = 539,
3849 VLEIB_VLEIF_VLEIG_VLEIH = 540,
3850 VL_VLAlign = 541,
3851 VLBB_VLL = 542,
3852 VL16_VL32_VL64 = 543,
3853 VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH_VLLEZLF = 544,
3854 VLREP_VLREPB_VLREPF_VLREPG_VLREPH = 545,
3855 VLEB_VLEF_VLEG_VLEH = 546,
3856 VGEF_VGEG = 547,
3857 VLM_VLMAlign = 548,
3858 VLRL_VLRLR = 549,
3859 VST16_VST32_VST64_VST_VSTAlign_VSTL = 550,
3860 VSTEF_VSTEG = 551,
3861 VSTEB_VSTEH = 552,
3862 VSTM_VSTMAlign = 553,
3863 VSCEF_VSCEG = 554,
3864 VSTRL_VSTRLR = 555,
3865 VLBR_VLBRF_VLBRG_VLBRH_VLBRQ = 556,
3866 VLER_VLERF_VLERG_VLERH = 557,
3867 VLEBRF_VLEBRG_VLEBRH = 558,
3868 VLLEBRZ_VLLEBRZE_VLLEBRZF_VLLEBRZG_VLLEBRZH = 559,
3869 VLBRREP_VLBRREPF_VLBRREPG_VLBRREPH = 560,
3870 VSTBR_VSTBRF_VSTBRG_VSTBRH_VSTBRQ = 561,
3871 VSTER_VSTERF_VSTERG_VSTERH = 562,
3872 VSTEBRH = 563,
3873 VSTEBRF_VSTEBRG = 564,
3874 VMRH_VMRHB_VMRHF_VMRHG_VMRHH = 565,
3875 VMRL_VMRLB_VMRLF_VMRLG_VMRLH = 566,
3876 VPERM = 567,
3877 VPDI = 568,
3878 VBPERM = 569,
3879 VREP_VREPB_VREPF_VREPG_VREPH = 570,
3880 VSEL = 571,
3881 VBLEND_VBLENDB_VBLENDF_VBLENDG_VBLENDH_VBLENDQ = 572,
3882 VPK_VPKF_VPKG_VPKH = 573,
3883 VPKS_VPKSF_VPKSG_VPKSH = 574,
3884 VPKSFS_VPKSGS_VPKSHS = 575,
3885 VPKLS_VPKLSF_VPKLSG_VPKLSH = 576,
3886 VPKLSFS_VPKLSGS_VPKLSHS = 577,
3887 VSEG_VSEGB_VSEGF_VSEGH = 578,
3888 VGEM_VGEMB_VGEMF_VGEMG_VGEMH_VGEMQ = 579,
3889 VUPH_VUPHB_VUPHF_VUPHG_VUPHH = 580,
3890 VUPL_VUPLB_VUPLF_VUPLG = 581,
3891 VUPLH_VUPLHB_VUPLHF_VUPLHG_VUPLHH_VUPLHW = 582,
3892 VUPLL_VUPLLB_VUPLLF_VUPLLG_VUPLLH = 583,
3893 VA_VAB_VAC_VACQ_VAF_VAG_VAH_VAQ = 584,
3894 VACC_VACCB_VACCC_VACCCQ_VACCF_VACCG_VACCH_VACCQ = 585,
3895 VAVG_VAVGB_VAVGF_VAVGG_VAVGH_VAVGQ = 586,
3896 VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH_VAVGLQ = 587,
3897 VN_VNC_VNN_VNO_VNX = 588,
3898 VO_VOC = 589,
3899 VCKSM = 590,
3900 VCLZ_VCLZB_VCLZF_VCLZG_VCLZH_VCLZQ = 591,
3901 VCTZ_VCTZB_VCTZF_VCTZG_VCTZH_VCTZQ = 592,
3902 VD_VDF_VDG_VDL_VDLF_VDLG_VDLQ_VDQ = 593,
3903 VEVAL = 594,
3904 VX = 595,
3905 VGFM = 596,
3906 VGFMA_VGFMAB_VGFMAF_VGFMAG_VGFMAH = 597,
3907 VGFMB_VGFMF_VGFMG_VGFMH = 598,
3908 VLC_VLCB_VLCF_VLCG_VLCH_VLCQ = 599,
3909 VLP_VLPB_VLPF_VLPG_VLPH_VLPQ = 600,
3910 VMX_VMXB_VMXF_VMXG_VMXH_VMXQ = 601,
3911 VMXL_VMXLB_VMXLF_VMXLG_VMXLH_VMXLQ = 602,
3912 VMN_VMNB_VMNF_VMNG_VMNH_VMNQ = 603,
3913 VMNL_VMNLB_VMNLF_VMNLG_VMNLH_VMNLQ = 604,
3914 VMAL_VMALB_VMALF_VMALG_VMALQ = 605,
3915 VMALE_VMALEB_VMALEF_VMALEG_VMALEH = 606,
3916 VMALH_VMALHB_VMALHF_VMALHG_VMALHH_VMALHQ_VMALHW = 607,
3917 VMALO_VMALOB_VMALOF_VMALOG_VMALOH = 608,
3918 VMAO_VMAOB_VMAOF_VMAOG_VMAOH = 609,
3919 VMAE_VMAEB_VMAEF_VMAEG_VMAEH = 610,
3920 VMAH_VMAHB_VMAHF_VMAHG_VMAHH_VMAHQ = 611,
3921 VME_VMEB_VMEF_VMEG_VMEH = 612,
3922 VMH_VMHB_VMHF_VMHG_VMHH_VMHQ = 613,
3923 VML_VMLB_VMLF_VMLG_VMLQ = 614,
3924 VMLE_VMLEB_VMLEF_VMLEG_VMLEH = 615,
3925 VMLH_VMLHB_VMLHF_VMLHG_VMLHH_VMLHQ_VMLHW = 616,
3926 VMLO_VMLOB_VMLOF_VMLOG_VMLOH = 617,
3927 VMO_VMOB_VMOF_VMOG_VMOH = 618,
3928 VMSL_VMSLG = 619,
3929 VPOPCT_VPOPCTB_VPOPCTF_VPOPCTG_VPOPCTH = 620,
3930 VR_VRF_VRG_VRL_VRLF_VRLG_VRLQ_VRQ = 621,
3931 VERLL_VERLLB_VERLLF_VERLLG_VERLLH = 622,
3932 VERLLV_VERLLVB_VERLLVF_VERLLVG_VERLLVH = 623,
3933 VERIM_VERIMB_VERIMF_VERIMG_VERIMH = 624,
3934 VESL_VESLB_VESLF_VESLG_VESLH = 625,
3935 VESLV_VESLVB_VESLVF_VESLVG_VESLVH = 626,
3936 VESRA_VESRAB_VESRAF_VESRAG_VESRAH = 627,
3937 VESRAV_VESRAVB_VESRAVF_VESRAVG_VESRAVH = 628,
3938 VESRL_VESRLB_VESRLF_VESRLG_VESRLH = 629,
3939 VESRLV_VESRLVB_VESRLVF_VESRLVG_VESRLVH = 630,
3940 VSL_VSLDB = 631,
3941 VSLB = 632,
3942 VSRA_VSRL = 633,
3943 VSRAB_VSRLB = 634,
3944 VSLD = 635,
3945 VSRD = 636,
3946 VSB_VSBCBI_VSBCBIQ_VSBI_VSBIQ = 637,
3947 VSCBI_VSCBIB_VSCBIF_VSCBIG_VSCBIH_VSCBIQ = 638,
3948 VS_VSF_VSG_VSH_VSQ = 639,
3949 VSUM_VSUMB_VSUMH = 640,
3950 VSUMG_VSUMGF_VSUMGH = 641,
3951 VSUMQ_VSUMQF_VSUMQG = 642,
3952 VEC_VECB_VECF_VECG_VECH_VECQ = 643,
3953 VECL_VECLB_VECLF_VECLG_VECLH_VECLQ = 644,
3954 VCEQ_VCEQB_VCEQF_VCEQG_VCEQH_VCEQQ = 645,
3955 VCEQBS_VCEQFS_VCEQGS_VCEQHS_VCEQQS = 646,
3956 VCH_VCHB_VCHF_VCHG_VCHH_VCHQ = 647,
3957 VCHBS_VCHFS_VCHGS_VCHHS_VCHQS = 648,
3958 VCHL_VCHLB_VCHLF_VCHLG_VCHLH_VCHLQ = 649,
3959 VCHLBS_VCHLFS_VCHLGS_VCHLHS_VCHLQS = 650,
3960 VTM = 651,
3961 VCFPL_VCFPS = 652,
3962 VCDG_VCDLG = 653,
3963 VCDGB_VCDLGB = 654,
3964 WCDGB_WCDLGB = 655,
3965 VCEFB_VCELFB = 656,
3966 WCEFB_WCELFB = 657,
3967 VCLFP_VCSFP = 658,
3968 VCGD_VCLGD = 659,
3969 VCGDB_VCLGDB = 660,
3970 WCGDB_WCLGDB = 661,
3971 VCFEB_VCLFEB = 662,
3972 WCFEB_WCLFEB = 663,
3973 VLDE_VLED = 664,
3974 VLDEB_VLEDB = 665,
3975 WLDEB_WLEDB = 666,
3976 VFLL_VFLR = 667,
3977 VFLLS_VFLRD = 668,
3978 WFLLS_WFLRD = 669,
3979 WFLLD = 670,
3980 WFLRX = 671,
3981 VFI_VFIDB = 672,
3982 WFIDB = 673,
3983 VFISB = 674,
3984 WFISB = 675,
3985 WFIXB = 676,
3986 VFPSO = 677,
3987 VFPSODB_WFPSODB = 678,
3988 VFPSOSB_WFPSOSB = 679,
3989 WFPSOXB = 680,
3990 VFLCDB_VFLNDB_VFLPDB_WFLCDB_WFLNDB_WFLPDB = 681,
3991 VFLCSB_VFLNSB_VFLPSB_WFLCSB_WFLNSB_WFLPSB = 682,
3992 WFLCXB_WFLNXB_WFLPXB = 683,
3993 VFMAX_VFMIN = 684,
3994 VFMAXDB_VFMINDB = 685,
3995 WFMAXDB_WFMINDB = 686,
3996 VFMAXSB_VFMINSB = 687,
3997 WFMAXSB_WFMINSB = 688,
3998 WFMAXXB_WFMINXB = 689,
3999 VFTCI = 690,
4000 VFTCIDB_WFTCIDB = 691,
4001 VFTCISB_WFTCISB = 692,
4002 WFTCIXB = 693,
4003 VFA_VFS = 694,
4004 VFADB_VFSDB = 695,
4005 WFADB_WFSDB = 696,
4006 VFASB_VFSSB = 697,
4007 WFASB_WFSSB = 698,
4008 WFAXB_WFSXB = 699,
4009 VFM_VFMDB = 700,
4010 WFMDB_WFMSB = 701,
4011 VFMSB = 702,
4012 WFMXB = 703,
4013 VFMA_VFMS_VFNMA_VFNMS = 704,
4014 VFMADB_VFMSDB_VFNMADB_VFNMSDB = 705,
4015 WFMADB_WFMSDB_WFNMADB_WFNMSDB = 706,
4016 VFMASB_VFMSSB_VFNMASB_VFNMSSB = 707,
4017 WFMASB_WFMSSB_WFNMASB_WFNMSSB = 708,
4018 WFMAXB_WFMSXB_WFNMAXB_WFNMSXB = 709,
4019 VFD = 710,
4020 VFDDB_WFDDB = 711,
4021 WFDSB = 712,
4022 VFDSB = 713,
4023 WFDXB = 714,
4024 VFSQ = 715,
4025 VFSQDB_WFSQDB = 716,
4026 WFSQSB = 717,
4027 VFSQSB = 718,
4028 WFSQXB = 719,
4029 VFCE_VFCH_VFCHE = 720,
4030 VFCEDB_VFCHDB_VFCHEDB_VFKEDB_VFKHDB_VFKHEDB = 721,
4031 WFCEDB_WFCHDB_WFCHEDB = 722,
4032 WFKEDB_WFKHDB_WFKHEDB = 723,
4033 VFCESB_VFCHESB_VFCHSB_VFKESB_VFKHESB_VFKHSB = 724,
4034 WFCESB_WFCHESB_WFCHSB = 725,
4035 WFKESB_WFKHESB_WFKHSB = 726,
4036 WFCEXB_WFCHEXB_WFCHXB = 727,
4037 WFKEXB_WFKHEXB_WFKHXB = 728,
4038 VFCEDBS_VFCHDBS_VFCHEDBS = 729,
4039 VFKEDBS_VFKHDBS_VFKHEDBS = 730,
4040 WFCEDBS_WFCHDBS_WFCHEDBS_WFKEDBS_WFKHDBS_WFKHEDBS = 731,
4041 VFCESBS_VFCHESBS_VFCHSBS_VFKESBS_VFKHESBS_VFKHSBS = 732,
4042 WFCESBS_WFCHESBS_WFCHSBS = 733,
4043 WFKESBS_WFKHESBS_WFKHSBS = 734,
4044 WFCEXBS_WFCHEXBS_WFCHXBS = 735,
4045 WFKEXBS_WFKHEXBS_WFKHXBS = 736,
4046 WFC_WFK = 737,
4047 WFCDB_WFKDB = 738,
4048 WFCSB_WFKSB = 739,
4049 WFCXB_WFKXB = 740,
4050 LEFR_LEFR_16 = 741,
4051 LFER_LFER_16 = 742,
4052 VFAE_VFAEB = 743,
4053 VFAEF_VFAEH = 744,
4054 VFAEBS_VFAEFS_VFAEHS = 745,
4055 VFAEZB_VFAEZF_VFAEZH = 746,
4056 VFAEZBS_VFAEZFS_VFAEZHS = 747,
4057 VFEE_VFEEB_VFEEF_VFEEH_VFEEZB_VFEEZF_VFEEZH = 748,
4058 VFEEBS_VFEEFS_VFEEHS_VFEEZBS_VFEEZFS_VFEEZHS = 749,
4059 VFENE_VFENEB_VFENEF_VFENEH_VFENEZB_VFENEZF_VFENEZH = 750,
4060 VFENEBS_VFENEFS_VFENEHS_VFENEZBS_VFENEZFS_VFENEZHS = 751,
4061 VISTR_VISTRB_VISTRF_VISTRH = 752,
4062 VISTRBS_VISTRFS_VISTRHS = 753,
4063 VSTRC_VSTRCB_VSTRCF_VSTRCH = 754,
4064 VSTRCBS_VSTRCFS_VSTRCHS = 755,
4065 VSTRCZB_VSTRCZF_VSTRCZH = 756,
4066 VSTRCZBS_VSTRCZFS_VSTRCZHS = 757,
4067 VSTRS_VSTRSB_VSTRSF_VSTRSH = 758,
4068 VSTRSZB_VSTRSZF_VSTRSZH = 759,
4069 VCFN = 760,
4070 VCLFNH_VCLFNL = 761,
4071 VCNF_VCRNF = 762,
4072 VLIP = 763,
4073 VPKZ = 764,
4074 VUPKZ = 765,
4075 VCVB_VCVBG_VCVBGOpt_VCVBOpt_VCVBQ = 766,
4076 VCVD_VCVDG_VCVDQ = 767,
4077 VAP_VSP = 768,
4078 VMP_VMSP = 769,
4079 VDP_VRP = 770,
4080 VSDP = 771,
4081 VSRP_VSRPR = 772,
4082 VPSOP = 773,
4083 VCP_VTP_VTPOpt_VTZ = 774,
4084 VSCHDP_VSCHP_VSCHSP_VSCHXP = 775,
4085 VSCSHP = 776,
4086 VCSPH = 777,
4087 VCLZDP = 778,
4088 VPKZR = 779,
4089 VUPKZH = 780,
4090 VUPKZL = 781,
4091 EPSW = 782,
4092 LPSW_LPSWE_LPSWEY = 783,
4093 IPK = 784,
4094 SPKA = 785,
4095 SSM = 786,
4096 STNSM_STOSM = 787,
4097 IAC = 788,
4098 SAC_SACF = 789,
4099 LCTL_LCTLG = 790,
4100 STCTG_STCTL = 791,
4101 EPAIR_EPAR_ESAIR_ESAR = 792,
4102 SSAIR_SSAR = 793,
4103 ESEA = 794,
4104 SPX_STPX = 795,
4105 LBEAR = 796,
4106 STBEAR = 797,
4107 ISKE = 798,
4108 IVSK = 799,
4109 SSKE_SSKEOpt = 800,
4110 RRBE_RRBM = 801,
4111 IRBM = 802,
4112 PFMF = 803,
4113 TB = 804,
4114 PGIN = 805,
4115 PGOUT = 806,
4116 IPTE_IPTEOpt_IPTEOptOpt = 807,
4117 IDTE_IDTEOpt = 808,
4118 RDP_RDPOpt = 809,
4119 CRDTE_CRDTEOpt = 810,
4120 PTLB = 811,
4121 CSP_CSPG = 812,
4122 LPTEA = 813,
4123 LRA_LRAG_LRAY = 814,
4124 STRAG = 815,
4125 LURA_LURAG = 816,
4126 STURA_STURG = 817,
4127 TPROT = 818,
4128 MVCK_MVCP_MVCS = 819,
4129 MVCDK_MVCSK = 820,
4130 MVCOS = 821,
4131 MVPG = 822,
4132 LASP = 823,
4133 PALB = 824,
4134 PC = 825,
4135 PR = 826,
4136 PT_PTI = 827,
4137 RP = 828,
4138 BSA_BSG = 829,
4139 TAR = 830,
4140 BAKR = 831,
4141 EREG_EREGG = 832,
4142 ESTA_MSTA = 833,
4143 PTFF = 834,
4144 SCK_SCKC_SCKPF = 835,
4145 SPT = 836,
4146 STCK_STCKF = 837,
4147 STCKE = 838,
4148 STCKC = 839,
4149 STPT = 840,
4150 STAP = 841,
4151 STIDP = 842,
4152 STSI = 843,
4153 STFL_STFLE = 844,
4154 ECAG = 845,
4155 ECTG = 846,
4156 PTF = 847,
4157 PCKMO = 848,
4158 QPACI = 849,
4159 SVC = 850,
4160 MC = 851,
4161 DIAG = 852,
4162 TRACE = 853,
4163 TRACG = 854,
4164 TRAP2_TRAP4 = 855,
4165 SIGA_SIGP = 856,
4166 SIE = 857,
4167 LPP = 858,
4168 ECPGA = 859,
4169 ECCTR_EPCTR = 860,
4170 LCCTL = 861,
4171 LPCTL_LSCTL = 862,
4172 QCTRI_QSI = 863,
4173 SCCTR_SPCTR = 864,
4174 CSCH_HSCH_RSCH_XSCH = 865,
4175 MSCH_SSCH_STSCH_TSCH = 866,
4176 RCHP = 867,
4177 SCHM = 868,
4178 STCPS_STCRW = 869,
4179 TPEI_TPI = 870,
4180 SAL = 871,
4181 NOP_NOPOpt_NOPR_NOPROpt = 872,
4182 JGNOP_JNOP = 873,
4183 KDSA_KIMD_KLMD_KMAC = 874,
4184 VUPH_VUPHB_VUPHF_VUPHH = 875,
4185 VUPL_VUPLB_VUPLF = 876,
4186 VUPLH_VUPLHB_VUPLHF_VUPLHH_VUPLHW = 877,
4187 VUPLL_VUPLLB_VUPLLF_VUPLLH = 878,
4188 VAVG_VAVGB_VAVGF_VAVGG_VAVGH = 879,
4189 VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH = 880,
4190 VCLZ_VCLZB_VCLZF_VCLZG_VCLZH = 881,
4191 VCTZ_VCTZB_VCTZF_VCTZG_VCTZH = 882,
4192 VLC_VLCB_VLCF_VLCG_VLCH = 883,
4193 VLP_VLPB_VLPF_VLPG_VLPH = 884,
4194 VMX_VMXB_VMXF_VMXG_VMXH = 885,
4195 VMXL_VMXLB_VMXLF_VMXLG_VMXLH = 886,
4196 VMN_VMNB_VMNF_VMNG_VMNH = 887,
4197 VMNL_VMNLB_VMNLF_VMNLG_VMNLH = 888,
4198 VMAL_VMALB_VMALF = 889,
4199 VMALE_VMALEB_VMALEF_VMALEH = 890,
4200 VMALH_VMALHB_VMALHF_VMALHH_VMALHW = 891,
4201 VMALO_VMALOB_VMALOF_VMALOH = 892,
4202 VMAO_VMAOB_VMAOF_VMAOH = 893,
4203 VMAE_VMAEB_VMAEF_VMAEH = 894,
4204 VMAH_VMAHB_VMAHF_VMAHH = 895,
4205 VME_VMEB_VMEF_VMEH = 896,
4206 VMH_VMHB_VMHF_VMHH = 897,
4207 VML_VMLB_VMLF = 898,
4208 VMLE_VMLEB_VMLEF_VMLEH = 899,
4209 VMLH_VMLHB_VMLHF_VMLHH_VMLHW = 900,
4210 VMLO_VMLOB_VMLOF_VMLOH = 901,
4211 VMO_VMOB_VMOF_VMOH = 902,
4212 VEC_VECB_VECF_VECG_VECH = 903,
4213 VECL_VECLB_VECLF_VECLG_VECLH = 904,
4214 VCEQ_VCEQB_VCEQF_VCEQG_VCEQH = 905,
4215 VCEQBS_VCEQFS_VCEQGS_VCEQHS = 906,
4216 VCH_VCHB_VCHF_VCHG_VCHH = 907,
4217 VCHBS_VCHFS_VCHGS_VCHHS = 908,
4218 VCHL_VCHLB_VCHLF_VCHLG_VCHLH = 909,
4219 VCHLBS_VCHLFS_VCHLGS_VCHLHS = 910,
4220 VCVB_VCVBG_VCVBGOpt_VCVBOpt = 911,
4221 VCVD_VCVDG = 912,
4222 VSRP = 913,
4223 VCP_VTP = 914,
4224 LPSW_LPSWE = 915,
4225 KIMD_KLMD_KMAC = 916,
4226 POPCNT = 917,
4227 VFI = 918,
4228 VFM = 919,
4229 VCVB_VCVBG = 920,
4230 AGF = 921,
4231 SGF = 922,
4232 KM_KMC_KMCTR_KMF_KMO = 923,
4233 PCC_PPNO = 924,
4234 VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH = 925,
4235 VN_VNC_VNO = 926,
4236 VO = 927,
4237 VPOPCT = 928,
4238 WFMDB = 929,
4239 VFMA_VFMS = 930,
4240 VFMADB_VFMSDB = 931,
4241 WFMADB_WFMSDB = 932,
4242 VFCEDB_VFCHDB_VFCHEDB = 933,
4243 WFCEDBS_WFCHDBS_WFCHEDBS = 934,
4244 TPI = 935,
4245 LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 936,
4246 LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 937,
4247 STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 938,
4248 ALSI_ASI = 939,
4249 ALGF = 940,
4250 PCC = 941,
4251 CELFBR_CELGBR = 942,
4252 MD_MEE = 943,
4253 MDR_MEER = 944,
4254 CFDTR = 945,
4255 CFXTR = 946,
4256 TDCDT_TDGDT = 947,
4257 SCK = 948,
4258 SCKPF = 949,
4259 RISBG_RISBG32_RISBG32Opt_RISBGOpt_RISBGZ_RISBGZOpt = 950,
4260 SCHED_LIST_END = 951
4261 };
4262} // end namespace llvm::SystemZ::Sched
4263#endif // GET_INSTRINFO_SCHED_ENUM
4264
4265#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
4266namespace llvm {
4267
4268struct SystemZInstrTable {
4269 MCInstrDesc Insts[3285];
4270 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
4271 MCOperandInfo OperandInfo[1741];
4272 static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps");
4273 MCPhysReg ImplicitOps[104];
4274};
4275
4276} // end namespace llvm
4277#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
4278
4279#ifdef GET_INSTRINFO_MC_DESC
4280#undef GET_INSTRINFO_MC_DESC
4281namespace llvm {
4282
4283static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0);
4284static constexpr unsigned SystemZImpOpBase = sizeof SystemZInstrTable::OperandInfo / (sizeof(MCPhysReg));
4285
4286extern const SystemZInstrTable SystemZDescs = {
4287 {
4288 { 3284, 6, 0, 6, 308, 0, 1, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3284 = ZAP
4289 { 3283, 5, 1, 6, 169, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #3283 = XY
4290 { 3282, 0, 0, 4, 865, 1, 1, 1, SystemZImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3282 = XSCH
4291 { 3281, 3, 1, 4, 175, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3281 = XRK
4292 { 3280, 3, 1, 2, 175, 0, 1, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3280 = XR
4293 { 3279, 3, 0, 6, 170, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #3279 = XIY
4294 { 3278, 3, 1, 6, 174, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #3278 = XILF
4295 { 3277, 3, 1, 6, 173, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #3277 = XIHF
4296 { 3276, 3, 0, 4, 170, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3276 = XI
4297 { 3275, 3, 1, 4, 172, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3275 = XGRK
4298 { 3274, 3, 1, 4, 172, 0, 1, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3274 = XGR
4299 { 3273, 5, 1, 6, 169, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #3273 = XG
4300 { 3272, 5, 0, 6, 176, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3272 = XC
4301 { 3271, 5, 1, 4, 169, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #3271 = X
4302 { 3270, 4, 1, 6, 666, 1, 0, 1711, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3270 = WLEDB
4303 { 3269, 2, 1, 6, 666, 1, 0, 1709, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3269 = WLDEB
4304 { 3268, 3, 1, 6, 693, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3268 = WFTCIXB
4305 { 3267, 3, 1, 6, 692, 0, 1, 1738, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3267 = WFTCISB
4306 { 3266, 3, 1, 6, 691, 0, 1, 1735, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3266 = WFTCIDB
4307 { 3265, 3, 1, 6, 699, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3265 = WFSXB
4308 { 3264, 3, 1, 6, 698, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3264 = WFSSB
4309 { 3263, 2, 1, 6, 719, 1, 0, 441, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3263 = WFSQXB
4310 { 3262, 2, 1, 6, 717, 1, 0, 510, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3262 = WFSQSB
4311 { 3261, 2, 1, 6, 716, 1, 0, 512, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3261 = WFSQDB
4312 { 3260, 3, 1, 6, 696, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3260 = WFSDB
4313 { 3259, 3, 1, 6, 680, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3259 = WFPSOXB
4314 { 3258, 3, 1, 6, 679, 0, 0, 1738, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3258 = WFPSOSB
4315 { 3257, 3, 1, 6, 678, 0, 0, 1735, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3257 = WFPSODB
4316 { 3256, 4, 1, 6, 709, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3256 = WFNMSXB
4317 { 3255, 4, 1, 6, 708, 1, 0, 1723, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3255 = WFNMSSB
4318 { 3254, 4, 1, 6, 706, 1, 0, 1719, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3254 = WFNMSDB
4319 { 3253, 4, 1, 6, 709, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3253 = WFNMAXB
4320 { 3252, 4, 1, 6, 708, 1, 0, 1723, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3252 = WFNMASB
4321 { 3251, 4, 1, 6, 706, 1, 0, 1719, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3251 = WFNMADB
4322 { 3250, 3, 1, 6, 703, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3250 = WFMXB
4323 { 3249, 4, 1, 6, 709, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3249 = WFMSXB
4324 { 3248, 4, 1, 6, 708, 1, 0, 1723, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3248 = WFMSSB
4325 { 3247, 4, 1, 6, 932, 1, 0, 1719, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3247 = WFMSDB
4326 { 3246, 3, 1, 6, 701, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3246 = WFMSB
4327 { 3245, 4, 1, 6, 689, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3245 = WFMINXB
4328 { 3244, 4, 1, 6, 688, 1, 0, 1731, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3244 = WFMINSB
4329 { 3243, 4, 1, 6, 686, 1, 0, 1727, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3243 = WFMINDB
4330 { 3242, 3, 1, 6, 929, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3242 = WFMDB
4331 { 3241, 4, 1, 6, 689, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3241 = WFMAXXB
4332 { 3240, 4, 1, 6, 688, 1, 0, 1731, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3240 = WFMAXSB
4333 { 3239, 4, 1, 6, 686, 1, 0, 1727, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3239 = WFMAXDB
4334 { 3238, 4, 1, 6, 709, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3238 = WFMAXB
4335 { 3237, 4, 1, 6, 708, 1, 0, 1723, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3237 = WFMASB
4336 { 3236, 4, 1, 6, 932, 1, 0, 1719, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3236 = WFMADB
4337 { 3235, 4, 1, 6, 671, 1, 0, 1715, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3235 = WFLRX
4338 { 3234, 4, 1, 6, 669, 1, 0, 1711, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3234 = WFLRD
4339 { 3233, 2, 1, 6, 683, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3233 = WFLPXB
4340 { 3232, 2, 1, 6, 682, 0, 0, 510, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3232 = WFLPSB
4341 { 3231, 2, 1, 6, 681, 0, 0, 512, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3231 = WFLPDB
4342 { 3230, 2, 1, 6, 683, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3230 = WFLNXB
4343 { 3229, 2, 1, 6, 682, 0, 0, 510, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3229 = WFLNSB
4344 { 3228, 2, 1, 6, 681, 0, 0, 512, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3228 = WFLNDB
4345 { 3227, 2, 1, 6, 669, 1, 0, 1709, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3227 = WFLLS
4346 { 3226, 2, 1, 6, 670, 1, 0, 1707, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3226 = WFLLD
4347 { 3225, 2, 1, 6, 683, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3225 = WFLCXB
4348 { 3224, 2, 1, 6, 682, 0, 0, 510, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3224 = WFLCSB
4349 { 3223, 2, 1, 6, 681, 0, 0, 512, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3223 = WFLCDB
4350 { 3222, 2, 0, 6, 740, 1, 1, 441, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3222 = WFKXB
4351 { 3221, 2, 0, 6, 739, 1, 1, 510, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3221 = WFKSB
4352 { 3220, 3, 1, 6, 736, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3220 = WFKHXBS
4353 { 3219, 3, 1, 6, 728, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3219 = WFKHXB
4354 { 3218, 3, 1, 6, 734, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3218 = WFKHSBS
4355 { 3217, 3, 1, 6, 726, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3217 = WFKHSB
4356 { 3216, 3, 1, 6, 736, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3216 = WFKHEXBS
4357 { 3215, 3, 1, 6, 728, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3215 = WFKHEXB
4358 { 3214, 3, 1, 6, 734, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3214 = WFKHESBS
4359 { 3213, 3, 1, 6, 726, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3213 = WFKHESB
4360 { 3212, 3, 1, 6, 731, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3212 = WFKHEDBS
4361 { 3211, 3, 1, 6, 723, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3211 = WFKHEDB
4362 { 3210, 3, 1, 6, 731, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3210 = WFKHDBS
4363 { 3209, 3, 1, 6, 723, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3209 = WFKHDB
4364 { 3208, 3, 1, 6, 736, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3208 = WFKEXBS
4365 { 3207, 3, 1, 6, 728, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3207 = WFKEXB
4366 { 3206, 3, 1, 6, 734, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3206 = WFKESBS
4367 { 3205, 3, 1, 6, 726, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3205 = WFKESB
4368 { 3204, 3, 1, 6, 731, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3204 = WFKEDBS
4369 { 3203, 3, 1, 6, 723, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3203 = WFKEDB
4370 { 3202, 2, 0, 6, 738, 1, 1, 512, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3202 = WFKDB
4371 { 3201, 4, 0, 6, 737, 1, 1, 1693, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3201 = WFK
4372 { 3200, 4, 1, 6, 676, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3200 = WFIXB
4373 { 3199, 4, 1, 6, 675, 1, 0, 1697, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3199 = WFISB
4374 { 3198, 4, 1, 6, 673, 1, 0, 1693, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3198 = WFIDB
4375 { 3197, 3, 1, 6, 714, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3197 = WFDXB
4376 { 3196, 3, 1, 6, 712, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3196 = WFDSB
4377 { 3195, 3, 1, 6, 711, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3195 = WFDDB
4378 { 3194, 2, 0, 6, 740, 1, 1, 441, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3194 = WFCXB
4379 { 3193, 2, 0, 6, 739, 1, 1, 510, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3193 = WFCSB
4380 { 3192, 3, 1, 6, 735, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3192 = WFCHXBS
4381 { 3191, 3, 1, 6, 727, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3191 = WFCHXB
4382 { 3190, 3, 1, 6, 733, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3190 = WFCHSBS
4383 { 3189, 3, 1, 6, 725, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3189 = WFCHSB
4384 { 3188, 3, 1, 6, 735, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3188 = WFCHEXBS
4385 { 3187, 3, 1, 6, 727, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3187 = WFCHEXB
4386 { 3186, 3, 1, 6, 733, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3186 = WFCHESBS
4387 { 3185, 3, 1, 6, 725, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3185 = WFCHESB
4388 { 3184, 3, 1, 6, 934, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3184 = WFCHEDBS
4389 { 3183, 3, 1, 6, 722, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3183 = WFCHEDB
4390 { 3182, 3, 1, 6, 934, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3182 = WFCHDBS
4391 { 3181, 3, 1, 6, 722, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3181 = WFCHDB
4392 { 3180, 3, 1, 6, 735, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3180 = WFCEXBS
4393 { 3179, 3, 1, 6, 727, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3179 = WFCEXB
4394 { 3178, 3, 1, 6, 733, 1, 1, 1704, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3178 = WFCESBS
4395 { 3177, 3, 1, 6, 725, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3177 = WFCESB
4396 { 3176, 3, 1, 6, 934, 1, 1, 1701, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3176 = WFCEDBS
4397 { 3175, 3, 1, 6, 722, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3175 = WFCEDB
4398 { 3174, 2, 0, 6, 738, 1, 1, 512, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3174 = WFCDB
4399 { 3173, 4, 0, 6, 737, 1, 1, 1693, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3173 = WFC
4400 { 3172, 3, 1, 6, 699, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3172 = WFAXB
4401 { 3171, 3, 1, 6, 698, 1, 0, 1704, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3171 = WFASB
4402 { 3170, 3, 1, 6, 696, 1, 0, 1701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3170 = WFADB
4403 { 3169, 4, 1, 6, 661, 1, 0, 1693, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3169 = WCLGDB
4404 { 3168, 4, 1, 6, 663, 1, 0, 1697, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3168 = WCLFEB
4405 { 3167, 4, 1, 6, 661, 1, 0, 1693, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3167 = WCGDB
4406 { 3166, 4, 1, 6, 663, 1, 0, 1697, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3166 = WCFEB
4407 { 3165, 4, 1, 6, 657, 1, 0, 1697, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3165 = WCELFB
4408 { 3164, 4, 1, 6, 657, 1, 0, 1697, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3164 = WCEFB
4409 { 3163, 4, 1, 6, 655, 1, 0, 1693, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3163 = WCDLGB
4410 { 3162, 4, 1, 6, 655, 1, 0, 1693, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3162 = WCDGB
4411 { 3161, 1, 1, 6, 535, 0, 0, 1687, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3161 = VZERO
4412 { 3160, 3, 1, 6, 595, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3160 = VX
4413 { 3159, 2, 1, 6, 878, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3159 = VUPLLH
4414 { 3158, 2, 1, 6, 583, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3158 = VUPLLG
4415 { 3157, 2, 1, 6, 878, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3157 = VUPLLF
4416 { 3156, 2, 1, 6, 878, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3156 = VUPLLB
4417 { 3155, 3, 1, 6, 878, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3155 = VUPLL
4418 { 3154, 2, 1, 6, 877, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3154 = VUPLHW
4419 { 3153, 2, 1, 6, 877, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3153 = VUPLHH
4420 { 3152, 2, 1, 6, 582, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3152 = VUPLHG
4421 { 3151, 2, 1, 6, 877, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3151 = VUPLHF
4422 { 3150, 2, 1, 6, 877, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3150 = VUPLHB
4423 { 3149, 3, 1, 6, 877, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3149 = VUPLH
4424 { 3148, 2, 1, 6, 581, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3148 = VUPLG
4425 { 3147, 2, 1, 6, 876, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3147 = VUPLF
4426 { 3146, 2, 1, 6, 876, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3146 = VUPLB
4427 { 3145, 3, 1, 6, 876, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3145 = VUPL
4428 { 3144, 3, 1, 6, 781, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3144 = VUPKZL
4429 { 3143, 3, 1, 6, 780, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3143 = VUPKZH
4430 { 3142, 4, 0, 6, 765, 0, 0, 1664, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3142 = VUPKZ
4431 { 3141, 2, 1, 6, 875, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3141 = VUPHH
4432 { 3140, 2, 1, 6, 580, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3140 = VUPHG
4433 { 3139, 2, 1, 6, 875, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3139 = VUPHF
4434 { 3138, 2, 1, 6, 875, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3138 = VUPHB
4435 { 3137, 3, 1, 6, 875, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3137 = VUPH
4436 { 3136, 3, 0, 6, 774, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3136 = VTZ
4437 { 3135, 2, 0, 6, 774, 0, 1, 1608, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3135 = VTPOpt
4438 { 3134, 1, 0, 6, 914, 0, 1, 1687, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3134 = VTP
4439 { 3133, 2, 0, 6, 651, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #3133 = VTM
4440 { 3132, 3, 1, 6, 642, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3132 = VSUMQG
4441 { 3131, 3, 1, 6, 642, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3131 = VSUMQF
4442 { 3130, 4, 1, 6, 642, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3130 = VSUMQ
4443 { 3129, 3, 1, 6, 640, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3129 = VSUMH
4444 { 3128, 3, 1, 6, 641, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3128 = VSUMGH
4445 { 3127, 3, 1, 6, 641, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3127 = VSUMGF
4446 { 3126, 4, 1, 6, 641, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3126 = VSUMG
4447 { 3125, 3, 1, 6, 640, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3125 = VSUMB
4448 { 3124, 4, 1, 6, 640, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3124 = VSUM
4449 { 3123, 4, 1, 6, 759, 0, 1, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3123 = VSTRSZH
4450 { 3122, 4, 1, 6, 759, 0, 1, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3122 = VSTRSZF
4451 { 3121, 4, 1, 6, 759, 0, 1, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3121 = VSTRSZB
4452 { 3120, 5, 1, 6, 758, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3120 = VSTRSH
4453 { 3119, 5, 1, 6, 758, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3119 = VSTRSF
4454 { 3118, 5, 1, 6, 758, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3118 = VSTRSB
4455 { 3117, 6, 1, 6, 758, 0, 1, 1602, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3117 = VSTRS
4456 { 3116, 4, 0, 6, 555, 0, 0, 1651, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3116 = VSTRLR
4457 { 3115, 4, 0, 6, 555, 0, 0, 1664, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3115 = VSTRL
4458 { 3114, 5, 1, 6, 757, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3114 = VSTRCZHS
4459 { 3113, 5, 1, 6, 756, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3113 = VSTRCZH
4460 { 3112, 5, 1, 6, 757, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3112 = VSTRCZFS
4461 { 3111, 5, 1, 6, 756, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3111 = VSTRCZF
4462 { 3110, 5, 1, 6, 757, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3110 = VSTRCZBS
4463 { 3109, 5, 1, 6, 756, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3109 = VSTRCZB
4464 { 3108, 5, 1, 6, 755, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3108 = VSTRCHS
4465 { 3107, 5, 1, 6, 754, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3107 = VSTRCH
4466 { 3106, 5, 1, 6, 755, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3106 = VSTRCFS
4467 { 3105, 5, 1, 6, 754, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3105 = VSTRCF
4468 { 3104, 5, 1, 6, 755, 0, 1, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3104 = VSTRCBS
4469 { 3103, 5, 1, 6, 754, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3103 = VSTRCB
4470 { 3102, 6, 1, 6, 754, 0, 1, 1602, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3102 = VSTRC
4471 { 3101, 5, 0, 6, 553, 0, 0, 1659, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3101 = VSTMAlign
4472 { 3100, 4, 0, 6, 553, 0, 0, 1655, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3100 = VSTM
4473 { 3099, 4, 0, 6, 550, 0, 0, 1651, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3099 = VSTL
4474 { 3098, 4, 0, 6, 562, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3098 = VSTERH
4475 { 3097, 4, 0, 6, 562, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3097 = VSTERG
4476 { 3096, 4, 0, 6, 562, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3096 = VSTERF
4477 { 3095, 5, 0, 6, 562, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3095 = VSTER
4478 { 3094, 5, 0, 6, 552, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #3094 = VSTEH
4479 { 3093, 5, 0, 6, 551, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #3093 = VSTEG
4480 { 3092, 5, 0, 6, 551, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #3092 = VSTEF
4481 { 3091, 5, 0, 6, 563, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #3091 = VSTEBRH
4482 { 3090, 5, 0, 6, 564, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #3090 = VSTEBRG
4483 { 3089, 5, 0, 6, 564, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #3089 = VSTEBRF
4484 { 3088, 5, 0, 6, 552, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #3088 = VSTEB
4485 { 3087, 4, 0, 6, 561, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3087 = VSTBRQ
4486 { 3086, 4, 0, 6, 561, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3086 = VSTBRH
4487 { 3085, 4, 0, 6, 561, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3085 = VSTBRG
4488 { 3084, 4, 0, 6, 561, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #3084 = VSTBRF
4489 { 3083, 5, 0, 6, 561, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3083 = VSTBR
4490 { 3082, 5, 0, 6, 550, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x202ULL }, // Inst #3082 = VSTAlign
4491 { 3081, 4, 0, 6, 550, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x202ULL }, // Inst #3081 = VST
4492 { 3080, 5, 1, 6, 772, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3080 = VSRPR
4493 { 3079, 5, 1, 6, 913, 0, 1, 1542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3079 = VSRP
4494 { 3078, 3, 1, 6, 634, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3078 = VSRLB
4495 { 3077, 3, 1, 6, 633, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3077 = VSRL
4496 { 3076, 4, 1, 6, 636, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3076 = VSRD
4497 { 3075, 3, 1, 6, 634, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3075 = VSRAB
4498 { 3074, 3, 1, 6, 633, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3074 = VSRA
4499 { 3073, 3, 1, 6, 639, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3073 = VSQ
4500 { 3072, 5, 1, 6, 768, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3072 = VSP
4501 { 3071, 4, 1, 6, 631, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3071 = VSLDB
4502 { 3070, 4, 1, 6, 635, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3070 = VSLD
4503 { 3069, 3, 1, 6, 632, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3069 = VSLB
4504 { 3068, 3, 1, 6, 631, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3068 = VSL
4505 { 3067, 3, 1, 6, 639, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3067 = VSH
4506 { 3066, 3, 1, 6, 639, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3066 = VSG
4507 { 3065, 3, 1, 6, 639, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3065 = VSF
4508 { 3064, 4, 1, 6, 571, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3064 = VSEL
4509 { 3063, 2, 1, 6, 578, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3063 = VSEGH
4510 { 3062, 2, 1, 6, 578, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3062 = VSEGF
4511 { 3061, 2, 1, 6, 578, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3061 = VSEGB
4512 { 3060, 3, 1, 6, 578, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3060 = VSEG
4513 { 3059, 5, 1, 6, 771, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3059 = VSDP
4514 { 3058, 3, 1, 6, 776, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3058 = VSCSHP
4515 { 3057, 4, 1, 6, 775, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3057 = VSCHXP
4516 { 3056, 4, 1, 6, 775, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3056 = VSCHSP
4517 { 3055, 5, 1, 6, 775, 0, 0, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3055 = VSCHP
4518 { 3054, 4, 1, 6, 775, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3054 = VSCHDP
4519 { 3053, 5, 0, 6, 554, 0, 0, 1688, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #3053 = VSCEG
4520 { 3052, 5, 0, 6, 554, 0, 0, 1688, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #3052 = VSCEF
4521 { 3051, 3, 1, 6, 638, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3051 = VSCBIQ
4522 { 3050, 3, 1, 6, 638, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3050 = VSCBIH
4523 { 3049, 3, 1, 6, 638, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3049 = VSCBIG
4524 { 3048, 3, 1, 6, 638, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3048 = VSCBIF
4525 { 3047, 3, 1, 6, 638, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3047 = VSCBIB
4526 { 3046, 4, 1, 6, 638, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3046 = VSCBI
4527 { 3045, 4, 1, 6, 637, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3045 = VSBIQ
4528 { 3044, 5, 1, 6, 637, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3044 = VSBI
4529 { 3043, 4, 1, 6, 637, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3043 = VSBCBIQ
4530 { 3042, 5, 1, 6, 637, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3042 = VSBCBI
4531 { 3041, 3, 1, 6, 637, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3041 = VSB
4532 { 3040, 4, 1, 6, 639, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3040 = VS
4533 { 3039, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3039 = VRQ
4534 { 3038, 5, 1, 6, 770, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3038 = VRP
4535 { 3037, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3037 = VRLQ
4536 { 3036, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3036 = VRLG
4537 { 3035, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3035 = VRLF
4538 { 3034, 5, 1, 6, 621, 0, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3034 = VRL
4539 { 3033, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3033 = VRG
4540 { 3032, 4, 1, 6, 621, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3032 = VRF
4541 { 3031, 2, 1, 6, 539, 0, 0, 1608, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3031 = VREPIH
4542 { 3030, 2, 1, 6, 539, 0, 0, 1608, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3030 = VREPIG
4543 { 3029, 2, 1, 6, 539, 0, 0, 1608, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3029 = VREPIF
4544 { 3028, 2, 1, 6, 539, 0, 0, 1608, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3028 = VREPIB
4545 { 3027, 3, 1, 6, 539, 0, 0, 1620, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3027 = VREPI
4546 { 3026, 3, 1, 6, 570, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3026 = VREPH
4547 { 3025, 3, 1, 6, 570, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3025 = VREPG
4548 { 3024, 3, 1, 6, 570, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3024 = VREPF
4549 { 3023, 3, 1, 6, 570, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3023 = VREPB
4550 { 3022, 4, 1, 6, 570, 0, 0, 1547, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3022 = VREP
4551 { 3021, 5, 1, 6, 621, 0, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3021 = VR
4552 { 3020, 5, 1, 6, 773, 0, 1, 1542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3020 = VPSOP
4553 { 3019, 2, 1, 6, 620, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3019 = VPOPCTH
4554 { 3018, 2, 1, 6, 620, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3018 = VPOPCTG
4555 { 3017, 2, 1, 6, 620, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3017 = VPOPCTF
4556 { 3016, 2, 1, 6, 620, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3016 = VPOPCTB
4557 { 3015, 3, 1, 6, 928, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3015 = VPOPCT
4558 { 3014, 5, 1, 6, 779, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3014 = VPKZR
4559 { 3013, 4, 1, 6, 764, 0, 0, 1664, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #3013 = VPKZ
4560 { 3012, 3, 1, 6, 575, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3012 = VPKSHS
4561 { 3011, 3, 1, 6, 574, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3011 = VPKSH
4562 { 3010, 3, 1, 6, 575, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3010 = VPKSGS
4563 { 3009, 3, 1, 6, 574, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3009 = VPKSG
4564 { 3008, 3, 1, 6, 575, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3008 = VPKSFS
4565 { 3007, 3, 1, 6, 574, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3007 = VPKSF
4566 { 3006, 5, 1, 6, 574, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3006 = VPKS
4567 { 3005, 3, 1, 6, 577, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3005 = VPKLSHS
4568 { 3004, 3, 1, 6, 576, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3004 = VPKLSH
4569 { 3003, 3, 1, 6, 577, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3003 = VPKLSGS
4570 { 3002, 3, 1, 6, 576, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3002 = VPKLSG
4571 { 3001, 3, 1, 6, 577, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3001 = VPKLSFS
4572 { 3000, 3, 1, 6, 576, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #3000 = VPKLSF
4573 { 2999, 5, 1, 6, 576, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2999 = VPKLS
4574 { 2998, 3, 1, 6, 573, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2998 = VPKH
4575 { 2997, 3, 1, 6, 573, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2997 = VPKG
4576 { 2996, 3, 1, 6, 573, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2996 = VPKF
4577 { 2995, 4, 1, 6, 573, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2995 = VPK
4578 { 2994, 4, 1, 6, 567, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2994 = VPERM
4579 { 2993, 4, 1, 6, 568, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2993 = VPDI
4580 { 2992, 1, 1, 6, 536, 0, 0, 1687, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2992 = VONE
4581 { 2991, 3, 1, 6, 589, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2991 = VOC
4582 { 2990, 3, 1, 6, 927, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2990 = VO
4583 { 2989, 3, 1, 6, 588, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2989 = VNX
4584 { 2988, 3, 1, 6, 926, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2988 = VNO
4585 { 2987, 3, 1, 6, 588, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2987 = VNN
4586 { 2986, 3, 1, 6, 926, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2986 = VNC
4587 { 2985, 3, 1, 6, 926, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2985 = VN
4588 { 2984, 3, 1, 6, 601, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2984 = VMXQ
4589 { 2983, 3, 1, 6, 602, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2983 = VMXLQ
4590 { 2982, 3, 1, 6, 886, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2982 = VMXLH
4591 { 2981, 3, 1, 6, 886, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2981 = VMXLG
4592 { 2980, 3, 1, 6, 886, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2980 = VMXLF
4593 { 2979, 3, 1, 6, 886, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2979 = VMXLB
4594 { 2978, 4, 1, 6, 886, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2978 = VMXL
4595 { 2977, 3, 1, 6, 885, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2977 = VMXH
4596 { 2976, 3, 1, 6, 885, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2976 = VMXG
4597 { 2975, 3, 1, 6, 885, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2975 = VMXF
4598 { 2974, 3, 1, 6, 885, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2974 = VMXB
4599 { 2973, 4, 1, 6, 885, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2973 = VMX
4600 { 2972, 5, 1, 6, 769, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2972 = VMSP
4601 { 2971, 5, 1, 6, 619, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2971 = VMSLG
4602 { 2970, 6, 1, 6, 619, 0, 0, 1602, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2970 = VMSL
4603 { 2969, 3, 1, 6, 566, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2969 = VMRLH
4604 { 2968, 3, 1, 6, 566, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2968 = VMRLG
4605 { 2967, 3, 1, 6, 566, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2967 = VMRLF
4606 { 2966, 3, 1, 6, 566, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2966 = VMRLB
4607 { 2965, 4, 1, 6, 566, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2965 = VMRL
4608 { 2964, 3, 1, 6, 565, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2964 = VMRHH
4609 { 2963, 3, 1, 6, 565, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2963 = VMRHG
4610 { 2962, 3, 1, 6, 565, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2962 = VMRHF
4611 { 2961, 3, 1, 6, 565, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2961 = VMRHB
4612 { 2960, 4, 1, 6, 565, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2960 = VMRH
4613 { 2959, 5, 1, 6, 769, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2959 = VMP
4614 { 2958, 3, 1, 6, 902, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2958 = VMOH
4615 { 2957, 3, 1, 6, 618, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2957 = VMOG
4616 { 2956, 3, 1, 6, 902, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2956 = VMOF
4617 { 2955, 3, 1, 6, 902, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2955 = VMOB
4618 { 2954, 4, 1, 6, 902, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2954 = VMO
4619 { 2953, 3, 1, 6, 603, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2953 = VMNQ
4620 { 2952, 3, 1, 6, 604, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2952 = VMNLQ
4621 { 2951, 3, 1, 6, 888, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2951 = VMNLH
4622 { 2950, 3, 1, 6, 888, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2950 = VMNLG
4623 { 2949, 3, 1, 6, 888, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2949 = VMNLF
4624 { 2948, 3, 1, 6, 888, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2948 = VMNLB
4625 { 2947, 4, 1, 6, 888, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2947 = VMNL
4626 { 2946, 3, 1, 6, 887, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2946 = VMNH
4627 { 2945, 3, 1, 6, 887, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2945 = VMNG
4628 { 2944, 3, 1, 6, 887, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2944 = VMNF
4629 { 2943, 3, 1, 6, 887, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2943 = VMNB
4630 { 2942, 4, 1, 6, 887, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2942 = VMN
4631 { 2941, 3, 1, 6, 614, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2941 = VMLQ
4632 { 2940, 3, 1, 6, 901, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2940 = VMLOH
4633 { 2939, 3, 1, 6, 617, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2939 = VMLOG
4634 { 2938, 3, 1, 6, 901, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2938 = VMLOF
4635 { 2937, 3, 1, 6, 901, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2937 = VMLOB
4636 { 2936, 4, 1, 6, 901, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2936 = VMLO
4637 { 2935, 3, 1, 6, 900, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2935 = VMLHW
4638 { 2934, 3, 1, 6, 616, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2934 = VMLHQ
4639 { 2933, 3, 1, 6, 900, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2933 = VMLHH
4640 { 2932, 3, 1, 6, 616, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2932 = VMLHG
4641 { 2931, 3, 1, 6, 900, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2931 = VMLHF
4642 { 2930, 3, 1, 6, 900, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2930 = VMLHB
4643 { 2929, 4, 1, 6, 900, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2929 = VMLH
4644 { 2928, 3, 1, 6, 614, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2928 = VMLG
4645 { 2927, 3, 1, 6, 898, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2927 = VMLF
4646 { 2926, 3, 1, 6, 899, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2926 = VMLEH
4647 { 2925, 3, 1, 6, 615, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2925 = VMLEG
4648 { 2924, 3, 1, 6, 899, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2924 = VMLEF
4649 { 2923, 3, 1, 6, 899, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2923 = VMLEB
4650 { 2922, 4, 1, 6, 899, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2922 = VMLE
4651 { 2921, 3, 1, 6, 898, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2921 = VMLB
4652 { 2920, 4, 1, 6, 898, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2920 = VML
4653 { 2919, 3, 1, 6, 613, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2919 = VMHQ
4654 { 2918, 3, 1, 6, 897, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2918 = VMHH
4655 { 2917, 3, 1, 6, 613, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2917 = VMHG
4656 { 2916, 3, 1, 6, 897, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2916 = VMHF
4657 { 2915, 3, 1, 6, 897, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2915 = VMHB
4658 { 2914, 4, 1, 6, 897, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2914 = VMH
4659 { 2913, 3, 1, 6, 896, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2913 = VMEH
4660 { 2912, 3, 1, 6, 612, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2912 = VMEG
4661 { 2911, 3, 1, 6, 896, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2911 = VMEF
4662 { 2910, 3, 1, 6, 896, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2910 = VMEB
4663 { 2909, 4, 1, 6, 896, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2909 = VME
4664 { 2908, 4, 1, 6, 893, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2908 = VMAOH
4665 { 2907, 4, 1, 6, 609, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2907 = VMAOG
4666 { 2906, 4, 1, 6, 893, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2906 = VMAOF
4667 { 2905, 4, 1, 6, 893, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2905 = VMAOB
4668 { 2904, 5, 1, 6, 893, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2904 = VMAO
4669 { 2903, 4, 1, 6, 605, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2903 = VMALQ
4670 { 2902, 4, 1, 6, 892, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2902 = VMALOH
4671 { 2901, 4, 1, 6, 608, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2901 = VMALOG
4672 { 2900, 4, 1, 6, 892, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2900 = VMALOF
4673 { 2899, 4, 1, 6, 892, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2899 = VMALOB
4674 { 2898, 5, 1, 6, 892, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2898 = VMALO
4675 { 2897, 4, 1, 6, 891, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2897 = VMALHW
4676 { 2896, 4, 1, 6, 607, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2896 = VMALHQ
4677 { 2895, 4, 1, 6, 891, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2895 = VMALHH
4678 { 2894, 4, 1, 6, 607, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2894 = VMALHG
4679 { 2893, 4, 1, 6, 891, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2893 = VMALHF
4680 { 2892, 4, 1, 6, 891, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2892 = VMALHB
4681 { 2891, 5, 1, 6, 891, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2891 = VMALH
4682 { 2890, 4, 1, 6, 605, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2890 = VMALG
4683 { 2889, 4, 1, 6, 889, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2889 = VMALF
4684 { 2888, 4, 1, 6, 890, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2888 = VMALEH
4685 { 2887, 4, 1, 6, 606, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2887 = VMALEG
4686 { 2886, 4, 1, 6, 890, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2886 = VMALEF
4687 { 2885, 4, 1, 6, 890, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2885 = VMALEB
4688 { 2884, 5, 1, 6, 890, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2884 = VMALE
4689 { 2883, 4, 1, 6, 889, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2883 = VMALB
4690 { 2882, 5, 1, 6, 889, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2882 = VMAL
4691 { 2881, 4, 1, 6, 611, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2881 = VMAHQ
4692 { 2880, 4, 1, 6, 895, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2880 = VMAHH
4693 { 2879, 4, 1, 6, 611, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2879 = VMAHG
4694 { 2878, 4, 1, 6, 895, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2878 = VMAHF
4695 { 2877, 4, 1, 6, 895, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2877 = VMAHB
4696 { 2876, 5, 1, 6, 895, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2876 = VMAH
4697 { 2875, 4, 1, 6, 894, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2875 = VMAEH
4698 { 2874, 4, 1, 6, 610, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2874 = VMAEG
4699 { 2873, 4, 1, 6, 894, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2873 = VMAEF
4700 { 2872, 4, 1, 6, 894, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2872 = VMAEB
4701 { 2871, 5, 1, 6, 894, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2871 = VMAE
4702 { 2870, 3, 1, 6, 534, 0, 0, 1684, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2870 = VLVGP
4703 { 2869, 5, 1, 6, 533, 0, 0, 1674, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2869 = VLVGH
4704 { 2868, 5, 1, 6, 533, 0, 0, 1679, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2868 = VLVGG
4705 { 2867, 5, 1, 6, 533, 0, 0, 1674, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2867 = VLVGF
4706 { 2866, 5, 1, 6, 533, 0, 0, 1674, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2866 = VLVGB
4707 { 2865, 6, 1, 6, 533, 0, 0, 1668, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2865 = VLVG
4708 { 2864, 4, 1, 6, 549, 0, 0, 1651, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2864 = VLRLR
4709 { 2863, 4, 1, 6, 549, 0, 0, 1664, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2863 = VLRL
4710 { 2862, 4, 1, 6, 545, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2862 = VLREPH
4711 { 2861, 4, 1, 6, 545, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2861 = VLREPG
4712 { 2860, 4, 1, 6, 545, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2860 = VLREPF
4713 { 2859, 4, 1, 6, 545, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2859 = VLREPB
4714 { 2858, 5, 1, 6, 545, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2858 = VLREP
4715 { 2857, 2, 1, 6, 531, 0, 0, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #2857 = VLR
4716 { 2856, 2, 1, 6, 600, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2856 = VLPQ
4717 { 2855, 2, 1, 6, 884, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2855 = VLPH
4718 { 2854, 2, 1, 6, 884, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2854 = VLPG
4719 { 2853, 2, 1, 6, 884, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2853 = VLPF
4720 { 2852, 2, 1, 6, 884, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2852 = VLPB
4721 { 2851, 3, 1, 6, 884, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2851 = VLP
4722 { 2850, 5, 2, 6, 548, 0, 0, 1659, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2850 = VLMAlign
4723 { 2849, 4, 2, 6, 548, 0, 0, 1655, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2849 = VLM
4724 { 2848, 4, 1, 6, 544, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2848 = VLLEZLF
4725 { 2847, 4, 1, 6, 925, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2847 = VLLEZH
4726 { 2846, 4, 1, 6, 925, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2846 = VLLEZG
4727 { 2845, 4, 1, 6, 925, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2845 = VLLEZF
4728 { 2844, 4, 1, 6, 925, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2844 = VLLEZB
4729 { 2843, 5, 1, 6, 925, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2843 = VLLEZ
4730 { 2842, 4, 1, 6, 559, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2842 = VLLEBRZH
4731 { 2841, 4, 1, 6, 559, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2841 = VLLEBRZG
4732 { 2840, 4, 1, 6, 559, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2840 = VLLEBRZF
4733 { 2839, 4, 1, 6, 559, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2839 = VLLEBRZE
4734 { 2838, 5, 1, 6, 559, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2838 = VLLEBRZ
4735 { 2837, 4, 1, 6, 542, 0, 0, 1651, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2837 = VLL
4736 { 2836, 3, 1, 6, 763, 0, 0, 1620, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2836 = VLIP
4737 { 2835, 4, 1, 6, 532, 0, 0, 1647, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2835 = VLGVH
4738 { 2834, 4, 1, 6, 532, 0, 0, 1647, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2834 = VLGVG
4739 { 2833, 4, 1, 6, 532, 0, 0, 1647, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2833 = VLGVF
4740 { 2832, 4, 1, 6, 532, 0, 0, 1647, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2832 = VLGVB
4741 { 2831, 5, 1, 6, 532, 0, 0, 1642, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2831 = VLGV
4742 { 2830, 4, 1, 6, 557, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2830 = VLERH
4743 { 2829, 4, 1, 6, 557, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2829 = VLERG
4744 { 2828, 4, 1, 6, 557, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2828 = VLERF
4745 { 2827, 5, 1, 6, 557, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2827 = VLER
4746 { 2826, 4, 1, 6, 540, 0, 0, 1638, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2826 = VLEIH
4747 { 2825, 4, 1, 6, 540, 0, 0, 1638, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2825 = VLEIG
4748 { 2824, 4, 1, 6, 540, 0, 0, 1638, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2824 = VLEIF
4749 { 2823, 4, 1, 6, 540, 0, 0, 1638, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2823 = VLEIB
4750 { 2822, 6, 1, 6, 546, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2822 = VLEH
4751 { 2821, 6, 1, 6, 546, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2821 = VLEG
4752 { 2820, 6, 1, 6, 546, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2820 = VLEF
4753 { 2819, 4, 1, 6, 665, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2819 = VLEDB
4754 { 2818, 5, 1, 6, 664, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2818 = VLED
4755 { 2817, 6, 1, 6, 558, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2817 = VLEBRH
4756 { 2816, 6, 1, 6, 558, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2816 = VLEBRG
4757 { 2815, 6, 1, 6, 558, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2815 = VLEBRF
4758 { 2814, 6, 1, 6, 546, 0, 0, 1632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2814 = VLEB
4759 { 2813, 2, 1, 6, 665, 1, 0, 441, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2813 = VLDEB
4760 { 2812, 4, 1, 6, 664, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2812 = VLDE
4761 { 2811, 2, 1, 6, 599, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2811 = VLCQ
4762 { 2810, 2, 1, 6, 883, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2810 = VLCH
4763 { 2809, 2, 1, 6, 883, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2809 = VLCG
4764 { 2808, 2, 1, 6, 883, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2808 = VLCF
4765 { 2807, 2, 1, 6, 883, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2807 = VLCB
4766 { 2806, 3, 1, 6, 883, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2806 = VLC
4767 { 2805, 4, 1, 6, 560, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2805 = VLBRREPH
4768 { 2804, 4, 1, 6, 560, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2804 = VLBRREPG
4769 { 2803, 4, 1, 6, 560, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2803 = VLBRREPF
4770 { 2802, 5, 1, 6, 560, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2802 = VLBRREP
4771 { 2801, 4, 1, 6, 556, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2801 = VLBRQ
4772 { 2800, 4, 1, 6, 556, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2800 = VLBRH
4773 { 2799, 4, 1, 6, 556, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2799 = VLBRG
4774 { 2798, 4, 1, 6, 556, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2798 = VLBRF
4775 { 2797, 5, 1, 6, 556, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2797 = VLBR
4776 { 2796, 5, 1, 6, 542, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2796 = VLBB
4777 { 2795, 5, 1, 6, 541, 0, 0, 1627, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x201ULL }, // Inst #2795 = VLAlign
4778 { 2794, 4, 1, 6, 541, 0, 0, 1623, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x201ULL }, // Inst #2794 = VL
4779 { 2793, 2, 1, 6, 753, 0, 1, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2793 = VISTRHS
4780 { 2792, 3, 1, 6, 752, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2792 = VISTRH
4781 { 2791, 2, 1, 6, 753, 0, 1, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2791 = VISTRFS
4782 { 2790, 3, 1, 6, 752, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2790 = VISTRF
4783 { 2789, 2, 1, 6, 753, 0, 1, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2789 = VISTRBS
4784 { 2788, 3, 1, 6, 752, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2788 = VISTRB
4785 { 2787, 4, 1, 6, 752, 0, 1, 1547, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2787 = VISTR
4786 { 2786, 3, 1, 6, 538, 0, 0, 1620, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2786 = VGMH
4787 { 2785, 3, 1, 6, 538, 0, 0, 1620, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2785 = VGMG
4788 { 2784, 3, 1, 6, 538, 0, 0, 1620, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2784 = VGMF
4789 { 2783, 3, 1, 6, 538, 0, 0, 1620, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2783 = VGMB
4790 { 2782, 4, 1, 6, 538, 0, 0, 1616, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2782 = VGM
4791 { 2781, 3, 1, 6, 598, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2781 = VGFMH
4792 { 2780, 3, 1, 6, 598, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2780 = VGFMG
4793 { 2779, 3, 1, 6, 598, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2779 = VGFMF
4794 { 2778, 3, 1, 6, 598, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2778 = VGFMB
4795 { 2777, 4, 1, 6, 597, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2777 = VGFMAH
4796 { 2776, 4, 1, 6, 597, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2776 = VGFMAG
4797 { 2775, 4, 1, 6, 597, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2775 = VGFMAF
4798 { 2774, 4, 1, 6, 597, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2774 = VGFMAB
4799 { 2773, 5, 1, 6, 597, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2773 = VGFMA
4800 { 2772, 4, 1, 6, 596, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2772 = VGFM
4801 { 2771, 2, 1, 6, 579, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2771 = VGEMQ
4802 { 2770, 2, 1, 6, 579, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2770 = VGEMH
4803 { 2769, 2, 1, 6, 579, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2769 = VGEMG
4804 { 2768, 2, 1, 6, 579, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2768 = VGEMF
4805 { 2767, 2, 1, 6, 579, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2767 = VGEMB
4806 { 2766, 3, 1, 6, 579, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2766 = VGEM
4807 { 2765, 6, 1, 6, 547, 0, 0, 1610, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2765 = VGEG
4808 { 2764, 6, 1, 6, 547, 0, 0, 1610, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2764 = VGEF
4809 { 2763, 2, 1, 6, 537, 0, 0, 1608, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2763 = VGBM
4810 { 2762, 3, 1, 6, 692, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2762 = VFTCISB
4811 { 2761, 3, 1, 6, 691, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2761 = VFTCIDB
4812 { 2760, 5, 1, 6, 690, 0, 1, 1542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2760 = VFTCI
4813 { 2759, 3, 1, 6, 697, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2759 = VFSSB
4814 { 2758, 2, 1, 6, 718, 1, 0, 441, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2758 = VFSQSB
4815 { 2757, 2, 1, 6, 716, 1, 0, 441, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2757 = VFSQDB
4816 { 2756, 4, 1, 6, 715, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2756 = VFSQ
4817 { 2755, 3, 1, 6, 695, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2755 = VFSDB
4818 { 2754, 5, 1, 6, 694, 1, 0, 453, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2754 = VFS
4819 { 2753, 3, 1, 6, 679, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2753 = VFPSOSB
4820 { 2752, 3, 1, 6, 678, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2752 = VFPSODB
4821 { 2751, 5, 1, 6, 677, 0, 0, 1542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2751 = VFPSO
4822 { 2750, 4, 1, 6, 707, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2750 = VFNMSSB
4823 { 2749, 4, 1, 6, 705, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2749 = VFNMSDB
4824 { 2748, 6, 1, 6, 704, 1, 0, 1602, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2748 = VFNMS
4825 { 2747, 4, 1, 6, 707, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2747 = VFNMASB
4826 { 2746, 4, 1, 6, 705, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2746 = VFNMADB
4827 { 2745, 6, 1, 6, 704, 1, 0, 1602, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2745 = VFNMA
4828 { 2744, 4, 1, 6, 707, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2744 = VFMSSB
4829 { 2743, 4, 1, 6, 931, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2743 = VFMSDB
4830 { 2742, 3, 1, 6, 702, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2742 = VFMSB
4831 { 2741, 6, 1, 6, 930, 1, 0, 1602, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2741 = VFMS
4832 { 2740, 4, 1, 6, 687, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2740 = VFMINSB
4833 { 2739, 4, 1, 6, 685, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2739 = VFMINDB
4834 { 2738, 6, 1, 6, 684, 1, 0, 1596, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2738 = VFMIN
4835 { 2737, 3, 1, 6, 700, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2737 = VFMDB
4836 { 2736, 4, 1, 6, 687, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2736 = VFMAXSB
4837 { 2735, 4, 1, 6, 685, 1, 0, 1526, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2735 = VFMAXDB
4838 { 2734, 6, 1, 6, 684, 1, 0, 1596, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2734 = VFMAX
4839 { 2733, 4, 1, 6, 707, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2733 = VFMASB
4840 { 2732, 4, 1, 6, 931, 1, 0, 1538, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2732 = VFMADB
4841 { 2731, 6, 1, 6, 930, 1, 0, 1602, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2731 = VFMA
4842 { 2730, 5, 1, 6, 919, 1, 0, 453, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2730 = VFM
4843 { 2729, 4, 1, 6, 668, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2729 = VFLRD
4844 { 2728, 5, 1, 6, 667, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2728 = VFLR
4845 { 2727, 2, 1, 6, 682, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2727 = VFLPSB
4846 { 2726, 2, 1, 6, 681, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2726 = VFLPDB
4847 { 2725, 2, 1, 6, 682, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2725 = VFLNSB
4848 { 2724, 2, 1, 6, 681, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2724 = VFLNDB
4849 { 2723, 2, 1, 6, 668, 1, 0, 441, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2723 = VFLLS
4850 { 2722, 4, 1, 6, 667, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2722 = VFLL
4851 { 2721, 2, 1, 6, 682, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2721 = VFLCSB
4852 { 2720, 2, 1, 6, 681, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2720 = VFLCDB
4853 { 2719, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2719 = VFKHSBS
4854 { 2718, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2718 = VFKHSB
4855 { 2717, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2717 = VFKHESBS
4856 { 2716, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2716 = VFKHESB
4857 { 2715, 3, 1, 6, 730, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2715 = VFKHEDBS
4858 { 2714, 3, 1, 6, 721, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2714 = VFKHEDB
4859 { 2713, 3, 1, 6, 730, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2713 = VFKHDBS
4860 { 2712, 3, 1, 6, 721, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2712 = VFKHDB
4861 { 2711, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2711 = VFKESBS
4862 { 2710, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2710 = VFKESB
4863 { 2709, 3, 1, 6, 730, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2709 = VFKEDBS
4864 { 2708, 3, 1, 6, 721, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2708 = VFKEDB
4865 { 2707, 4, 1, 6, 674, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2707 = VFISB
4866 { 2706, 4, 1, 6, 672, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2706 = VFIDB
4867 { 2705, 5, 1, 6, 918, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2705 = VFI
4868 { 2704, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2704 = VFENEZHS
4869 { 2703, 3, 1, 6, 750, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2703 = VFENEZH
4870 { 2702, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2702 = VFENEZFS
4871 { 2701, 3, 1, 6, 750, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2701 = VFENEZF
4872 { 2700, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2700 = VFENEZBS
4873 { 2699, 3, 1, 6, 750, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2699 = VFENEZB
4874 { 2698, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2698 = VFENEHS
4875 { 2697, 4, 1, 6, 750, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2697 = VFENEH
4876 { 2696, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2696 = VFENEFS
4877 { 2695, 4, 1, 6, 750, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2695 = VFENEF
4878 { 2694, 3, 1, 6, 751, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2694 = VFENEBS
4879 { 2693, 4, 1, 6, 750, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2693 = VFENEB
4880 { 2692, 5, 1, 6, 750, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2692 = VFENE
4881 { 2691, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2691 = VFEEZHS
4882 { 2690, 3, 1, 6, 748, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2690 = VFEEZH
4883 { 2689, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2689 = VFEEZFS
4884 { 2688, 3, 1, 6, 748, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2688 = VFEEZF
4885 { 2687, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2687 = VFEEZBS
4886 { 2686, 3, 1, 6, 748, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2686 = VFEEZB
4887 { 2685, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2685 = VFEEHS
4888 { 2684, 4, 1, 6, 748, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2684 = VFEEH
4889 { 2683, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2683 = VFEEFS
4890 { 2682, 4, 1, 6, 748, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2682 = VFEEF
4891 { 2681, 3, 1, 6, 749, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2681 = VFEEBS
4892 { 2680, 4, 1, 6, 748, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2680 = VFEEB
4893 { 2679, 5, 1, 6, 748, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2679 = VFEE
4894 { 2678, 3, 1, 6, 713, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2678 = VFDSB
4895 { 2677, 3, 1, 6, 711, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2677 = VFDDB
4896 { 2676, 5, 1, 6, 710, 1, 0, 453, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2676 = VFD
4897 { 2675, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2675 = VFCHSBS
4898 { 2674, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2674 = VFCHSB
4899 { 2673, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2673 = VFCHESBS
4900 { 2672, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2672 = VFCHESB
4901 { 2671, 3, 1, 6, 729, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2671 = VFCHEDBS
4902 { 2670, 3, 1, 6, 933, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2670 = VFCHEDB
4903 { 2669, 6, 1, 6, 720, 1, 0, 1596, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2669 = VFCHE
4904 { 2668, 3, 1, 6, 729, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2668 = VFCHDBS
4905 { 2667, 3, 1, 6, 933, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2667 = VFCHDB
4906 { 2666, 6, 1, 6, 720, 1, 0, 1596, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2666 = VFCH
4907 { 2665, 3, 1, 6, 732, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2665 = VFCESBS
4908 { 2664, 3, 1, 6, 724, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2664 = VFCESB
4909 { 2663, 3, 1, 6, 729, 1, 1, 1530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2663 = VFCEDBS
4910 { 2662, 3, 1, 6, 933, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2662 = VFCEDB
4911 { 2661, 6, 1, 6, 720, 1, 0, 1596, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2661 = VFCE
4912 { 2660, 3, 1, 6, 697, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2660 = VFASB
4913 { 2659, 4, 1, 6, 747, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2659 = VFAEZHS
4914 { 2658, 4, 1, 6, 746, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2658 = VFAEZH
4915 { 2657, 4, 1, 6, 747, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2657 = VFAEZFS
4916 { 2656, 4, 1, 6, 746, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2656 = VFAEZF
4917 { 2655, 4, 1, 6, 747, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2655 = VFAEZBS
4918 { 2654, 4, 1, 6, 746, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2654 = VFAEZB
4919 { 2653, 4, 1, 6, 745, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2653 = VFAEHS
4920 { 2652, 4, 1, 6, 744, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2652 = VFAEH
4921 { 2651, 4, 1, 6, 745, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2651 = VFAEFS
4922 { 2650, 4, 1, 6, 744, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2650 = VFAEF
4923 { 2649, 4, 1, 6, 745, 0, 1, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2649 = VFAEBS
4924 { 2648, 4, 1, 6, 743, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2648 = VFAEB
4925 { 2647, 5, 1, 6, 743, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2647 = VFAE
4926 { 2646, 3, 1, 6, 695, 1, 0, 1530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2646 = VFADB
4927 { 2645, 5, 1, 6, 694, 1, 0, 453, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2645 = VFA
4928 { 2644, 5, 1, 6, 594, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2644 = VEVAL
4929 { 2643, 3, 1, 6, 630, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2643 = VESRLVH
4930 { 2642, 3, 1, 6, 630, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2642 = VESRLVG
4931 { 2641, 3, 1, 6, 630, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2641 = VESRLVF
4932 { 2640, 3, 1, 6, 630, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2640 = VESRLVB
4933 { 2639, 4, 1, 6, 630, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2639 = VESRLV
4934 { 2638, 4, 1, 6, 629, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2638 = VESRLH
4935 { 2637, 4, 1, 6, 629, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2637 = VESRLG
4936 { 2636, 4, 1, 6, 629, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2636 = VESRLF
4937 { 2635, 4, 1, 6, 629, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2635 = VESRLB
4938 { 2634, 5, 1, 6, 629, 0, 0, 1587, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2634 = VESRL
4939 { 2633, 3, 1, 6, 628, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2633 = VESRAVH
4940 { 2632, 3, 1, 6, 628, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2632 = VESRAVG
4941 { 2631, 3, 1, 6, 628, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2631 = VESRAVF
4942 { 2630, 3, 1, 6, 628, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2630 = VESRAVB
4943 { 2629, 4, 1, 6, 628, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2629 = VESRAV
4944 { 2628, 4, 1, 6, 627, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2628 = VESRAH
4945 { 2627, 4, 1, 6, 627, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2627 = VESRAG
4946 { 2626, 4, 1, 6, 627, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2626 = VESRAF
4947 { 2625, 4, 1, 6, 627, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2625 = VESRAB
4948 { 2624, 5, 1, 6, 627, 0, 0, 1587, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2624 = VESRA
4949 { 2623, 3, 1, 6, 626, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2623 = VESLVH
4950 { 2622, 3, 1, 6, 626, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2622 = VESLVG
4951 { 2621, 3, 1, 6, 626, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2621 = VESLVF
4952 { 2620, 3, 1, 6, 626, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2620 = VESLVB
4953 { 2619, 4, 1, 6, 626, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2619 = VESLV
4954 { 2618, 4, 1, 6, 625, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2618 = VESLH
4955 { 2617, 4, 1, 6, 625, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2617 = VESLG
4956 { 2616, 4, 1, 6, 625, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2616 = VESLF
4957 { 2615, 4, 1, 6, 625, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2615 = VESLB
4958 { 2614, 5, 1, 6, 625, 0, 0, 1587, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2614 = VESL
4959 { 2613, 3, 1, 6, 623, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2613 = VERLLVH
4960 { 2612, 3, 1, 6, 623, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2612 = VERLLVG
4961 { 2611, 3, 1, 6, 623, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2611 = VERLLVF
4962 { 2610, 3, 1, 6, 623, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2610 = VERLLVB
4963 { 2609, 4, 1, 6, 623, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2609 = VERLLV
4964 { 2608, 4, 1, 6, 622, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2608 = VERLLH
4965 { 2607, 4, 1, 6, 622, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2607 = VERLLG
4966 { 2606, 4, 1, 6, 622, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2606 = VERLLF
4967 { 2605, 4, 1, 6, 622, 0, 0, 1592, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2605 = VERLLB
4968 { 2604, 5, 1, 6, 622, 0, 0, 1587, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2604 = VERLL
4969 { 2603, 5, 1, 6, 624, 0, 0, 1582, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2603 = VERIMH
4970 { 2602, 5, 1, 6, 624, 0, 0, 1582, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2602 = VERIMG
4971 { 2601, 5, 1, 6, 624, 0, 0, 1582, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2601 = VERIMF
4972 { 2600, 5, 1, 6, 624, 0, 0, 1582, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2600 = VERIMB
4973 { 2599, 6, 1, 6, 624, 0, 0, 1576, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2599 = VERIM
4974 { 2598, 2, 0, 6, 643, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2598 = VECQ
4975 { 2597, 2, 0, 6, 644, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2597 = VECLQ
4976 { 2596, 2, 0, 6, 904, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2596 = VECLH
4977 { 2595, 2, 0, 6, 904, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2595 = VECLG
4978 { 2594, 2, 0, 6, 904, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2594 = VECLF
4979 { 2593, 2, 0, 6, 904, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2593 = VECLB
4980 { 2592, 3, 0, 6, 904, 0, 1, 1551, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2592 = VECL
4981 { 2591, 2, 0, 6, 903, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2591 = VECH
4982 { 2590, 2, 0, 6, 903, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2590 = VECG
4983 { 2589, 2, 0, 6, 903, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2589 = VECF
4984 { 2588, 2, 0, 6, 903, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2588 = VECB
4985 { 2587, 3, 0, 6, 903, 0, 1, 1551, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2587 = VEC
4986 { 2586, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2586 = VDQ
4987 { 2585, 5, 1, 6, 770, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2585 = VDP
4988 { 2584, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2584 = VDLQ
4989 { 2583, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2583 = VDLG
4990 { 2582, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2582 = VDLF
4991 { 2581, 5, 1, 6, 593, 0, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2581 = VDL
4992 { 2580, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2580 = VDG
4993 { 2579, 4, 1, 6, 593, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2579 = VDF
4994 { 2578, 5, 1, 6, 593, 0, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2578 = VD
4995 { 2577, 4, 1, 6, 767, 0, 1, 1547, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2577 = VCVDQ
4996 { 2576, 4, 1, 6, 912, 0, 1, 1572, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2576 = VCVDG
4997 { 2575, 4, 1, 6, 912, 0, 1, 1568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2575 = VCVD
4998 { 2574, 3, 1, 6, 766, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2574 = VCVBQ
4999 { 2573, 4, 1, 6, 911, 0, 1, 1564, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2573 = VCVBOpt
5000 { 2572, 4, 1, 6, 911, 0, 1, 1560, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2572 = VCVBGOpt
5001 { 2571, 3, 1, 6, 920, 0, 1, 1557, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2571 = VCVBG
5002 { 2570, 3, 1, 6, 920, 0, 1, 1554, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2570 = VCVB
5003 { 2569, 2, 1, 6, 592, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2569 = VCTZQ
5004 { 2568, 2, 1, 6, 882, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2568 = VCTZH
5005 { 2567, 2, 1, 6, 882, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2567 = VCTZG
5006 { 2566, 2, 1, 6, 882, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2566 = VCTZF
5007 { 2565, 2, 1, 6, 882, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2565 = VCTZB
5008 { 2564, 3, 1, 6, 882, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2564 = VCTZ
5009 { 2563, 4, 1, 6, 777, 0, 0, 1526, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2563 = VCSPH
5010 { 2562, 5, 1, 6, 658, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2562 = VCSFP
5011 { 2561, 5, 1, 6, 762, 1, 0, 453, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2561 = VCRNF
5012 { 2560, 3, 0, 6, 914, 0, 1, 1551, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2560 = VCP
5013 { 2559, 4, 1, 6, 762, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2559 = VCNF
5014 { 2558, 2, 1, 6, 591, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2558 = VCLZQ
5015 { 2557, 2, 1, 6, 881, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2557 = VCLZH
5016 { 2556, 2, 1, 6, 881, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2556 = VCLZG
5017 { 2555, 2, 1, 6, 881, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2555 = VCLZF
5018 { 2554, 3, 1, 6, 778, 0, 1, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2554 = VCLZDP
5019 { 2553, 2, 1, 6, 881, 0, 0, 441, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2553 = VCLZB
5020 { 2552, 3, 1, 6, 881, 0, 0, 1551, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2552 = VCLZ
5021 { 2551, 4, 1, 6, 660, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2551 = VCLGDB
5022 { 2550, 5, 1, 6, 659, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2550 = VCLGD
5023 { 2549, 5, 1, 6, 658, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2549 = VCLFP
5024 { 2548, 4, 1, 6, 761, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2548 = VCLFNL
5025 { 2547, 4, 1, 6, 761, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2547 = VCLFNH
5026 { 2546, 4, 1, 6, 662, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2546 = VCLFEB
5027 { 2545, 3, 1, 6, 590, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2545 = VCKSM
5028 { 2544, 3, 1, 6, 648, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2544 = VCHQS
5029 { 2543, 3, 1, 6, 647, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2543 = VCHQ
5030 { 2542, 3, 1, 6, 650, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2542 = VCHLQS
5031 { 2541, 3, 1, 6, 649, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2541 = VCHLQ
5032 { 2540, 3, 1, 6, 910, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2540 = VCHLHS
5033 { 2539, 3, 1, 6, 909, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2539 = VCHLH
5034 { 2538, 3, 1, 6, 910, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2538 = VCHLGS
5035 { 2537, 3, 1, 6, 909, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2537 = VCHLG
5036 { 2536, 3, 1, 6, 910, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2536 = VCHLFS
5037 { 2535, 3, 1, 6, 909, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2535 = VCHLF
5038 { 2534, 3, 1, 6, 910, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2534 = VCHLBS
5039 { 2533, 3, 1, 6, 909, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2533 = VCHLB
5040 { 2532, 5, 1, 6, 909, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2532 = VCHL
5041 { 2531, 3, 1, 6, 908, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2531 = VCHHS
5042 { 2530, 3, 1, 6, 907, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2530 = VCHH
5043 { 2529, 3, 1, 6, 908, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2529 = VCHGS
5044 { 2528, 3, 1, 6, 907, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2528 = VCHG
5045 { 2527, 3, 1, 6, 908, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2527 = VCHFS
5046 { 2526, 3, 1, 6, 907, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2526 = VCHF
5047 { 2525, 3, 1, 6, 908, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2525 = VCHBS
5048 { 2524, 3, 1, 6, 907, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2524 = VCHB
5049 { 2523, 5, 1, 6, 907, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2523 = VCH
5050 { 2522, 4, 1, 6, 660, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2522 = VCGDB
5051 { 2521, 5, 1, 6, 659, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2521 = VCGD
5052 { 2520, 5, 1, 6, 652, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2520 = VCFPS
5053 { 2519, 5, 1, 6, 652, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2519 = VCFPL
5054 { 2518, 4, 1, 6, 760, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2518 = VCFN
5055 { 2517, 4, 1, 6, 662, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2517 = VCFEB
5056 { 2516, 3, 1, 6, 646, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2516 = VCEQQS
5057 { 2515, 3, 1, 6, 645, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2515 = VCEQQ
5058 { 2514, 3, 1, 6, 906, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2514 = VCEQHS
5059 { 2513, 3, 1, 6, 905, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2513 = VCEQH
5060 { 2512, 3, 1, 6, 906, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2512 = VCEQGS
5061 { 2511, 3, 1, 6, 905, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2511 = VCEQG
5062 { 2510, 3, 1, 6, 906, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2510 = VCEQFS
5063 { 2509, 3, 1, 6, 905, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2509 = VCEQF
5064 { 2508, 3, 1, 6, 906, 0, 1, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2508 = VCEQBS
5065 { 2507, 3, 1, 6, 905, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2507 = VCEQB
5066 { 2506, 5, 1, 6, 905, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2506 = VCEQ
5067 { 2505, 4, 1, 6, 656, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2505 = VCELFB
5068 { 2504, 4, 1, 6, 656, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2504 = VCEFB
5069 { 2503, 4, 1, 6, 654, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2503 = VCDLGB
5070 { 2502, 5, 1, 6, 653, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2502 = VCDLG
5071 { 2501, 4, 1, 6, 654, 1, 0, 1547, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2501 = VCDGB
5072 { 2500, 5, 1, 6, 653, 1, 0, 1542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2500 = VCDG
5073 { 2499, 3, 1, 6, 569, 0, 0, 1530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2499 = VBPERM
5074 { 2498, 4, 1, 6, 572, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2498 = VBLENDQ
5075 { 2497, 4, 1, 6, 572, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2497 = VBLENDH
5076 { 2496, 4, 1, 6, 572, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2496 = VBLENDG
5077 { 2495, 4, 1, 6, 572, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2495 = VBLENDF
5078 { 2494, 4, 1, 6, 572, 0, 0, 1538, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2494 = VBLENDB
5079 { 2493, 5, 1, 6, 572, 0, 0, 1533, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2493 = VBLEND
5080 { 2492, 3, 1, 6, 586, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2492 = VAVGQ
5081 { 2491, 3, 1, 6, 587, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2491 = VAVGLQ
5082 { 2490, 3, 1, 6, 880, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2490 = VAVGLH
5083 { 2489, 3, 1, 6, 880, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2489 = VAVGLG
5084 { 2488, 3, 1, 6, 880, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2488 = VAVGLF
5085 { 2487, 3, 1, 6, 880, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2487 = VAVGLB
5086 { 2486, 4, 1, 6, 880, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2486 = VAVGL
5087 { 2485, 3, 1, 6, 879, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2485 = VAVGH
5088 { 2484, 3, 1, 6, 879, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2484 = VAVGG
5089 { 2483, 3, 1, 6, 879, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2483 = VAVGF
5090 { 2482, 3, 1, 6, 879, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2482 = VAVGB
5091 { 2481, 4, 1, 6, 879, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2481 = VAVG
5092 { 2480, 3, 1, 6, 584, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2480 = VAQ
5093 { 2479, 5, 1, 6, 768, 0, 1, 453, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2479 = VAP
5094 { 2478, 3, 1, 6, 584, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2478 = VAH
5095 { 2477, 3, 1, 6, 584, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2477 = VAG
5096 { 2476, 3, 1, 6, 584, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2476 = VAF
5097 { 2475, 4, 1, 6, 584, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2475 = VACQ
5098 { 2474, 3, 1, 6, 585, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2474 = VACCQ
5099 { 2473, 3, 1, 6, 585, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2473 = VACCH
5100 { 2472, 3, 1, 6, 585, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2472 = VACCG
5101 { 2471, 3, 1, 6, 585, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2471 = VACCF
5102 { 2470, 4, 1, 6, 585, 0, 0, 1538, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2470 = VACCCQ
5103 { 2469, 5, 1, 6, 585, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2469 = VACCC
5104 { 2468, 3, 1, 6, 585, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2468 = VACCB
5105 { 2467, 4, 1, 6, 585, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2467 = VACC
5106 { 2466, 5, 1, 6, 584, 0, 0, 1533, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2466 = VAC
5107 { 2465, 3, 1, 6, 584, 0, 0, 1530, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2465 = VAB
5108 { 2464, 4, 1, 6, 584, 0, 0, 1526, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2464 = VA
5109 { 2463, 0, 0, 2, 339, 6, 6, 1, SystemZImpOpBase + 92, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2463 = UPT
5110 { 2462, 5, 0, 6, 306, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2462 = UNPKU
5111 { 2461, 5, 0, 6, 306, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2461 = UNPKA
5112 { 2460, 6, 0, 6, 307, 0, 0, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2460 = UNPK
5113 { 2459, 2, 0, 4, 866, 1, 1, 715, SystemZImpOpBase + 41, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2459 = TSCH
5114 { 2458, 2, 0, 4, 275, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #2458 = TS
5115 { 2457, 4, 2, 4, 291, 2, 1, 1510, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2457 = TRTTOpt
5116 { 2456, 5, 2, 4, 291, 2, 1, 1514, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2456 = TRTT
5117 { 2455, 3, 2, 4, 290, 1, 1, 1523, SystemZImpOpBase + 90, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2455 = TRTREOpt
5118 { 2454, 4, 2, 4, 290, 1, 1, 1519, SystemZImpOpBase + 90, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2454 = TRTRE
5119 { 2453, 5, 0, 6, 288, 0, 3, 829, SystemZImpOpBase + 87, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2453 = TRTR
5120 { 2452, 4, 2, 4, 291, 2, 1, 1510, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2452 = TRTOOpt
5121 { 2451, 5, 2, 4, 291, 2, 1, 1514, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2451 = TRTO
5122 { 2450, 3, 2, 4, 290, 1, 1, 1523, SystemZImpOpBase + 90, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2450 = TRTEOpt
5123 { 2449, 4, 2, 4, 290, 1, 1, 1519, SystemZImpOpBase + 90, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2449 = TRTE
5124 { 2448, 5, 0, 6, 287, 0, 3, 829, SystemZImpOpBase + 87, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2448 = TRT
5125 { 2447, 4, 2, 4, 291, 2, 1, 1510, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2447 = TROTOpt
5126 { 2446, 5, 2, 4, 291, 2, 1, 1514, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2446 = TROT
5127 { 2445, 4, 2, 4, 291, 2, 1, 1510, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2445 = TROOOpt
5128 { 2444, 5, 2, 4, 291, 2, 1, 1514, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2444 = TROO
5129 { 2443, 4, 2, 4, 289, 1, 0, 1510, SystemZImpOpBase + 55, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2443 = TRE
5130 { 2442, 2, 0, 4, 855, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2442 = TRAP4
5131 { 2441, 0, 0, 2, 855, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2441 = TRAP2
5132 { 2440, 4, 0, 6, 854, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2440 = TRACG
5133 { 2439, 4, 0, 4, 853, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2439 = TRACE
5134 { 2438, 5, 0, 6, 286, 0, 0, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2438 = TR
5135 { 2437, 4, 0, 6, 818, 0, 1, 1176, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2437 = TPROT
5136 { 2436, 2, 0, 4, 935, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2436 = TPI
5137 { 2435, 2, 1, 4, 870, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2435 = TPEI
5138 { 2434, 3, 0, 6, 313, 0, 1, 1507, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2434 = TP
5139 { 2433, 3, 0, 6, 258, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #2433 = TMY
5140 { 2432, 2, 0, 4, 263, 0, 1, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2432 = TMLL
5141 { 2431, 2, 0, 4, 262, 0, 1, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2431 = TMLH
5142 { 2430, 2, 0, 4, 261, 0, 1, 816, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2430 = TMHL
5143 { 2429, 2, 0, 4, 260, 0, 1, 816, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2429 = TMHH
5144 { 2428, 3, 0, 4, 258, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2428 = TM
5145 { 2427, 2, 1, 4, 432, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2427 = THDR
5146 { 2426, 2, 1, 4, 432, 0, 1, 1191, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2426 = THDER
5147 { 2425, 0, 0, 4, 327, 0, 1, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2425 = TEND
5148 { 2424, 4, 0, 6, 530, 0, 1, 353, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2424 = TDGXT
5149 { 2423, 4, 0, 6, 529, 0, 1, 695, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2423 = TDGET
5150 { 2422, 4, 0, 6, 947, 0, 1, 667, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2422 = TDGDT
5151 { 2421, 4, 0, 6, 530, 0, 1, 353, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2421 = TDCXT
5152 { 2420, 4, 0, 6, 529, 0, 1, 695, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2420 = TDCET
5153 { 2419, 4, 0, 6, 947, 0, 1, 667, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2419 = TDCDT
5154 { 2418, 4, 0, 6, 411, 0, 1, 353, SystemZImpOpBase + 0, 0, 0x3008ULL }, // Inst #2418 = TCXB
5155 { 2417, 4, 0, 6, 410, 0, 1, 695, SystemZImpOpBase + 0, 0, 0x3008ULL }, // Inst #2417 = TCEB
5156 { 2416, 4, 0, 6, 410, 0, 1, 667, SystemZImpOpBase + 0, 0, 0x3008ULL }, // Inst #2416 = TCDB
5157 { 2415, 3, 0, 6, 326, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2415 = TBEGINC
5158 { 2414, 3, 0, 6, 326, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2414 = TBEGIN
5159 { 2413, 3, 1, 4, 433, 0, 1, 1504, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2413 = TBEDR
5160 { 2412, 3, 1, 4, 433, 0, 1, 1003, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2412 = TBDR
5161 { 2411, 2, 0, 4, 804, 1, 2, 593, SystemZImpOpBase + 70, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2411 = TB
5162 { 2410, 2, 0, 4, 830, 0, 1, 1443, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2410 = TAR
5163 { 2409, 0, 0, 2, 322, 0, 1, 1, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2409 = TAM
5164 { 2408, 2, 0, 4, 328, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2408 = TABORT
5165 { 2407, 5, 1, 6, 130, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2407 = SY
5166 { 2406, 4, 1, 4, 512, 1, 1, 586, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #2406 = SXTRA
5167 { 2405, 3, 1, 4, 512, 1, 1, 583, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #2405 = SXTR
5168 { 2404, 3, 1, 2, 448, 0, 1, 580, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2404 = SXR
5169 { 2403, 3, 1, 4, 391, 1, 1, 580, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2403 = SXBR
5170 { 2402, 3, 1, 2, 447, 0, 1, 527, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2402 = SWR
5171 { 2401, 5, 1, 4, 446, 0, 1, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2401 = SW
5172 { 2400, 1, 0, 2, 850, 0, 1, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2400 = SVC
5173 { 2399, 3, 1, 2, 447, 0, 1, 542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2399 = SUR
5174 { 2398, 5, 1, 4, 446, 0, 1, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2398 = SU
5175 { 2397, 4, 0, 6, 48, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2397 = STY
5176 { 2396, 2, 0, 4, 817, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2396 = STURG
5177 { 2395, 2, 0, 4, 817, 0, 0, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2395 = STURA
5178 { 2394, 2, 0, 4, 843, 2, 2, 715, SystemZImpOpBase + 83, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2394 = STSI
5179 { 2393, 2, 0, 4, 866, 1, 1, 715, SystemZImpOpBase + 41, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2393 = STSCH
5180 { 2392, 4, 0, 6, 84, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2392 = STRVH
5181 { 2391, 4, 0, 6, 84, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #2391 = STRVG
5182 { 2390, 4, 0, 6, 84, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #2390 = STRV
5183 { 2389, 2, 0, 6, 48, 0, 0, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2389 = STRL
5184 { 2388, 4, 0, 6, 815, 0, 0, 1176, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2388 = STRAG
5185 { 2387, 2, 0, 4, 795, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2387 = STPX
5186 { 2386, 2, 0, 4, 840, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2386 = STPT
5187 { 2385, 4, 0, 6, 282, 0, 0, 308, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x20cULL }, // Inst #2385 = STPQ
5188 { 2384, 3, 0, 4, 787, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2384 = STOSM
5189 { 2383, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2383 = STOCGAsmZ
5190 { 2382, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2382 = STOCGAsmP
5191 { 2381, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2381 = STOCGAsmO
5192 { 2380, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2380 = STOCGAsmNZ
5193 { 2379, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2379 = STOCGAsmNP
5194 { 2378, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2378 = STOCGAsmNO
5195 { 2377, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2377 = STOCGAsmNM
5196 { 2376, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2376 = STOCGAsmNLH
5197 { 2375, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2375 = STOCGAsmNLE
5198 { 2374, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2374 = STOCGAsmNL
5199 { 2373, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2373 = STOCGAsmNHE
5200 { 2372, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2372 = STOCGAsmNH
5201 { 2371, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2371 = STOCGAsmNE
5202 { 2370, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2370 = STOCGAsmM
5203 { 2369, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2369 = STOCGAsmLH
5204 { 2368, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2368 = STOCGAsmLE
5205 { 2367, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2367 = STOCGAsmL
5206 { 2366, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2366 = STOCGAsmHE
5207 { 2365, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2365 = STOCGAsmH
5208 { 2364, 3, 0, 6, 938, 1, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2364 = STOCGAsmE
5209 { 2363, 4, 0, 6, 938, 1, 0, 844, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2363 = STOCGAsm
5210 { 2362, 5, 0, 6, 938, 1, 0, 1499, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80104ULL }, // Inst #2362 = STOCG
5211 { 2361, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2361 = STOCFHAsmZ
5212 { 2360, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2360 = STOCFHAsmP
5213 { 2359, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2359 = STOCFHAsmO
5214 { 2358, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2358 = STOCFHAsmNZ
5215 { 2357, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2357 = STOCFHAsmNP
5216 { 2356, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2356 = STOCFHAsmNO
5217 { 2355, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2355 = STOCFHAsmNM
5218 { 2354, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2354 = STOCFHAsmNLH
5219 { 2353, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2353 = STOCFHAsmNLE
5220 { 2352, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2352 = STOCFHAsmNL
5221 { 2351, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2351 = STOCFHAsmNHE
5222 { 2350, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2350 = STOCFHAsmNH
5223 { 2349, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2349 = STOCFHAsmNE
5224 { 2348, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2348 = STOCFHAsmM
5225 { 2347, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2347 = STOCFHAsmLH
5226 { 2346, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2346 = STOCFHAsmLE
5227 { 2345, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2345 = STOCFHAsmL
5228 { 2344, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2344 = STOCFHAsmHE
5229 { 2343, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2343 = STOCFHAsmH
5230 { 2342, 3, 0, 6, 54, 1, 0, 1496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2342 = STOCFHAsmE
5231 { 2341, 4, 0, 6, 54, 1, 0, 1492, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2341 = STOCFHAsm
5232 { 2340, 5, 0, 6, 54, 1, 0, 1487, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2340 = STOCFH
5233 { 2339, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2339 = STOCAsmZ
5234 { 2338, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2338 = STOCAsmP
5235 { 2337, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2337 = STOCAsmO
5236 { 2336, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2336 = STOCAsmNZ
5237 { 2335, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2335 = STOCAsmNP
5238 { 2334, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2334 = STOCAsmNO
5239 { 2333, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2333 = STOCAsmNM
5240 { 2332, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2332 = STOCAsmNLH
5241 { 2331, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2331 = STOCAsmNLE
5242 { 2330, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2330 = STOCAsmNL
5243 { 2329, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2329 = STOCAsmNHE
5244 { 2328, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2328 = STOCAsmNH
5245 { 2327, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2327 = STOCAsmNE
5246 { 2326, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2326 = STOCAsmM
5247 { 2325, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2325 = STOCAsmLH
5248 { 2324, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2324 = STOCAsmLE
5249 { 2323, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2323 = STOCAsmL
5250 { 2322, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2322 = STOCAsmHE
5251 { 2321, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2321 = STOCAsmH
5252 { 2320, 3, 0, 6, 938, 1, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2320 = STOCAsmE
5253 { 2319, 4, 0, 6, 938, 1, 0, 877, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2319 = STOCAsm
5254 { 2318, 5, 0, 6, 938, 1, 0, 1482, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2318 = STOC
5255 { 2317, 3, 0, 4, 787, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2317 = STNSM
5256 { 2316, 4, 0, 6, 81, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2316 = STMY
5257 { 2315, 4, 0, 6, 81, 0, 0, 1220, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2315 = STMH
5258 { 2314, 4, 0, 6, 81, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2314 = STMG
5259 { 2313, 4, 0, 4, 81, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2313 = STM
5260 { 2312, 2, 0, 4, 842, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2312 = STIDP
5261 { 2311, 4, 0, 6, 77, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2311 = STHY
5262 { 2310, 2, 0, 6, 77, 0, 0, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2310 = STHRL
5263 { 2309, 4, 0, 6, 77, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2309 = STHH
5264 { 2308, 4, 0, 4, 77, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x48ULL }, // Inst #2308 = STH
5265 { 2307, 4, 0, 6, 299, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #2307 = STGSC
5266 { 2306, 2, 0, 6, 46, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2306 = STGRL
5267 { 2305, 4, 0, 6, 46, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2305 = STG
5268 { 2304, 2, 0, 4, 413, 1, 0, 715, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2304 = STFPC
5269 { 2303, 2, 0, 4, 844, 1, 2, 715, SystemZImpOpBase + 70, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2303 = STFLE
5270 { 2302, 2, 0, 4, 844, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2302 = STFL
5271 { 2301, 4, 0, 6, 48, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2301 = STFH
5272 { 2300, 4, 0, 6, 359, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2300 = STEY
5273 { 2299, 4, 0, 6, 359, 0, 0, 1198, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2299 = STE16Y
5274 { 2298, 4, 0, 4, 359, 0, 0, 1198, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2298 = STE16
5275 { 2297, 4, 0, 4, 359, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2297 = STE
5276 { 2296, 4, 0, 6, 359, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2296 = STDY
5277 { 2295, 4, 0, 4, 359, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10aULL }, // Inst #2295 = STD
5278 { 2294, 4, 0, 6, 76, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2294 = STCY
5279 { 2293, 4, 0, 4, 791, 0, 0, 1187, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2293 = STCTL
5280 { 2292, 4, 0, 6, 791, 0, 0, 1187, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2292 = STCTG
5281 { 2291, 2, 0, 4, 869, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2291 = STCRW
5282 { 2290, 2, 0, 4, 869, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2290 = STCPS
5283 { 2289, 4, 0, 6, 78, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2289 = STCMY
5284 { 2288, 4, 0, 6, 78, 0, 0, 851, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2288 = STCMH
5285 { 2287, 4, 0, 4, 78, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2287 = STCM
5286 { 2286, 2, 0, 4, 837, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2286 = STCKF
5287 { 2285, 2, 0, 4, 838, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #2285 = STCKE
5288 { 2284, 2, 0, 4, 839, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2284 = STCKC
5289 { 2283, 2, 0, 4, 837, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2283 = STCK
5290 { 2282, 4, 0, 6, 76, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2282 = STCH
5291 { 2281, 4, 0, 4, 76, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x28ULL }, // Inst #2281 = STC
5292 { 2280, 2, 0, 4, 797, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2280 = STBEAR
5293 { 2279, 2, 0, 4, 841, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2279 = STAP
5294 { 2278, 4, 0, 6, 318, 0, 0, 1172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2278 = STAMY
5295 { 2277, 4, 0, 4, 318, 0, 0, 1172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2277 = STAM
5296 { 2276, 4, 0, 4, 48, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2276 = ST
5297 { 2275, 2, 0, 4, 786, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20ULL }, // Inst #2275 = SSM
5298 { 2274, 2, 0, 4, 800, 0, 1, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2274 = SSKEOpt
5299 { 2273, 3, 0, 4, 800, 0, 1, 1479, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2273 = SSKE
5300 { 2272, 2, 0, 4, 866, 1, 1, 715, SystemZImpOpBase + 41, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2272 = SSCH
5301 { 2271, 1, 0, 4, 793, 0, 0, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2271 = SSAR
5302 { 2270, 1, 0, 4, 793, 0, 0, 304, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2270 = SSAIR
5303 { 2269, 5, 1, 6, 522, 0, 0, 1466, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2269 = SRXT
5304 { 2268, 4, 2, 4, 336, 1, 1, 873, SystemZImpOpBase + 35, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2268 = SRSTU
5305 { 2267, 4, 2, 4, 336, 1, 1, 873, SystemZImpOpBase + 35, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2267 = SRST
5306 { 2266, 6, 0, 6, 311, 0, 1, 1473, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2266 = SRP
5307 { 2265, 2, 0, 4, 418, 1, 1, 1471, SystemZImpOpBase + 81, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2265 = SRNMT
5308 { 2264, 2, 0, 4, 418, 1, 1, 1471, SystemZImpOpBase + 81, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2264 = SRNMB
5309 { 2263, 2, 0, 4, 418, 1, 1, 1471, SystemZImpOpBase + 81, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2263 = SRNM
5310 { 2262, 4, 1, 6, 210, 0, 0, 1429, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2262 = SRLK
5311 { 2261, 4, 1, 6, 210, 0, 0, 984, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2261 = SRLG
5312 { 2260, 4, 1, 4, 210, 0, 0, 1458, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2260 = SRL
5313 { 2259, 3, 1, 4, 138, 0, 1, 571, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2259 = SRK
5314 { 2258, 5, 1, 6, 521, 0, 0, 156, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2258 = SRDT
5315 { 2257, 4, 1, 4, 213, 0, 0, 1462, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2257 = SRDL
5316 { 2256, 4, 1, 4, 213, 0, 1, 1462, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2256 = SRDA
5317 { 2255, 4, 1, 6, 211, 0, 1, 1429, SystemZImpOpBase + 0, 0, 0x3b804ULL }, // Inst #2255 = SRAK
5318 { 2254, 4, 1, 6, 211, 0, 1, 984, SystemZImpOpBase + 0, 0, 0x3b804ULL }, // Inst #2254 = SRAG
5319 { 2253, 4, 1, 4, 211, 0, 1, 1458, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2253 = SRA
5320 { 2252, 3, 1, 2, 138, 0, 1, 568, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2252 = SR
5321 { 2251, 2, 1, 4, 440, 0, 0, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2251 = SQXR
5322 { 2250, 2, 1, 4, 383, 1, 0, 713, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2250 = SQXBR
5323 { 2249, 2, 1, 4, 438, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2249 = SQER
5324 { 2248, 2, 1, 4, 381, 1, 0, 699, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2248 = SQEBR
5325 { 2247, 4, 1, 6, 380, 1, 0, 695, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #2247 = SQEB
5326 { 2246, 4, 1, 6, 437, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2246 = SQE
5327 { 2245, 2, 1, 4, 439, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2245 = SQDR
5328 { 2244, 2, 1, 4, 382, 1, 0, 671, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2244 = SQDBR
5329 { 2243, 4, 1, 6, 380, 1, 0, 667, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #2243 = SQDB
5330 { 2242, 4, 1, 6, 437, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2242 = SQD
5331 { 2241, 2, 0, 4, 795, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2241 = SPX
5332 { 2240, 2, 0, 4, 836, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2240 = SPT
5333 { 2239, 1, 0, 2, 320, 0, 1, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2239 = SPM
5334 { 2238, 2, 0, 4, 785, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2238 = SPKA
5335 { 2237, 2, 0, 4, 864, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2237 = SPCTR
5336 { 2236, 6, 0, 6, 308, 0, 1, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2236 = SP
5337 { 2235, 4, 2, 4, 342, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2235 = SORTL
5338 { 2234, 5, 1, 6, 134, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2234 = SLY
5339 { 2233, 5, 1, 6, 522, 0, 0, 1466, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2233 = SLXT
5340 { 2232, 3, 1, 4, 137, 0, 1, 571, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2232 = SLRK
5341 { 2231, 3, 1, 2, 137, 0, 1, 568, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2231 = SLR
5342 { 2230, 4, 1, 6, 209, 0, 0, 1429, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2230 = SLLK
5343 { 2229, 4, 1, 6, 209, 0, 0, 984, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2229 = SLLG
5344 { 2228, 4, 1, 4, 209, 0, 0, 1458, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2228 = SLL
5345 { 2227, 3, 1, 4, 140, 0, 1, 562, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2227 = SLHHLR
5346 { 2226, 3, 1, 4, 139, 0, 1, 559, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2226 = SLHHHR
5347 { 2225, 3, 1, 4, 136, 0, 1, 388, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2225 = SLGRK
5348 { 2224, 3, 1, 4, 136, 0, 1, 556, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2224 = SLGR
5349 { 2223, 3, 1, 4, 135, 0, 1, 553, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2223 = SLGFR
5350 { 2222, 3, 1, 6, 135, 0, 1, 305, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2222 = SLGFI
5351 { 2221, 5, 1, 6, 134, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2221 = SLGF
5352 { 2220, 5, 1, 6, 134, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #2220 = SLG
5353 { 2219, 3, 1, 6, 133, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x101c00ULL }, // Inst #2219 = SLFI
5354 { 2218, 5, 1, 6, 521, 0, 0, 156, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2218 = SLDT
5355 { 2217, 4, 1, 4, 213, 0, 0, 1462, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2217 = SLDL
5356 { 2216, 4, 1, 4, 213, 0, 1, 1462, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2216 = SLDA
5357 { 2215, 3, 1, 4, 142, 1, 1, 568, SystemZImpOpBase + 26, 0, 0x103c00ULL }, // Inst #2215 = SLBR
5358 { 2214, 3, 1, 4, 142, 1, 1, 556, SystemZImpOpBase + 26, 0, 0x103c00ULL }, // Inst #2214 = SLBGR
5359 { 2213, 5, 1, 6, 141, 1, 1, 548, SystemZImpOpBase + 26, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #2213 = SLBG
5360 { 2212, 5, 1, 6, 141, 1, 1, 517, SystemZImpOpBase + 26, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #2212 = SLB
5361 { 2211, 4, 1, 6, 212, 0, 1, 1429, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2211 = SLAK
5362 { 2210, 4, 1, 6, 212, 0, 1, 984, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2210 = SLAG
5363 { 2209, 4, 1, 4, 212, 0, 1, 1458, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2209 = SLA
5364 { 2208, 5, 1, 4, 134, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #2208 = SL
5365 { 2207, 4, 0, 4, 856, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2207 = SIGP
5366 { 2206, 2, 0, 4, 856, 4, 1, 715, SystemZImpOpBase + 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2206 = SIGA
5367 { 2205, 2, 0, 4, 857, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2205 = SIE
5368 { 2204, 5, 1, 6, 131, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2204 = SHY
5369 { 2203, 3, 1, 4, 140, 0, 1, 562, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2203 = SHHLR
5370 { 2202, 3, 1, 4, 139, 0, 1, 559, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2202 = SHHHR
5371 { 2201, 5, 1, 4, 131, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c48ULL }, // Inst #2201 = SH
5372 { 2200, 3, 1, 4, 132, 0, 1, 388, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2200 = SGRK
5373 { 2199, 3, 1, 4, 132, 0, 1, 556, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2199 = SGR
5374 { 2198, 5, 1, 6, 143, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2198 = SGH
5375 { 2197, 3, 1, 4, 144, 0, 1, 553, SystemZImpOpBase + 0, 0, 0x223c00ULL }, // Inst #2197 = SGFR
5376 { 2196, 5, 1, 6, 922, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2196 = SGF
5377 { 2195, 5, 1, 6, 130, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #2195 = SG
5378 { 2194, 1, 0, 4, 414, 0, 1, 992, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2194 = SFPC
5379 { 2193, 1, 0, 4, 416, 0, 1, 992, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2193 = SFASR
5380 { 2192, 3, 1, 2, 447, 0, 1, 542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2192 = SER
5381 { 2191, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2191 = SELRAsmZ
5382 { 2190, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2190 = SELRAsmP
5383 { 2189, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2189 = SELRAsmO
5384 { 2188, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2188 = SELRAsmNZ
5385 { 2187, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2187 = SELRAsmNP
5386 { 2186, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2186 = SELRAsmNO
5387 { 2185, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2185 = SELRAsmNM
5388 { 2184, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2184 = SELRAsmNLH
5389 { 2183, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2183 = SELRAsmNLE
5390 { 2182, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2182 = SELRAsmNL
5391 { 2181, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2181 = SELRAsmNHE
5392 { 2180, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2180 = SELRAsmNH
5393 { 2179, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2179 = SELRAsmNE
5394 { 2178, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2178 = SELRAsmM
5395 { 2177, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2177 = SELRAsmLH
5396 { 2176, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2176 = SELRAsmLE
5397 { 2175, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2175 = SELRAsmL
5398 { 2174, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2174 = SELRAsmHE
5399 { 2173, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2173 = SELRAsmH
5400 { 2172, 3, 1, 4, 56, 1, 0, 571, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2172 = SELRAsmE
5401 { 2171, 4, 1, 4, 56, 1, 0, 1454, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2171 = SELRAsm
5402 { 2170, 5, 1, 4, 56, 1, 0, 458, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2170 = SELR
5403 { 2169, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2169 = SELGRAsmZ
5404 { 2168, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2168 = SELGRAsmP
5405 { 2167, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2167 = SELGRAsmO
5406 { 2166, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2166 = SELGRAsmNZ
5407 { 2165, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2165 = SELGRAsmNP
5408 { 2164, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2164 = SELGRAsmNO
5409 { 2163, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2163 = SELGRAsmNM
5410 { 2162, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2162 = SELGRAsmNLH
5411 { 2161, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2161 = SELGRAsmNLE
5412 { 2160, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2160 = SELGRAsmNL
5413 { 2159, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2159 = SELGRAsmNHE
5414 { 2158, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2158 = SELGRAsmNH
5415 { 2157, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2157 = SELGRAsmNE
5416 { 2156, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2156 = SELGRAsmM
5417 { 2155, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2155 = SELGRAsmLH
5418 { 2154, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2154 = SELGRAsmLE
5419 { 2153, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2153 = SELGRAsmL
5420 { 2152, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2152 = SELGRAsmHE
5421 { 2151, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2151 = SELGRAsmH
5422 { 2150, 3, 1, 4, 56, 1, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2150 = SELGRAsmE
5423 { 2149, 4, 1, 4, 56, 1, 0, 1034, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2149 = SELGRAsm
5424 { 2148, 5, 1, 4, 56, 1, 0, 463, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2148 = SELGR
5425 { 2147, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2147 = SELFHRAsmZ
5426 { 2146, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2146 = SELFHRAsmP
5427 { 2145, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2145 = SELFHRAsmO
5428 { 2144, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2144 = SELFHRAsmNZ
5429 { 2143, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2143 = SELFHRAsmNP
5430 { 2142, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2142 = SELFHRAsmNO
5431 { 2141, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2141 = SELFHRAsmNM
5432 { 2140, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2140 = SELFHRAsmNLH
5433 { 2139, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2139 = SELFHRAsmNLE
5434 { 2138, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2138 = SELFHRAsmNL
5435 { 2137, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2137 = SELFHRAsmNHE
5436 { 2136, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2136 = SELFHRAsmNH
5437 { 2135, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2135 = SELFHRAsmNE
5438 { 2134, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2134 = SELFHRAsmM
5439 { 2133, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2133 = SELFHRAsmLH
5440 { 2132, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2132 = SELFHRAsmLE
5441 { 2131, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2131 = SELFHRAsmL
5442 { 2130, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2130 = SELFHRAsmHE
5443 { 2129, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2129 = SELFHRAsmH
5444 { 2128, 3, 1, 4, 56, 1, 0, 559, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2128 = SELFHRAsmE
5445 { 2127, 4, 1, 4, 56, 1, 0, 1450, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2127 = SELFHRAsm
5446 { 2126, 5, 1, 4, 56, 1, 0, 1445, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2126 = SELFHR
5447 { 2125, 3, 1, 4, 390, 1, 1, 542, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2125 = SEBR
5448 { 2124, 5, 1, 6, 389, 1, 1, 537, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #2124 = SEB
5449 { 2123, 5, 1, 4, 446, 0, 1, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2123 = SE
5450 { 2122, 4, 1, 4, 511, 1, 1, 533, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #2122 = SDTRA
5451 { 2121, 3, 1, 4, 511, 1, 1, 530, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #2121 = SDTR
5452 { 2120, 3, 1, 2, 447, 0, 1, 527, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2120 = SDR
5453 { 2119, 3, 1, 4, 390, 1, 1, 527, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2119 = SDBR
5454 { 2118, 5, 1, 6, 389, 1, 1, 522, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #2118 = SDB
5455 { 2117, 5, 1, 4, 446, 0, 1, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2117 = SD
5456 { 2116, 0, 0, 2, 949, 1, 0, 1, SystemZImpOpBase + 55, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2116 = SCKPF
5457 { 2115, 2, 0, 4, 835, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2115 = SCKC
5458 { 2114, 2, 0, 4, 948, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2114 = SCK
5459 { 2113, 0, 0, 4, 868, 2, 0, 1, SystemZImpOpBase + 74, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2113 = SCHM
5460 { 2112, 2, 0, 4, 864, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2112 = SCCTR
5461 { 2111, 2, 1, 4, 315, 0, 0, 1443, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2111 = SAR
5462 { 2110, 0, 0, 2, 323, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2110 = SAM64
5463 { 2109, 0, 0, 2, 323, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2109 = SAM31
5464 { 2108, 0, 0, 2, 323, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2108 = SAM24
5465 { 2107, 0, 0, 4, 871, 1, 0, 1, SystemZImpOpBase + 73, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2107 = SAL
5466 { 2106, 2, 0, 4, 789, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2106 = SACF
5467 { 2105, 2, 0, 4, 789, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2105 = SAC
5468 { 2104, 5, 1, 4, 130, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #2104 = S
5469 { 2103, 5, 1, 6, 219, 0, 1, 1285, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2103 = RXSBGOpt
5470 { 2102, 6, 1, 6, 219, 0, 1, 1401, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2102 = RXSBG
5471 { 2101, 0, 0, 4, 865, 1, 1, 1, SystemZImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2101 = RSCH
5472 { 2100, 5, 2, 4, 520, 1, 0, 1438, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #2100 = RRXTR
5473 { 2099, 5, 2, 4, 519, 1, 0, 1433, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #2099 = RRDTR
5474 { 2098, 2, 1, 4, 801, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2098 = RRBM
5475 { 2097, 2, 0, 4, 801, 0, 1, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2097 = RRBE
5476 { 2096, 2, 0, 4, 828, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2096 = RP
5477 { 2095, 5, 1, 6, 219, 0, 1, 1285, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2095 = ROSBGOpt
5478 { 2094, 6, 1, 6, 219, 0, 1, 1401, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2094 = ROSBG
5479 { 2093, 5, 1, 6, 219, 0, 1, 1285, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2093 = RNSBGOpt
5480 { 2092, 6, 1, 6, 219, 0, 1, 1401, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2092 = RNSBG
5481 { 2091, 4, 1, 6, 214, 0, 0, 984, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2091 = RLLG
5482 { 2090, 4, 1, 6, 214, 0, 0, 1429, SystemZImpOpBase + 0, 0, 0x4ULL }, // Inst #2090 = RLL
5483 { 2089, 5, 1, 6, 216, 0, 0, 1424, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2089 = RISBLGOpt
5484 { 2088, 6, 1, 6, 216, 0, 0, 1418, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2088 = RISBLG
5485 { 2087, 5, 1, 6, 215, 0, 0, 1413, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2087 = RISBHGOpt
5486 { 2086, 6, 1, 6, 215, 0, 0, 1407, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2086 = RISBHG
5487 { 2085, 5, 1, 6, 950, 0, 1, 1285, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2085 = RISBGZOpt
5488 { 2084, 6, 1, 6, 950, 0, 1, 1401, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2084 = RISBGZ
5489 { 2083, 5, 1, 6, 950, 0, 1, 1285, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2083 = RISBGOpt
5490 { 2082, 5, 1, 6, 217, 0, 0, 1285, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2082 = RISBGNZOpt
5491 { 2081, 6, 1, 6, 217, 0, 0, 1401, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2081 = RISBGNZ
5492 { 2080, 5, 1, 6, 217, 0, 0, 1285, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2080 = RISBGNOpt
5493 { 2079, 6, 1, 6, 217, 0, 0, 1401, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2079 = RISBGN
5494 { 2078, 5, 1, 6, 950, 0, 1, 430, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2078 = RISBG32Opt
5495 { 2077, 6, 1, 6, 950, 0, 1, 424, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2077 = RISBG32
5496 { 2076, 6, 1, 6, 950, 0, 1, 1401, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #2076 = RISBG
5497 { 2075, 3, 0, 4, 809, 0, 0, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2075 = RDPOpt
5498 { 2074, 4, 0, 4, 809, 0, 0, 1034, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2074 = RDP
5499 { 2073, 0, 0, 4, 867, 1, 1, 1, SystemZImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2073 = RCHP
5500 { 2072, 2, 0, 4, 863, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2072 = QSI
5501 { 2071, 2, 0, 4, 849, 1, 2, 715, SystemZImpOpBase + 70, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2071 = QPACI
5502 { 2070, 2, 0, 4, 863, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2070 = QCTRI
5503 { 2069, 5, 2, 4, 518, 1, 0, 1396, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #2069 = QAXTR
5504 { 2068, 5, 2, 4, 517, 1, 0, 969, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #2068 = QADTR
5505 { 2067, 0, 0, 4, 811, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2067 = PTLB
5506 { 2066, 2, 0, 4, 827, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2066 = PTI
5507 { 2065, 0, 0, 2, 834, 2, 1, 1, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2065 = PTFF
5508 { 2064, 2, 1, 4, 847, 0, 0, 1394, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2064 = PTF
5509 { 2063, 2, 0, 4, 827, 0, 0, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2063 = PT
5510 { 2062, 4, 2, 4, 296, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2062 = PRNO
5511 { 2061, 0, 0, 2, 826, 0, 1, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2061 = PR
5512 { 2060, 4, 2, 4, 924, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2060 = PPNO
5513 { 2059, 3, 0, 4, 331, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2059 = PPA
5514 { 2058, 3, 1, 4, 334, 0, 1, 223, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2058 = POPCNTOpt
5515 { 2057, 2, 1, 4, 917, 0, 1, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2057 = POPCNT
5516 { 2056, 6, 0, 6, 280, 2, 1, 1388, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2056 = PLO
5517 { 2055, 5, 0, 6, 305, 0, 0, 1383, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2055 = PKU
5518 { 2054, 5, 0, 6, 305, 0, 0, 1383, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2054 = PKA
5519 { 2053, 2, 0, 4, 806, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2053 = PGOUT
5520 { 2052, 2, 0, 4, 805, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2052 = PGIN
5521 { 2051, 0, 0, 2, 502, 3, 3, 1, SystemZImpOpBase + 64, 0, 0x0ULL }, // Inst #2051 = PFPO
5522 { 2050, 3, 1, 4, 803, 0, 0, 1380, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2050 = PFMF
5523 { 2049, 2, 0, 6, 265, 0, 0, 624, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2049 = PFDRL
5524 { 2048, 4, 0, 6, 265, 0, 0, 602, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #2048 = PFD
5525 { 2047, 4, 1, 6, 285, 1, 1, 984, SystemZImpOpBase + 62, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2047 = PFCR
5526 { 2046, 0, 0, 4, 848, 2, 0, 1, SystemZImpOpBase + 60, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2046 = PCKMO
5527 { 2045, 0, 0, 4, 941, 2, 1, 1, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2045 = PCC
5528 { 2044, 2, 0, 4, 825, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2044 = PC
5529 { 2043, 0, 0, 4, 824, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2043 = PALB
5530 { 2042, 6, 0, 6, 305, 0, 0, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2042 = PACK
5531 { 2041, 5, 1, 6, 157, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #2041 = OY
5532 { 2040, 3, 1, 4, 167, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2040 = ORK
5533 { 2039, 3, 1, 2, 167, 0, 1, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2039 = OR
5534 { 2038, 3, 0, 6, 159, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2038 = OIY
5535 { 2037, 3, 1, 4, 166, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2037 = OILL
5536 { 2036, 3, 1, 4, 165, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2036 = OILH
5537 { 2035, 3, 1, 6, 164, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #2035 = OILF
5538 { 2034, 3, 1, 4, 163, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2034 = OIHL
5539 { 2033, 3, 1, 4, 162, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2033 = OIHH
5540 { 2032, 3, 1, 6, 161, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #2032 = OIHF
5541 { 2031, 3, 0, 4, 159, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2031 = OI
5542 { 2030, 3, 1, 4, 158, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2030 = OGRK
5543 { 2029, 3, 1, 4, 158, 0, 1, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2029 = OGR
5544 { 2028, 5, 1, 6, 157, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #2028 = OG
5545 { 2027, 3, 1, 4, 178, 0, 1, 571, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #2027 = OCRK
5546 { 2026, 3, 1, 4, 178, 0, 1, 388, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #2026 = OCGRK
5547 { 2025, 5, 0, 6, 168, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2025 = OC
5548 { 2024, 5, 1, 4, 157, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #2024 = O
5549 { 2023, 5, 1, 6, 145, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #2023 = NY
5550 { 2022, 3, 1, 4, 182, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2022 = NXRK
5551 { 2021, 3, 1, 4, 182, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2021 = NXGRK
5552 { 2020, 4, 0, 6, 330, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #2020 = NTSTG
5553 { 2019, 3, 1, 4, 155, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2019 = NRK
5554 { 2018, 3, 1, 2, 155, 0, 1, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2018 = NR
5555 { 2017, 3, 1, 4, 181, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2017 = NOTR
5556 { 2016, 3, 1, 4, 181, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2016 = NOTGR
5557 { 2015, 3, 1, 4, 180, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2015 = NORK
5558 { 2014, 0, 0, 2, 872, 0, 0, 1, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2014 = NOPROpt
5559 { 2013, 1, 0, 2, 872, 0, 0, 304, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #2013 = NOPR
5560 { 2012, 0, 0, 4, 872, 0, 0, 1, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2012 = NOPOpt
5561 { 2011, 3, 0, 4, 872, 0, 0, 590, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #2011 = NOP
5562 { 2010, 3, 1, 4, 180, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2010 = NOGRK
5563 { 2009, 3, 1, 4, 179, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2009 = NNRK
5564 { 2008, 0, 0, 4, 344, 2, 2, 1, SystemZImpOpBase + 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2008 = NNPA
5565 { 2007, 3, 1, 4, 179, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #2007 = NNGRK
5566 { 2006, 3, 0, 6, 148, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2006 = NIY
5567 { 2005, 3, 1, 4, 154, 0, 1, 545, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #2005 = NILL
5568 { 2004, 3, 1, 4, 153, 0, 1, 545, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #2004 = NILH
5569 { 2003, 3, 1, 6, 152, 0, 1, 545, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #2003 = NILF
5570 { 2002, 3, 1, 4, 151, 0, 1, 565, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #2002 = NIHL
5571 { 2001, 3, 1, 4, 150, 0, 1, 565, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #2001 = NIHH
5572 { 2000, 3, 1, 6, 149, 0, 1, 565, SystemZImpOpBase + 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #2000 = NIHF
5573 { 1999, 2, 0, 4, 268, 0, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1999 = NIAI
5574 { 1998, 3, 0, 4, 148, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1998 = NI
5575 { 1997, 3, 1, 4, 146, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1997 = NGRK
5576 { 1996, 3, 1, 4, 146, 0, 1, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1996 = NGR
5577 { 1995, 5, 1, 6, 145, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #1995 = NG
5578 { 1994, 3, 1, 4, 177, 0, 1, 571, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #1994 = NCRK
5579 { 1993, 3, 1, 4, 177, 0, 1, 388, SystemZImpOpBase + 0, 0, 0x23000ULL }, // Inst #1993 = NCGRK
5580 { 1992, 5, 0, 6, 156, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1992 = NC
5581 { 1991, 5, 1, 4, 145, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #1991 = N
5582 { 1990, 3, 1, 4, 456, 0, 0, 1377, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1990 = MYR
5583 { 1989, 3, 1, 4, 457, 0, 0, 530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1989 = MYLR
5584 { 1988, 5, 1, 6, 455, 0, 0, 156, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1988 = MYL
5585 { 1987, 3, 1, 4, 457, 0, 0, 530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1987 = MYHR
5586 { 1986, 5, 1, 6, 455, 0, 0, 156, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1986 = MYH
5587 { 1985, 5, 1, 6, 454, 0, 0, 1372, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1985 = MY
5588 { 1984, 4, 1, 4, 514, 1, 0, 586, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1984 = MXTRA
5589 { 1983, 3, 1, 4, 514, 1, 0, 583, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1983 = MXTR
5590 { 1982, 3, 1, 2, 453, 0, 0, 580, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1982 = MXR
5591 { 1981, 3, 1, 2, 452, 0, 0, 1369, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1981 = MXDR
5592 { 1980, 3, 1, 4, 395, 1, 0, 1369, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1980 = MXDBR
5593 { 1979, 5, 1, 6, 394, 1, 0, 1364, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1979 = MXDB
5594 { 1978, 5, 1, 4, 451, 0, 0, 1364, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1978 = MXD
5595 { 1977, 3, 1, 4, 396, 1, 0, 580, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1977 = MXBR
5596 { 1976, 5, 0, 6, 304, 0, 0, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1976 = MVZ
5597 { 1975, 4, 2, 4, 49, 1, 1, 873, SystemZImpOpBase + 35, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1975 = MVST
5598 { 1974, 2, 0, 4, 822, 1, 1, 593, SystemZImpOpBase + 35, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1974 = MVPG
5599 { 1973, 6, 0, 6, 304, 0, 0, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1973 = MVO
5600 { 1972, 5, 0, 6, 304, 0, 0, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1972 = MVN
5601 { 1971, 3, 0, 6, 25, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1971 = MVIY
5602 { 1970, 3, 0, 4, 25, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1970 = MVI
5603 { 1969, 3, 0, 6, 24, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1969 = MVHI
5604 { 1968, 3, 0, 6, 24, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1968 = MVHHI
5605 { 1967, 3, 0, 6, 24, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1967 = MVGHI
5606 { 1966, 4, 0, 6, 820, 2, 0, 1176, SystemZImpOpBase + 53, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1966 = MVCSK
5607 { 1965, 6, 0, 6, 819, 0, 1, 1358, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1965 = MVCS
5608 { 1964, 4, 0, 6, 28, 1, 0, 1176, SystemZImpOpBase + 55, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1964 = MVCRL
5609 { 1963, 6, 0, 6, 819, 0, 1, 1358, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1963 = MVCP
5610 { 1962, 5, 0, 6, 821, 1, 0, 928, SystemZImpOpBase + 55, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1962 = MVCOS
5611 { 1961, 6, 2, 6, 27, 0, 1, 838, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1961 = MVCLU
5612 { 1960, 6, 2, 4, 27, 0, 1, 838, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1960 = MVCLE
5613 { 1959, 4, 2, 2, 27, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1959 = MVCL
5614 { 1958, 6, 0, 6, 819, 0, 1, 1358, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1958 = MVCK
5615 { 1957, 5, 0, 6, 85, 0, 0, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1957 = MVCIN
5616 { 1956, 4, 0, 6, 820, 2, 0, 1176, SystemZImpOpBase + 53, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1956 = MVCDK
5617 { 1955, 5, 0, 6, 26, 0, 0, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1955 = MVC
5618 { 1954, 5, 1, 6, 183, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1954 = MSY
5619 { 1953, 1, 0, 4, 833, 0, 0, 1357, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1953 = MSTA
5620 { 1952, 3, 1, 4, 200, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1952 = MSRKC
5621 { 1951, 3, 1, 4, 184, 0, 0, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1951 = MSR
5622 { 1950, 3, 1, 4, 201, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1950 = MSGRKC
5623 { 1949, 3, 1, 4, 186, 0, 0, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1949 = MSGR
5624 { 1948, 3, 1, 4, 187, 0, 0, 553, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1948 = MSGFR
5625 { 1947, 3, 1, 6, 187, 0, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1947 = MSGFI
5626 { 1946, 5, 1, 6, 183, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1946 = MSGF
5627 { 1945, 5, 1, 6, 199, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1945 = MSGC
5628 { 1944, 5, 1, 6, 185, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1944 = MSG
5629 { 1943, 3, 1, 6, 184, 0, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1943 = MSFI
5630 { 1942, 4, 1, 4, 459, 0, 0, 1350, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1942 = MSER
5631 { 1941, 4, 1, 4, 398, 1, 0, 1350, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1941 = MSEBR
5632 { 1940, 6, 1, 6, 397, 1, 0, 1344, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1940 = MSEB
5633 { 1939, 6, 1, 6, 458, 0, 0, 1344, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1939 = MSE
5634 { 1938, 4, 1, 4, 459, 0, 0, 1340, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1938 = MSDR
5635 { 1937, 4, 1, 4, 400, 1, 0, 1340, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1937 = MSDBR
5636 { 1936, 6, 1, 6, 399, 1, 0, 1334, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1936 = MSDB
5637 { 1935, 6, 1, 6, 458, 0, 0, 1334, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1935 = MSD
5638 { 1934, 2, 0, 4, 866, 1, 1, 715, SystemZImpOpBase + 41, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1934 = MSCH
5639 { 1933, 5, 1, 6, 198, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1933 = MSC
5640 { 1932, 5, 1, 4, 183, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1932 = MS
5641 { 1931, 3, 1, 2, 193, 0, 0, 979, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1931 = MR
5642 { 1930, 6, 0, 6, 309, 0, 0, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1930 = MP
5643 { 1929, 3, 1, 4, 193, 0, 0, 979, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1929 = MLR
5644 { 1928, 3, 1, 4, 189, 0, 0, 925, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1928 = MLGR
5645 { 1927, 5, 1, 6, 188, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1927 = MLG
5646 { 1926, 5, 1, 6, 194, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1926 = ML
5647 { 1925, 5, 1, 6, 192, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1925 = MHY
5648 { 1924, 3, 1, 4, 191, 0, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1924 = MHI
5649 { 1923, 5, 1, 4, 192, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1923 = MH
5650 { 1922, 3, 1, 4, 197, 0, 0, 385, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1922 = MGRK
5651 { 1921, 3, 1, 4, 190, 0, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1921 = MGHI
5652 { 1920, 5, 1, 6, 195, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1920 = MGH
5653 { 1919, 5, 1, 6, 196, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1919 = MG
5654 { 1918, 5, 1, 6, 194, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1918 = MFY
5655 { 1917, 3, 1, 2, 450, 0, 0, 1354, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1917 = MER
5656 { 1916, 3, 1, 4, 944, 0, 0, 542, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1916 = MEER
5657 { 1915, 3, 1, 4, 393, 1, 0, 542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1915 = MEEBR
5658 { 1914, 5, 1, 6, 392, 1, 0, 537, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1914 = MEEB
5659 { 1913, 5, 1, 6, 943, 0, 0, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1913 = MEE
5660 { 1912, 5, 1, 4, 449, 0, 0, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1912 = ME
5661 { 1911, 4, 1, 4, 513, 1, 0, 533, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1911 = MDTRA
5662 { 1910, 3, 1, 4, 513, 1, 0, 530, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1910 = MDTR
5663 { 1909, 3, 1, 2, 944, 0, 0, 527, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1909 = MDR
5664 { 1908, 3, 1, 2, 450, 0, 0, 1354, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1908 = MDER
5665 { 1907, 3, 1, 4, 393, 1, 0, 1354, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1907 = MDEBR
5666 { 1906, 5, 1, 6, 392, 1, 0, 522, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1906 = MDEB
5667 { 1905, 5, 1, 4, 449, 0, 0, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1905 = MDE
5668 { 1904, 3, 1, 4, 393, 1, 0, 527, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1904 = MDBR
5669 { 1903, 5, 1, 6, 392, 1, 0, 522, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1903 = MDB
5670 { 1902, 5, 1, 4, 943, 0, 0, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1902 = MD
5671 { 1901, 3, 0, 4, 851, 0, 0, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1901 = MC
5672 { 1900, 4, 1, 4, 462, 0, 0, 1340, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1900 = MAYR
5673 { 1899, 4, 1, 4, 463, 0, 0, 1340, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1899 = MAYLR
5674 { 1898, 6, 1, 6, 461, 0, 0, 1334, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1898 = MAYL
5675 { 1897, 4, 1, 4, 463, 0, 0, 1340, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1897 = MAYHR
5676 { 1896, 6, 1, 6, 461, 0, 0, 1334, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1896 = MAYH
5677 { 1895, 6, 1, 6, 460, 0, 0, 1334, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1895 = MAY
5678 { 1894, 4, 1, 4, 459, 0, 0, 1350, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1894 = MAER
5679 { 1893, 4, 1, 4, 398, 1, 0, 1350, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1893 = MAEBR
5680 { 1892, 6, 1, 6, 397, 1, 0, 1344, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1892 = MAEB
5681 { 1891, 6, 1, 6, 458, 0, 0, 1344, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1891 = MAE
5682 { 1890, 4, 1, 4, 459, 0, 0, 1340, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1890 = MADR
5683 { 1889, 4, 1, 4, 400, 1, 0, 1340, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1889 = MADBR
5684 { 1888, 6, 1, 6, 399, 1, 0, 1334, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1888 = MADB
5685 { 1887, 6, 1, 6, 458, 0, 0, 1334, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1887 = MAD
5686 { 1886, 5, 1, 4, 194, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1886 = M
5687 { 1885, 1, 1, 4, 348, 0, 0, 352, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1885 = LZXR
5688 { 1884, 4, 1, 6, 42, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1884 = LZRG
5689 { 1883, 4, 1, 6, 42, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1883 = LZRF
5690 { 1882, 1, 1, 4, 347, 0, 0, 1333, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1882 = LZER_16
5691 { 1881, 1, 1, 4, 347, 0, 0, 351, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1881 = LZER
5692 { 1880, 1, 1, 4, 347, 0, 0, 350, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1880 = LZDR
5693 { 1879, 4, 1, 6, 33, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1879 = LY
5694 { 1878, 2, 1, 4, 352, 0, 0, 713, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1878 = LXR
5695 { 1877, 2, 1, 4, 427, 0, 0, 1331, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1877 = LXER
5696 { 1876, 2, 1, 4, 366, 1, 0, 1331, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1876 = LXEBR
5697 { 1875, 4, 1, 6, 365, 1, 0, 353, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1875 = LXEB
5698 { 1874, 4, 1, 6, 426, 0, 0, 353, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1874 = LXE
5699 { 1873, 3, 1, 4, 477, 1, 0, 1328, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1873 = LXDTR
5700 { 1872, 2, 1, 4, 427, 0, 0, 1326, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1872 = LXDR
5701 { 1871, 2, 1, 4, 366, 1, 0, 1326, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1871 = LXDBR
5702 { 1870, 4, 1, 6, 365, 1, 0, 353, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1870 = LXDB
5703 { 1869, 4, 1, 6, 426, 0, 0, 353, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1869 = LXD
5704 { 1868, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1868 = LXAQ
5705 { 1867, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1867 = LXAH
5706 { 1866, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1866 = LXAG
5707 { 1865, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1865 = LXAF
5708 { 1864, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1864 = LXAB
5709 { 1863, 2, 1, 4, 816, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1863 = LURAG
5710 { 1862, 2, 1, 4, 816, 0, 0, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1862 = LURA
5711 { 1861, 2, 1, 4, 473, 1, 1, 713, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #1861 = LTXTR
5712 { 1860, 2, 1, 4, 420, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1860 = LTXR
5713 { 1859, 2, 1, 4, 354, 1, 1, 713, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1859 = LTXBR
5714 { 1858, 2, 1, 2, 45, 0, 1, 855, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1858 = LTR
5715 { 1857, 2, 1, 4, 45, 0, 1, 593, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1857 = LTGR
5716 { 1856, 2, 1, 4, 60, 0, 1, 754, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1856 = LTGFR
5717 { 1855, 4, 1, 6, 59, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1855 = LTGF
5718 { 1854, 4, 1, 6, 44, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3b90cULL }, // Inst #1854 = LTG
5719 { 1853, 2, 1, 2, 419, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1853 = LTER
5720 { 1852, 2, 1, 4, 353, 1, 1, 699, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1852 = LTEBR
5721 { 1851, 2, 1, 4, 472, 1, 1, 671, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #1851 = LTDTR
5722 { 1850, 2, 1, 2, 419, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1850 = LTDR
5723 { 1849, 2, 1, 4, 353, 1, 1, 671, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1849 = LTDBR
5724 { 1848, 4, 1, 6, 44, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1848 = LT
5725 { 1847, 2, 0, 4, 862, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1847 = LSCTL
5726 { 1846, 2, 1, 4, 82, 0, 0, 855, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1846 = LRVR
5727 { 1845, 4, 1, 6, 83, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1845 = LRVH
5728 { 1844, 2, 1, 4, 82, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1844 = LRVGR
5729 { 1843, 4, 1, 6, 83, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1843 = LRVG
5730 { 1842, 4, 1, 6, 83, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1842 = LRV
5731 { 1841, 2, 1, 6, 33, 0, 0, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1841 = LRL
5732 { 1840, 2, 1, 2, 421, 0, 0, 1202, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1840 = LRER
5733 { 1839, 2, 1, 2, 423, 0, 0, 1196, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1839 = LRDR
5734 { 1838, 4, 1, 6, 814, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1838 = LRAY
5735 { 1837, 4, 1, 6, 814, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1837 = LRAG
5736 { 1836, 4, 1, 4, 814, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1836 = LRA
5737 { 1835, 2, 1, 2, 41, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1835 = LR
5738 { 1834, 2, 1, 4, 435, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1834 = LPXR
5739 { 1833, 2, 1, 4, 379, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1833 = LPXBR
5740 { 1832, 5, 2, 4, 813, 0, 1, 1321, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1832 = LPTEA
5741 { 1831, 2, 0, 6, 783, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x204ULL }, // Inst #1831 = LPSWEY
5742 { 1830, 2, 0, 4, 915, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #1830 = LPSWE
5743 { 1829, 2, 0, 4, 915, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1829 = LPSW
5744 { 1828, 2, 1, 2, 89, 0, 1, 855, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1828 = LPR
5745 { 1827, 4, 1, 6, 281, 0, 0, 308, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x20cULL }, // Inst #1827 = LPQ
5746 { 1826, 2, 0, 4, 858, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1826 = LPP
5747 { 1825, 2, 1, 4, 89, 0, 1, 593, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1825 = LPGR
5748 { 1824, 2, 1, 4, 90, 0, 1, 754, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1824 = LPGFR
5749 { 1823, 2, 1, 2, 434, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1823 = LPER
5750 { 1822, 2, 1, 4, 377, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1822 = LPEBR
5751 { 1821, 2, 1, 2, 434, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1821 = LPDR
5752 { 1820, 5, 1, 6, 283, 0, 1, 1316, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1820 = LPDG
5753 { 1819, 2, 1, 4, 378, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1819 = LPDFR_32
5754 { 1818, 2, 1, 4, 378, 0, 0, 1185, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1818 = LPDFR_16
5755 { 1817, 2, 1, 4, 378, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1817 = LPDFR
5756 { 1816, 2, 1, 4, 377, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1816 = LPDBR
5757 { 1815, 5, 1, 6, 283, 0, 1, 1316, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1815 = LPD
5758 { 1814, 2, 0, 4, 862, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1814 = LPCTL
5759 { 1813, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1813 = LOCRAsmZ
5760 { 1812, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1812 = LOCRAsmP
5761 { 1811, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1811 = LOCRAsmO
5762 { 1810, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1810 = LOCRAsmNZ
5763 { 1809, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1809 = LOCRAsmNP
5764 { 1808, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1808 = LOCRAsmNO
5765 { 1807, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1807 = LOCRAsmNM
5766 { 1806, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1806 = LOCRAsmNLH
5767 { 1805, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1805 = LOCRAsmNLE
5768 { 1804, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1804 = LOCRAsmNL
5769 { 1803, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1803 = LOCRAsmNHE
5770 { 1802, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1802 = LOCRAsmNH
5771 { 1801, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1801 = LOCRAsmNE
5772 { 1800, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1800 = LOCRAsmM
5773 { 1799, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1799 = LOCRAsmLH
5774 { 1798, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1798 = LOCRAsmLE
5775 { 1797, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1797 = LOCRAsmL
5776 { 1796, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1796 = LOCRAsmHE
5777 { 1795, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1795 = LOCRAsmH
5778 { 1794, 3, 1, 4, 936, 1, 0, 568, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1794 = LOCRAsmE
5779 { 1793, 4, 1, 4, 936, 1, 0, 1312, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1793 = LOCRAsm
5780 { 1792, 5, 1, 4, 936, 1, 0, 430, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1792 = LOCR
5781 { 1791, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1791 = LOCHIAsmZ
5782 { 1790, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1790 = LOCHIAsmP
5783 { 1789, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1789 = LOCHIAsmO
5784 { 1788, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1788 = LOCHIAsmNZ
5785 { 1787, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1787 = LOCHIAsmNP
5786 { 1786, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1786 = LOCHIAsmNO
5787 { 1785, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1785 = LOCHIAsmNM
5788 { 1784, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1784 = LOCHIAsmNLH
5789 { 1783, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1783 = LOCHIAsmNLE
5790 { 1782, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1782 = LOCHIAsmNL
5791 { 1781, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1781 = LOCHIAsmNHE
5792 { 1780, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1780 = LOCHIAsmNH
5793 { 1779, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1779 = LOCHIAsmNE
5794 { 1778, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1778 = LOCHIAsmM
5795 { 1777, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1777 = LOCHIAsmLH
5796 { 1776, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1776 = LOCHIAsmLE
5797 { 1775, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1775 = LOCHIAsmL
5798 { 1774, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1774 = LOCHIAsmHE
5799 { 1773, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1773 = LOCHIAsmH
5800 { 1772, 3, 1, 6, 52, 1, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1772 = LOCHIAsmE
5801 { 1771, 4, 1, 6, 52, 1, 0, 1308, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1771 = LOCHIAsm
5802 { 1770, 5, 1, 6, 52, 1, 0, 1303, SystemZImpOpBase + 0, 0, 0x80000ULL }, // Inst #1770 = LOCHI
5803 { 1769, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1769 = LOCHHIAsmZ
5804 { 1768, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1768 = LOCHHIAsmP
5805 { 1767, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1767 = LOCHHIAsmO
5806 { 1766, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1766 = LOCHHIAsmNZ
5807 { 1765, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1765 = LOCHHIAsmNP
5808 { 1764, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1764 = LOCHHIAsmNO
5809 { 1763, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1763 = LOCHHIAsmNM
5810 { 1762, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1762 = LOCHHIAsmNLH
5811 { 1761, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1761 = LOCHHIAsmNLE
5812 { 1760, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1760 = LOCHHIAsmNL
5813 { 1759, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1759 = LOCHHIAsmNHE
5814 { 1758, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1758 = LOCHHIAsmNH
5815 { 1757, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1757 = LOCHHIAsmNE
5816 { 1756, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1756 = LOCHHIAsmM
5817 { 1755, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1755 = LOCHHIAsmLH
5818 { 1754, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1754 = LOCHHIAsmLE
5819 { 1753, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1753 = LOCHHIAsmL
5820 { 1752, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1752 = LOCHHIAsmHE
5821 { 1751, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1751 = LOCHHIAsmH
5822 { 1750, 3, 1, 6, 52, 1, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1750 = LOCHHIAsmE
5823 { 1749, 4, 1, 6, 52, 1, 0, 1299, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1749 = LOCHHIAsm
5824 { 1748, 5, 1, 6, 52, 1, 0, 1294, SystemZImpOpBase + 0, 0, 0x80000ULL }, // Inst #1748 = LOCHHI
5825 { 1747, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1747 = LOCGRAsmZ
5826 { 1746, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1746 = LOCGRAsmP
5827 { 1745, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1745 = LOCGRAsmO
5828 { 1744, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1744 = LOCGRAsmNZ
5829 { 1743, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1743 = LOCGRAsmNP
5830 { 1742, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1742 = LOCGRAsmNO
5831 { 1741, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1741 = LOCGRAsmNM
5832 { 1740, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1740 = LOCGRAsmNLH
5833 { 1739, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1739 = LOCGRAsmNLE
5834 { 1738, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1738 = LOCGRAsmNL
5835 { 1737, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1737 = LOCGRAsmNHE
5836 { 1736, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1736 = LOCGRAsmNH
5837 { 1735, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1735 = LOCGRAsmNE
5838 { 1734, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1734 = LOCGRAsmM
5839 { 1733, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1733 = LOCGRAsmLH
5840 { 1732, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1732 = LOCGRAsmLE
5841 { 1731, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1731 = LOCGRAsmL
5842 { 1730, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1730 = LOCGRAsmHE
5843 { 1729, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1729 = LOCGRAsmH
5844 { 1728, 3, 1, 4, 936, 1, 0, 556, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1728 = LOCGRAsmE
5845 { 1727, 4, 1, 4, 936, 1, 0, 1290, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1727 = LOCGRAsm
5846 { 1726, 5, 1, 4, 936, 1, 0, 1285, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1726 = LOCGR
5847 { 1725, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1725 = LOCGHIAsmZ
5848 { 1724, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1724 = LOCGHIAsmP
5849 { 1723, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1723 = LOCGHIAsmO
5850 { 1722, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1722 = LOCGHIAsmNZ
5851 { 1721, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1721 = LOCGHIAsmNP
5852 { 1720, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1720 = LOCGHIAsmNO
5853 { 1719, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1719 = LOCGHIAsmNM
5854 { 1718, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1718 = LOCGHIAsmNLH
5855 { 1717, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1717 = LOCGHIAsmNLE
5856 { 1716, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1716 = LOCGHIAsmNL
5857 { 1715, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1715 = LOCGHIAsmNHE
5858 { 1714, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1714 = LOCGHIAsmNH
5859 { 1713, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1713 = LOCGHIAsmNE
5860 { 1712, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1712 = LOCGHIAsmM
5861 { 1711, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1711 = LOCGHIAsmLH
5862 { 1710, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1710 = LOCGHIAsmLE
5863 { 1709, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1709 = LOCGHIAsmL
5864 { 1708, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1708 = LOCGHIAsmHE
5865 { 1707, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1707 = LOCGHIAsmH
5866 { 1706, 3, 1, 6, 52, 1, 0, 305, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1706 = LOCGHIAsmE
5867 { 1705, 4, 1, 6, 52, 1, 0, 1281, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1705 = LOCGHIAsm
5868 { 1704, 5, 1, 6, 52, 1, 0, 1276, SystemZImpOpBase + 0, 0, 0x80000ULL }, // Inst #1704 = LOCGHI
5869 { 1703, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1703 = LOCGAsmZ
5870 { 1702, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1702 = LOCGAsmP
5871 { 1701, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1701 = LOCGAsmO
5872 { 1700, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1700 = LOCGAsmNZ
5873 { 1699, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1699 = LOCGAsmNP
5874 { 1698, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1698 = LOCGAsmNO
5875 { 1697, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1697 = LOCGAsmNM
5876 { 1696, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1696 = LOCGAsmNLH
5877 { 1695, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1695 = LOCGAsmNLE
5878 { 1694, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1694 = LOCGAsmNL
5879 { 1693, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1693 = LOCGAsmNHE
5880 { 1692, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1692 = LOCGAsmNH
5881 { 1691, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1691 = LOCGAsmNE
5882 { 1690, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1690 = LOCGAsmM
5883 { 1689, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1689 = LOCGAsmLH
5884 { 1688, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1688 = LOCGAsmLE
5885 { 1687, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1687 = LOCGAsmL
5886 { 1686, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1686 = LOCGAsmHE
5887 { 1685, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1685 = LOCGAsmH
5888 { 1684, 4, 1, 6, 937, 1, 0, 1272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1684 = LOCGAsmE
5889 { 1683, 5, 1, 6, 937, 1, 0, 1267, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1683 = LOCGAsm
5890 { 1682, 6, 1, 6, 937, 1, 0, 1261, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80104ULL }, // Inst #1682 = LOCG
5891 { 1681, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1681 = LOCFHRAsmZ
5892 { 1680, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1680 = LOCFHRAsmP
5893 { 1679, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1679 = LOCFHRAsmO
5894 { 1678, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1678 = LOCFHRAsmNZ
5895 { 1677, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1677 = LOCFHRAsmNP
5896 { 1676, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1676 = LOCFHRAsmNO
5897 { 1675, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1675 = LOCFHRAsmNM
5898 { 1674, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1674 = LOCFHRAsmNLH
5899 { 1673, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1673 = LOCFHRAsmNLE
5900 { 1672, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1672 = LOCFHRAsmNL
5901 { 1671, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1671 = LOCFHRAsmNHE
5902 { 1670, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1670 = LOCFHRAsmNH
5903 { 1669, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1669 = LOCFHRAsmNE
5904 { 1668, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1668 = LOCFHRAsmM
5905 { 1667, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1667 = LOCFHRAsmLH
5906 { 1666, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1666 = LOCFHRAsmLE
5907 { 1665, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1665 = LOCFHRAsmL
5908 { 1664, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1664 = LOCFHRAsmHE
5909 { 1663, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1663 = LOCFHRAsmH
5910 { 1662, 3, 1, 4, 51, 1, 0, 1258, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1662 = LOCFHRAsmE
5911 { 1661, 4, 1, 4, 51, 1, 0, 1254, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1661 = LOCFHRAsm
5912 { 1660, 5, 1, 4, 51, 1, 0, 397, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1660 = LOCFHR
5913 { 1659, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1659 = LOCFHAsmZ
5914 { 1658, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1658 = LOCFHAsmP
5915 { 1657, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1657 = LOCFHAsmO
5916 { 1656, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1656 = LOCFHAsmNZ
5917 { 1655, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1655 = LOCFHAsmNP
5918 { 1654, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1654 = LOCFHAsmNO
5919 { 1653, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1653 = LOCFHAsmNM
5920 { 1652, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1652 = LOCFHAsmNLH
5921 { 1651, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1651 = LOCFHAsmNLE
5922 { 1650, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1650 = LOCFHAsmNL
5923 { 1649, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1649 = LOCFHAsmNHE
5924 { 1648, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1648 = LOCFHAsmNH
5925 { 1647, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1647 = LOCFHAsmNE
5926 { 1646, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1646 = LOCFHAsmM
5927 { 1645, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1645 = LOCFHAsmLH
5928 { 1644, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1644 = LOCFHAsmLE
5929 { 1643, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1643 = LOCFHAsmL
5930 { 1642, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1642 = LOCFHAsmHE
5931 { 1641, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1641 = LOCFHAsmH
5932 { 1640, 4, 1, 6, 53, 1, 0, 1250, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1640 = LOCFHAsmE
5933 { 1639, 5, 1, 6, 53, 1, 0, 1245, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1639 = LOCFHAsm
5934 { 1638, 6, 1, 6, 53, 1, 0, 1239, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1638 = LOCFH
5935 { 1637, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1637 = LOCAsmZ
5936 { 1636, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1636 = LOCAsmP
5937 { 1635, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1635 = LOCAsmO
5938 { 1634, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1634 = LOCAsmNZ
5939 { 1633, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1633 = LOCAsmNP
5940 { 1632, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1632 = LOCAsmNO
5941 { 1631, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1631 = LOCAsmNM
5942 { 1630, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1630 = LOCAsmNLH
5943 { 1629, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1629 = LOCAsmNLE
5944 { 1628, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1628 = LOCAsmNL
5945 { 1627, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1627 = LOCAsmNHE
5946 { 1626, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1626 = LOCAsmNH
5947 { 1625, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1625 = LOCAsmNE
5948 { 1624, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1624 = LOCAsmM
5949 { 1623, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1623 = LOCAsmLH
5950 { 1622, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1622 = LOCAsmLE
5951 { 1621, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1621 = LOCAsmL
5952 { 1620, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1620 = LOCAsmHE
5953 { 1619, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1619 = LOCAsmH
5954 { 1618, 4, 1, 6, 937, 1, 0, 1235, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1618 = LOCAsmE
5955 { 1617, 5, 1, 6, 937, 1, 0, 1230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1617 = LOCAsm
5956 { 1616, 6, 1, 6, 937, 1, 0, 1224, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1616 = LOC
5957 { 1615, 2, 1, 4, 435, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1615 = LNXR
5958 { 1614, 2, 1, 4, 379, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1614 = LNXBR
5959 { 1613, 2, 1, 2, 91, 0, 1, 855, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1613 = LNR
5960 { 1612, 2, 1, 4, 91, 0, 1, 593, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1612 = LNGR
5961 { 1611, 2, 1, 4, 90, 0, 1, 754, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1611 = LNGFR
5962 { 1610, 2, 1, 2, 434, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1610 = LNER
5963 { 1609, 2, 1, 4, 377, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1609 = LNEBR
5964 { 1608, 2, 1, 2, 434, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1608 = LNDR
5965 { 1607, 2, 1, 4, 378, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1607 = LNDFR_32
5966 { 1606, 2, 1, 4, 378, 0, 0, 1185, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1606 = LNDFR_16
5967 { 1605, 2, 1, 4, 378, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1605 = LNDFR
5968 { 1604, 2, 1, 4, 377, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1604 = LNDBR
5969 { 1603, 4, 2, 6, 79, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1603 = LMY
5970 { 1602, 4, 2, 6, 79, 0, 0, 1220, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1602 = LMH
5971 { 1601, 4, 2, 6, 79, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1601 = LMG
5972 { 1600, 6, 2, 6, 80, 0, 0, 1214, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1600 = LMD
5973 { 1599, 4, 2, 4, 79, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1599 = LM
5974 { 1598, 4, 1, 6, 74, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1598 = LLZRGF
5975 { 1597, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1597 = LLXAQ
5976 { 1596, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1596 = LLXAH
5977 { 1595, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1595 = LLXAG
5978 { 1594, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1594 = LLXAF
5979 { 1593, 4, 1, 6, 88, 0, 0, 1210, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1593 = LLXAB
5980 { 1592, 2, 1, 4, 38, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1592 = LLILL
5981 { 1591, 2, 1, 4, 38, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1591 = LLILH
5982 { 1590, 2, 1, 6, 38, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1590 = LLILF
5983 { 1589, 2, 1, 4, 37, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1589 = LLIHL
5984 { 1588, 2, 1, 4, 37, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1588 = LLIHH
5985 { 1587, 2, 1, 6, 37, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1587 = LLIHF
5986 { 1586, 2, 1, 6, 72, 0, 0, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1586 = LLHRL
5987 { 1585, 2, 1, 4, 67, 0, 0, 855, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1585 = LLHR
5988 { 1584, 4, 1, 6, 71, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1584 = LLHH
5989 { 1583, 4, 1, 6, 70, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1583 = LLH
5990 { 1582, 2, 1, 4, 68, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1582 = LLGTR
5991 { 1581, 4, 1, 6, 75, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1581 = LLGTAT
5992 { 1580, 4, 1, 6, 73, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1580 = LLGT
5993 { 1579, 2, 1, 6, 73, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1579 = LLGHRL
5994 { 1578, 2, 1, 4, 68, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1578 = LLGHR
5995 { 1577, 4, 1, 6, 73, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1577 = LLGH
5996 { 1576, 4, 1, 6, 298, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1576 = LLGFSG
5997 { 1575, 2, 1, 6, 73, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1575 = LLGFRL
5998 { 1574, 2, 1, 4, 68, 0, 0, 754, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1574 = LLGFR
5999 { 1573, 4, 1, 6, 75, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1573 = LLGFAT
6000 { 1572, 4, 1, 6, 73, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1572 = LLGF
6001 { 1571, 2, 1, 4, 68, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1571 = LLGCR
6002 { 1570, 4, 1, 6, 73, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1570 = LLGC
6003 { 1569, 2, 1, 4, 66, 0, 0, 855, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1569 = LLCR
6004 { 1568, 4, 1, 6, 71, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1568 = LLCH
6005 { 1567, 4, 1, 6, 69, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1567 = LLC
6006 { 1566, 4, 1, 6, 62, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1566 = LHY
6007 { 1565, 2, 1, 6, 63, 0, 0, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1565 = LHRL
6008 { 1564, 2, 1, 4, 57, 0, 0, 855, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1564 = LHR
6009 { 1563, 2, 1, 4, 40, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1563 = LHI
6010 { 1562, 4, 1, 6, 63, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1562 = LHH
6011 { 1561, 4, 1, 4, 62, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1561 = LH
6012 { 1560, 4, 0, 6, 299, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1560 = LGSC
6013 { 1559, 2, 1, 6, 35, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1559 = LGRL
6014 { 1558, 2, 1, 4, 57, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1558 = LGR
6015 { 1557, 2, 1, 6, 65, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1557 = LGHRL
6016 { 1556, 2, 1, 4, 58, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1556 = LGHR
6017 { 1555, 2, 1, 4, 39, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1555 = LGHI
6018 { 1554, 4, 1, 6, 64, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1554 = LGH
6019 { 1553, 4, 1, 6, 297, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1553 = LGG
6020 { 1552, 2, 1, 6, 65, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1552 = LGFRL
6021 { 1551, 2, 1, 4, 58, 0, 0, 754, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1551 = LGFR
6022 { 1550, 2, 1, 6, 39, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1550 = LGFI
6023 { 1549, 4, 1, 6, 64, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1549 = LGF
6024 { 1548, 2, 1, 4, 351, 0, 0, 941, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1548 = LGDR
6025 { 1547, 2, 1, 4, 58, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1547 = LGBR
6026 { 1546, 4, 1, 6, 64, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1546 = LGB
6027 { 1545, 4, 1, 6, 43, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1545 = LGAT
6028 { 1544, 4, 1, 6, 35, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1544 = LG
6029 { 1543, 2, 0, 4, 415, 0, 1, 715, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1543 = LFPC
6030 { 1542, 4, 1, 6, 43, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1542 = LFHAT
6031 { 1541, 4, 1, 6, 33, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1541 = LFH
6032 { 1540, 2, 0, 4, 417, 0, 1, 715, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1540 = LFAS
6033 { 1539, 4, 1, 6, 356, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1539 = LEY
6034 { 1538, 2, 1, 4, 422, 0, 0, 1208, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1538 = LEXR
6035 { 1537, 4, 1, 4, 362, 1, 0, 1020, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1537 = LEXBRA
6036 { 1536, 2, 1, 4, 362, 1, 0, 713, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1536 = LEXBR
6037 { 1535, 2, 1, 2, 349, 0, 0, 1185, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1535 = LER16
6038 { 1534, 2, 1, 2, 349, 0, 0, 699, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1534 = LER
6039 { 1533, 4, 1, 4, 474, 1, 0, 1204, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1533 = LEDTR
6040 { 1532, 2, 1, 2, 421, 0, 0, 1202, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1532 = LEDR
6041 { 1531, 4, 1, 4, 361, 1, 0, 1204, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1531 = LEDBRA
6042 { 1530, 2, 1, 4, 361, 1, 0, 1202, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1530 = LEDBR
6043 { 1529, 4, 1, 6, 356, 0, 0, 1198, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1529 = LE16Y
6044 { 1528, 4, 1, 4, 356, 0, 0, 1198, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1528 = LE16
6045 { 1527, 4, 1, 4, 356, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1527 = LE
6046 { 1526, 4, 1, 6, 357, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1526 = LDY
6047 { 1525, 4, 1, 4, 475, 1, 0, 1020, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1525 = LDXTR
6048 { 1524, 2, 1, 2, 423, 0, 0, 1196, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1524 = LDXR
6049 { 1523, 4, 1, 4, 362, 1, 0, 1020, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1523 = LDXBRA
6050 { 1522, 2, 1, 4, 362, 1, 0, 713, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1522 = LDXBR
6051 { 1521, 2, 1, 2, 350, 0, 0, 699, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1521 = LDR32
6052 { 1520, 2, 1, 2, 350, 0, 0, 1185, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1520 = LDR16
6053 { 1519, 2, 1, 2, 350, 0, 0, 671, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #1519 = LDR
6054 { 1518, 2, 1, 4, 350, 0, 0, 679, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1518 = LDGR
6055 { 1517, 3, 1, 4, 476, 1, 0, 1193, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1517 = LDETR
6056 { 1516, 2, 1, 4, 425, 0, 0, 1191, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1516 = LDER
6057 { 1515, 2, 1, 4, 364, 1, 0, 1191, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1515 = LDEBR
6058 { 1514, 4, 1, 6, 363, 1, 0, 667, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1514 = LDEB
6059 { 1513, 4, 1, 6, 357, 0, 0, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1513 = LDE32
6060 { 1512, 4, 1, 6, 424, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1512 = LDE
6061 { 1511, 4, 1, 4, 357, 0, 0, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x109ULL }, // Inst #1511 = LD
6062 { 1510, 2, 1, 4, 435, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1510 = LCXR
6063 { 1509, 2, 1, 4, 379, 0, 1, 713, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1509 = LCXBR
6064 { 1508, 4, 2, 6, 790, 0, 0, 1187, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1508 = LCTLG
6065 { 1507, 4, 2, 4, 790, 0, 0, 1187, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1507 = LCTL
6066 { 1506, 2, 1, 2, 92, 0, 1, 855, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1506 = LCR
6067 { 1505, 2, 1, 4, 92, 0, 1, 593, SystemZImpOpBase + 0, 0, 0x23c00ULL }, // Inst #1505 = LCGR
6068 { 1504, 2, 1, 4, 93, 0, 1, 754, SystemZImpOpBase + 0, 0, 0x3b800ULL }, // Inst #1504 = LCGFR
6069 { 1503, 2, 1, 2, 434, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1503 = LCER
6070 { 1502, 2, 1, 4, 377, 0, 1, 699, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1502 = LCEBR
6071 { 1501, 2, 1, 2, 434, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1501 = LCDR
6072 { 1500, 2, 1, 4, 378, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1500 = LCDFR_32
6073 { 1499, 2, 1, 4, 378, 0, 0, 1185, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1499 = LCDFR_16
6074 { 1498, 2, 1, 4, 378, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1498 = LCDFR
6075 { 1497, 2, 1, 4, 377, 0, 1, 671, SystemZImpOpBase + 0, 0, 0x3fc00ULL }, // Inst #1497 = LCDBR
6076 { 1496, 2, 0, 4, 861, 0, 1, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1496 = LCCTL
6077 { 1495, 5, 1, 6, 34, 0, 1, 1180, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #1495 = LCBB
6078 { 1494, 2, 1, 4, 57, 0, 0, 855, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1494 = LBR
6079 { 1493, 4, 1, 6, 61, 0, 0, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1493 = LBH
6080 { 1492, 2, 0, 4, 796, 0, 0, 715, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1492 = LBEAR
6081 { 1491, 4, 1, 6, 61, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1491 = LB
6082 { 1490, 4, 1, 6, 86, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xcULL }, // Inst #1490 = LAY
6083 { 1489, 4, 1, 6, 274, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1489 = LAXG
6084 { 1488, 4, 1, 6, 274, 0, 1, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1488 = LAX
6085 { 1487, 4, 1, 6, 43, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1487 = LAT
6086 { 1486, 4, 0, 6, 823, 0, 1, 1176, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1486 = LASP
6087 { 1485, 2, 1, 6, 86, 0, 0, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1485 = LARL
6088 { 1484, 4, 1, 6, 273, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1484 = LAOG
6089 { 1483, 4, 1, 6, 273, 0, 1, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1483 = LAO
6090 { 1482, 4, 1, 6, 272, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1482 = LANG
6091 { 1481, 4, 1, 6, 272, 0, 1, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1481 = LAN
6092 { 1480, 4, 2, 6, 317, 0, 0, 1172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1480 = LAMY
6093 { 1479, 4, 2, 4, 317, 0, 0, 1172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1479 = LAM
6094 { 1478, 4, 1, 6, 316, 0, 0, 161, SystemZImpOpBase + 0, 0, 0xcULL }, // Inst #1478 = LAEY
6095 { 1477, 4, 1, 4, 316, 0, 0, 161, SystemZImpOpBase + 0, 0, 0x8ULL }, // Inst #1477 = LAE
6096 { 1476, 4, 1, 6, 271, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1476 = LAALG
6097 { 1475, 4, 1, 6, 271, 0, 1, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1475 = LAAL
6098 { 1474, 4, 1, 6, 270, 0, 1, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1474 = LAAG
6099 { 1473, 4, 1, 6, 270, 0, 1, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1473 = LAA
6100 { 1472, 4, 1, 4, 86, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL }, // Inst #1472 = LA
6101 { 1471, 4, 1, 4, 33, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1471 = L
6102 { 1470, 2, 0, 4, 526, 1, 1, 713, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1470 = KXTR
6103 { 1469, 2, 0, 4, 409, 1, 1, 713, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1469 = KXBR
6104 { 1468, 4, 2, 4, 923, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1468 = KMO
6105 { 1467, 4, 2, 4, 923, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1467 = KMF
6106 { 1466, 6, 3, 4, 923, 2, 1, 1166, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1466 = KMCTR
6107 { 1465, 4, 2, 4, 923, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1465 = KMC
6108 { 1464, 3, 1, 4, 916, 2, 1, 1158, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1464 = KMAC
6109 { 1463, 6, 3, 4, 294, 2, 1, 1166, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1463 = KMA
6110 { 1462, 4, 2, 4, 923, 2, 1, 834, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1462 = KM
6111 { 1461, 5, 2, 4, 295, 2, 1, 1161, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1461 = KLMDOpt
6112 { 1460, 3, 1, 4, 916, 2, 1, 1158, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1460 = KLMD
6113 { 1459, 5, 2, 4, 295, 2, 1, 1161, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1459 = KIMDOpt
6114 { 1458, 3, 1, 4, 916, 2, 1, 1158, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1458 = KIMD
6115 { 1457, 2, 0, 4, 408, 1, 1, 699, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1457 = KEBR
6116 { 1456, 4, 0, 6, 407, 1, 1, 695, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #1456 = KEB
6117 { 1455, 2, 0, 4, 525, 1, 1, 671, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1455 = KDTR
6118 { 1454, 3, 1, 4, 874, 2, 1, 1158, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1454 = KDSA
6119 { 1453, 2, 0, 4, 408, 1, 1, 671, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1453 = KDBR
6120 { 1452, 4, 0, 6, 407, 1, 1, 667, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #1452 = KDB
6121 { 1451, 1, 0, 4, 873, 0, 0, 262, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1451 = JNOP
6122 { 1450, 1, 0, 6, 873, 0, 0, 262, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1450 = JGNOP
6123 { 1449, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1449 = JGAsmZ
6124 { 1448, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1448 = JGAsmP
6125 { 1447, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1447 = JGAsmO
6126 { 1446, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1446 = JGAsmNZ
6127 { 1445, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1445 = JGAsmNP
6128 { 1444, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1444 = JGAsmNO
6129 { 1443, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1443 = JGAsmNM
6130 { 1442, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1442 = JGAsmNLH
6131 { 1441, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1441 = JGAsmNLE
6132 { 1440, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1440 = JGAsmNL
6133 { 1439, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1439 = JGAsmNHE
6134 { 1438, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1438 = JGAsmNH
6135 { 1437, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1437 = JGAsmNE
6136 { 1436, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1436 = JGAsmM
6137 { 1435, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1435 = JGAsmLH
6138 { 1434, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1434 = JGAsmLE
6139 { 1433, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1433 = JGAsmL
6140 { 1432, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1432 = JGAsmHE
6141 { 1431, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1431 = JGAsmH
6142 { 1430, 1, 0, 6, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1430 = JGAsmE
6143 { 1429, 1, 0, 6, 3, 0, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1429 = JG
6144 { 1428, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1428 = JAsmZ
6145 { 1427, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1427 = JAsmP
6146 { 1426, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1426 = JAsmO
6147 { 1425, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1425 = JAsmNZ
6148 { 1424, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1424 = JAsmNP
6149 { 1423, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1423 = JAsmNO
6150 { 1422, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1422 = JAsmNM
6151 { 1421, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1421 = JAsmNLH
6152 { 1420, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1420 = JAsmNLE
6153 { 1419, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1419 = JAsmNL
6154 { 1418, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1418 = JAsmNHE
6155 { 1417, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1417 = JAsmNH
6156 { 1416, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1416 = JAsmNE
6157 { 1415, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1415 = JAsmM
6158 { 1414, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1414 = JAsmLH
6159 { 1413, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1413 = JAsmLE
6160 { 1412, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1412 = JAsmL
6161 { 1411, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1411 = JAsmHE
6162 { 1410, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1410 = JAsmH
6163 { 1409, 1, 0, 4, 3, 1, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1409 = JAsmE
6164 { 1408, 1, 0, 4, 3, 0, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1408 = J
6165 { 1407, 5, 0, 6, 346, 0, 0, 1153, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1407 = InsnVSI
6166 { 1406, 6, 0, 6, 346, 0, 0, 1147, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1406 = InsnVRX
6167 { 1405, 6, 0, 6, 346, 0, 0, 1141, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1405 = InsnVRV
6168 { 1404, 6, 0, 6, 346, 0, 0, 1135, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1404 = InsnVRS
6169 { 1403, 7, 0, 6, 346, 0, 0, 1128, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1403 = InsnVRR
6170 { 1402, 6, 0, 6, 346, 0, 0, 1122, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1402 = InsnVRI
6171 { 1401, 6, 0, 6, 346, 0, 0, 1116, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1401 = InsnSSF
6172 { 1400, 5, 0, 6, 346, 0, 0, 1111, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1400 = InsnSSE
6173 { 1399, 7, 0, 6, 346, 0, 0, 1104, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1399 = InsnSS
6174 { 1398, 4, 0, 6, 346, 0, 0, 1100, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1398 = InsnSIY
6175 { 1397, 4, 0, 6, 346, 0, 0, 1100, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1397 = InsnSIL
6176 { 1396, 4, 0, 4, 346, 0, 0, 1100, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1396 = InsnSI
6177 { 1395, 3, 0, 4, 346, 0, 0, 1097, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1395 = InsnS
6178 { 1394, 5, 0, 6, 346, 0, 0, 1086, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1394 = InsnRXY
6179 { 1393, 6, 0, 6, 346, 0, 0, 1091, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1393 = InsnRXF
6180 { 1392, 5, 0, 6, 346, 0, 0, 1086, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1392 = InsnRXE
6181 { 1391, 5, 0, 4, 346, 0, 0, 1086, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1391 = InsnRX
6182 { 1390, 5, 0, 6, 346, 0, 0, 1081, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1390 = InsnRSY
6183 { 1389, 4, 0, 4, 346, 0, 0, 1054, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1389 = InsnRSI
6184 { 1388, 5, 0, 6, 346, 0, 0, 1081, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1388 = InsnRSE
6185 { 1387, 5, 0, 4, 346, 0, 0, 1081, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1387 = InsnRS
6186 { 1386, 6, 0, 6, 346, 0, 0, 1075, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1386 = InsnRRS
6187 { 1385, 5, 0, 4, 346, 0, 0, 1070, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1385 = InsnRRF
6188 { 1384, 3, 0, 4, 346, 0, 0, 1067, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1384 = InsnRRE
6189 { 1383, 3, 0, 2, 346, 0, 0, 1067, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1383 = InsnRR
6190 { 1382, 6, 0, 6, 346, 0, 0, 1061, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1382 = InsnRIS
6191 { 1381, 3, 0, 6, 346, 0, 0, 1051, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1381 = InsnRILU
6192 { 1380, 3, 0, 6, 346, 0, 0, 1058, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1380 = InsnRIL
6193 { 1379, 4, 0, 6, 346, 0, 0, 1054, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1379 = InsnRIE
6194 { 1378, 3, 0, 4, 346, 0, 0, 1051, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1378 = InsnRI
6195 { 1377, 1, 0, 2, 346, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1377 = InsnE
6196 { 1376, 3, 1, 4, 799, 0, 0, 611, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1376 = IVSK
6197 { 1375, 3, 1, 4, 798, 0, 0, 611, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1375 = ISKE
6198 { 1374, 2, 1, 4, 802, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1374 = IRBM
6199 { 1373, 2, 0, 4, 807, 0, 0, 754, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1373 = IPTEOptOpt
6200 { 1372, 3, 0, 4, 807, 0, 0, 1048, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1372 = IPTEOpt
6201 { 1371, 4, 0, 4, 807, 0, 0, 1044, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1371 = IPTE
6202 { 1370, 1, 1, 4, 319, 1, 0, 992, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1370 = IPM
6203 { 1369, 0, 0, 4, 784, 1, 1, 1, SystemZImpOpBase + 51, 0, 0x0ULL }, // Inst #1369 = IPK
6204 { 1368, 3, 1, 4, 103, 0, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1368 = IILL
6205 { 1367, 3, 1, 4, 102, 0, 0, 545, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1367 = IILH
6206 { 1366, 2, 1, 6, 101, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1366 = IILF
6207 { 1365, 3, 1, 4, 100, 0, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1365 = IIHL
6208 { 1364, 3, 1, 4, 99, 0, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1364 = IIHH
6209 { 1363, 2, 1, 6, 98, 0, 0, 816, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1363 = IIHF
6210 { 1362, 3, 1, 4, 524, 0, 0, 1041, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1362 = IEXTR
6211 { 1361, 3, 1, 4, 523, 0, 0, 1038, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1361 = IEDTR
6212 { 1360, 3, 0, 4, 808, 0, 0, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1360 = IDTEOpt
6213 { 1359, 4, 0, 4, 808, 0, 0, 1034, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1359 = IDTE
6214 { 1358, 5, 1, 6, 94, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1358 = ICY
6215 { 1357, 5, 1, 6, 96, 0, 1, 1024, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1357 = ICMY
6216 { 1356, 5, 1, 6, 96, 0, 1, 1029, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1356 = ICMH
6217 { 1355, 5, 1, 4, 96, 0, 1, 1024, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1355 = ICM
6218 { 1354, 5, 1, 6, 95, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1354 = IC32Y
6219 { 1353, 5, 1, 4, 95, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1353 = IC32
6220 { 1352, 5, 1, 4, 94, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1352 = IC
6221 { 1351, 1, 1, 4, 788, 0, 0, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1351 = IAC
6222 { 1350, 0, 0, 4, 865, 1, 1, 1, SystemZImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1350 = HSCH
6223 { 1349, 2, 1, 2, 436, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1349 = HER
6224 { 1348, 2, 1, 2, 436, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1348 = HDR
6225 { 1347, 2, 1, 4, 333, 0, 1, 170, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1347 = FLOGR
6226 { 1346, 4, 1, 4, 504, 1, 0, 1020, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1346 = FIXTR
6227 { 1345, 2, 1, 4, 442, 0, 0, 713, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1345 = FIXR
6228 { 1344, 4, 1, 4, 385, 1, 0, 1020, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1344 = FIXBRA
6229 { 1343, 3, 1, 4, 385, 1, 0, 1017, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1343 = FIXBR
6230 { 1342, 2, 1, 4, 441, 0, 0, 699, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1342 = FIER
6231 { 1341, 4, 1, 4, 384, 1, 0, 1013, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1341 = FIEBRA
6232 { 1340, 3, 1, 4, 384, 1, 0, 1010, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1340 = FIEBR
6233 { 1339, 4, 1, 4, 503, 1, 0, 1006, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1339 = FIDTR
6234 { 1338, 2, 1, 4, 441, 0, 0, 671, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1338 = FIDR
6235 { 1337, 4, 1, 4, 384, 1, 0, 1006, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1337 = FIDBRA
6236 { 1336, 3, 1, 4, 384, 1, 0, 1003, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1336 = FIDBR
6237 { 1335, 2, 0, 6, 345, 0, 0, 1001, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1335 = EXRL
6238 { 1334, 4, 0, 4, 345, 0, 0, 997, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1334 = EX
6239 { 1333, 1, 1, 4, 329, 0, 0, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1333 = ETND
6240 { 1332, 2, 1, 4, 508, 0, 0, 990, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1332 = ESXTR
6241 { 1331, 2, 1, 4, 833, 0, 1, 995, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1331 = ESTA
6242 { 1330, 2, 1, 4, 794, 0, 0, 993, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1330 = ESEA
6243 { 1329, 2, 1, 4, 507, 0, 0, 941, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1329 = ESDTR
6244 { 1328, 1, 1, 4, 792, 0, 0, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1328 = ESAR
6245 { 1327, 1, 1, 4, 792, 0, 0, 304, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1327 = ESAIR
6246 { 1326, 2, 0, 4, 832, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1326 = EREGG
6247 { 1325, 2, 0, 4, 832, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1325 = EREG
6248 { 1324, 2, 2, 4, 782, 1, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1324 = EPSW
6249 { 1323, 2, 1, 4, 860, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1323 = EPCTR
6250 { 1322, 1, 1, 4, 792, 0, 0, 992, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1322 = EPAR
6251 { 1321, 1, 1, 4, 792, 0, 0, 304, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1321 = EPAIR
6252 { 1320, 1, 1, 4, 412, 1, 0, 992, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1320 = EFPC
6253 { 1319, 2, 1, 4, 506, 0, 0, 990, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1319 = EEXTR
6254 { 1318, 2, 1, 4, 505, 0, 0, 941, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1318 = EEDTR
6255 { 1317, 5, 0, 6, 314, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1317 = EDMK
6256 { 1316, 5, 0, 6, 314, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1316 = ED
6257 { 1315, 5, 0, 6, 846, 0, 2, 928, SystemZImpOpBase + 49, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1315 = ECTG
6258 { 1314, 2, 1, 4, 859, 0, 1, 988, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1314 = ECPGA
6259 { 1313, 2, 1, 4, 860, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1313 = ECCTR
6260 { 1312, 4, 1, 6, 845, 0, 0, 984, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1312 = ECAG
6261 { 1311, 2, 1, 4, 315, 0, 0, 982, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1311 = EAR
6262 { 1310, 4, 1, 4, 516, 1, 0, 586, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1310 = DXTRA
6263 { 1309, 3, 1, 4, 516, 1, 0, 583, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1309 = DXTR
6264 { 1308, 3, 1, 4, 468, 0, 0, 580, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1308 = DXR
6265 { 1307, 3, 1, 4, 405, 1, 0, 580, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1307 = DXBR
6266 { 1306, 3, 1, 4, 204, 0, 0, 925, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1306 = DSGR
6267 { 1305, 3, 1, 4, 204, 0, 0, 979, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1305 = DSGFR
6268 { 1304, 5, 1, 6, 205, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1304 = DSGF
6269 { 1303, 5, 1, 6, 205, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1303 = DSG
6270 { 1302, 3, 1, 2, 202, 0, 0, 979, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1302 = DR
6271 { 1301, 6, 0, 6, 310, 0, 0, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1301 = DP
6272 { 1300, 3, 1, 4, 206, 0, 0, 979, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1300 = DLR
6273 { 1299, 3, 1, 4, 207, 0, 0, 925, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1299 = DLGR
6274 { 1298, 5, 1, 6, 208, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1298 = DLG
6275 { 1297, 5, 1, 6, 208, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1297 = DL
6276 { 1296, 5, 2, 4, 406, 1, 1, 974, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1296 = DIEBR
6277 { 1295, 5, 2, 4, 406, 1, 1, 969, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1295 = DIDBR
6278 { 1294, 4, 0, 4, 852, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1294 = DIAG
6279 { 1293, 5, 2, 4, 343, 2, 1, 964, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1293 = DFLTCC
6280 { 1292, 3, 1, 2, 466, 0, 0, 542, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1292 = DER
6281 { 1291, 3, 1, 4, 403, 1, 0, 542, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1291 = DEBR
6282 { 1290, 5, 1, 6, 401, 1, 0, 537, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1290 = DEB
6283 { 1289, 5, 1, 4, 464, 0, 0, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1289 = DE
6284 { 1288, 4, 1, 4, 515, 1, 0, 533, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1288 = DDTRA
6285 { 1287, 3, 1, 4, 515, 1, 0, 530, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1287 = DDTR
6286 { 1286, 3, 1, 2, 467, 0, 0, 527, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1286 = DDR
6287 { 1285, 3, 1, 4, 404, 1, 0, 527, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1285 = DDBR
6288 { 1284, 5, 1, 6, 402, 1, 0, 522, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1284 = DDB
6289 { 1283, 5, 1, 4, 465, 0, 0, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1283 = DD
6290 { 1282, 5, 1, 4, 203, 0, 0, 959, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x88ULL }, // Inst #1282 = D
6291 { 1281, 5, 0, 6, 497, 0, 0, 908, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1281 = CZXT
6292 { 1280, 5, 0, 6, 496, 0, 0, 685, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1280 = CZDT
6293 { 1279, 4, 0, 6, 220, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #1279 = CY
6294 { 1278, 5, 1, 6, 495, 0, 0, 908, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1278 = CXZT
6295 { 1277, 2, 1, 4, 491, 0, 0, 957, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1277 = CXUTR
6296 { 1276, 2, 0, 4, 526, 1, 1, 713, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1276 = CXTR
6297 { 1275, 2, 1, 4, 491, 0, 0, 957, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1275 = CXSTR
6298 { 1274, 2, 0, 4, 471, 0, 1, 713, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1274 = CXR
6299 { 1273, 5, 1, 6, 499, 0, 0, 908, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1273 = CXPT
6300 { 1272, 4, 1, 4, 485, 1, 0, 953, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1272 = CXLGTR
6301 { 1271, 4, 1, 4, 370, 1, 0, 953, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1271 = CXLGBR
6302 { 1270, 4, 1, 4, 484, 1, 0, 947, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1270 = CXLFTR
6303 { 1269, 4, 1, 4, 370, 1, 0, 947, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1269 = CXLFBR
6304 { 1268, 4, 1, 4, 481, 1, 0, 953, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1268 = CXGTRA
6305 { 1267, 2, 1, 4, 481, 1, 0, 951, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1267 = CXGTR
6306 { 1266, 2, 1, 4, 429, 0, 0, 951, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1266 = CXGR
6307 { 1265, 4, 1, 4, 368, 1, 0, 953, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1265 = CXGBRA
6308 { 1264, 2, 1, 4, 368, 1, 0, 951, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1264 = CXGBR
6309 { 1263, 4, 1, 4, 480, 1, 0, 947, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #1263 = CXFTR
6310 { 1262, 2, 1, 4, 429, 0, 0, 945, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1262 = CXFR
6311 { 1261, 4, 1, 4, 368, 1, 0, 947, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1261 = CXFBRA
6312 { 1260, 2, 1, 4, 368, 1, 0, 945, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1260 = CXFBR
6313 { 1259, 2, 0, 4, 409, 1, 1, 713, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1259 = CXBR
6314 { 1258, 4, 0, 6, 303, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #1258 = CVDY
6315 { 1257, 4, 0, 6, 302, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #1257 = CVDG
6316 { 1256, 4, 0, 4, 303, 0, 0, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x88ULL }, // Inst #1256 = CVD
6317 { 1255, 5, 1, 6, 301, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1255 = CVBY
6318 { 1254, 5, 1, 6, 300, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1254 = CVBG
6319 { 1253, 5, 1, 4, 301, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1253 = CVB
6320 { 1252, 2, 1, 4, 493, 0, 0, 943, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1252 = CUXTR
6321 { 1251, 4, 2, 4, 293, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1251 = CUUTFOpt
6322 { 1250, 5, 2, 4, 293, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1250 = CUUTF
6323 { 1249, 4, 2, 4, 293, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1249 = CUTFUOpt
6324 { 1248, 5, 2, 4, 293, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1248 = CUTFU
6325 { 1247, 4, 2, 4, 337, 2, 1, 834, SystemZImpOpBase + 46, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1247 = CUSE
6326 { 1246, 2, 1, 4, 492, 0, 0, 941, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1246 = CUDTR
6327 { 1245, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1245 = CU42
6328 { 1244, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1244 = CU41
6329 { 1243, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1243 = CU24Opt
6330 { 1242, 5, 2, 4, 292, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1242 = CU24
6331 { 1241, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1241 = CU21Opt
6332 { 1240, 5, 2, 4, 292, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1240 = CU21
6333 { 1239, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1239 = CU14Opt
6334 { 1238, 5, 2, 4, 292, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1238 = CU14
6335 { 1237, 4, 2, 4, 292, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1237 = CU12Opt
6336 { 1236, 5, 2, 4, 292, 0, 1, 936, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1236 = CU12
6337 { 1235, 2, 1, 4, 332, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1235 = CTZG
6338 { 1234, 5, 1, 6, 276, 0, 1, 643, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1234 = CSY
6339 { 1233, 3, 1, 4, 493, 0, 0, 933, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1233 = CSXTR
6340 { 1232, 5, 0, 6, 279, 2, 1, 928, SystemZImpOpBase + 43, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1232 = CSST
6341 { 1231, 3, 1, 4, 812, 0, 1, 925, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1231 = CSPG
6342 { 1230, 3, 1, 4, 812, 0, 1, 925, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1230 = CSP
6343 { 1229, 5, 1, 6, 276, 0, 1, 648, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1229 = CSG
6344 { 1228, 3, 1, 4, 492, 0, 0, 922, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1228 = CSDTR
6345 { 1227, 0, 0, 4, 865, 1, 1, 1, SystemZImpOpBase + 41, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1227 = CSCH
6346 { 1226, 5, 1, 4, 276, 0, 1, 643, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1226 = CS
6347 { 1225, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1225 = CRTAsmNLH
6348 { 1224, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1224 = CRTAsmNLE
6349 { 1223, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1223 = CRTAsmNL
6350 { 1222, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1222 = CRTAsmNHE
6351 { 1221, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1221 = CRTAsmNH
6352 { 1220, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1220 = CRTAsmNE
6353 { 1219, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1219 = CRTAsmLH
6354 { 1218, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1218 = CRTAsmLE
6355 { 1217, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1217 = CRTAsmL
6356 { 1216, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1216 = CRTAsmHE
6357 { 1215, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1215 = CRTAsmH
6358 { 1214, 2, 0, 4, 14, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1214 = CRTAsmE
6359 { 1213, 3, 0, 4, 14, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1213 = CRTAsm
6360 { 1212, 3, 0, 4, 14, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1212 = CRT
6361 { 1211, 2, 0, 6, 221, 0, 1, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #1211 = CRL
6362 { 1210, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1210 = CRJAsmNLH
6363 { 1209, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1209 = CRJAsmNLE
6364 { 1208, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1208 = CRJAsmNL
6365 { 1207, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1207 = CRJAsmNHE
6366 { 1206, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1206 = CRJAsmNH
6367 { 1205, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1205 = CRJAsmNE
6368 { 1204, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1204 = CRJAsmLH
6369 { 1203, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1203 = CRJAsmLE
6370 { 1202, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1202 = CRJAsmL
6371 { 1201, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1201 = CRJAsmHE
6372 { 1200, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1200 = CRJAsmH
6373 { 1199, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1199 = CRJAsmE
6374 { 1198, 4, 0, 6, 11, 0, 1, 866, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1198 = CRJAsm
6375 { 1197, 4, 0, 6, 11, 0, 1, 866, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1197 = CRJ
6376 { 1196, 3, 0, 4, 810, 0, 1, 919, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1196 = CRDTEOpt
6377 { 1195, 4, 0, 4, 810, 0, 1, 915, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1195 = CRDTE
6378 { 1194, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1194 = CRBAsmNLH
6379 { 1193, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1193 = CRBAsmNLE
6380 { 1192, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1192 = CRBAsmNL
6381 { 1191, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1191 = CRBAsmNHE
6382 { 1190, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1190 = CRBAsmNH
6383 { 1189, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1189 = CRBAsmNE
6384 { 1188, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1188 = CRBAsmLH
6385 { 1187, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1187 = CRBAsmLE
6386 { 1186, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1186 = CRBAsmL
6387 { 1185, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1185 = CRBAsmHE
6388 { 1184, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1184 = CRBAsmH
6389 { 1183, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1183 = CRBAsmE
6390 { 1182, 5, 0, 6, 12, 0, 0, 857, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1182 = CRBAsm
6391 { 1181, 5, 0, 6, 12, 0, 0, 857, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1181 = CRB
6392 { 1180, 2, 0, 2, 225, 0, 1, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #1180 = CR
6393 { 1179, 2, 1, 4, 315, 0, 0, 913, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1179 = CPYA
6394 { 1178, 5, 0, 6, 501, 0, 0, 908, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1178 = CPXT
6395 { 1177, 3, 1, 4, 355, 0, 0, 905, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1177 = CPSDRss
6396 { 1176, 3, 1, 4, 355, 0, 0, 902, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1176 = CPSDRsh
6397 { 1175, 3, 1, 4, 355, 0, 0, 899, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1175 = CPSDRsd
6398 { 1174, 3, 1, 4, 355, 0, 0, 896, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1174 = CPSDRhs
6399 { 1173, 3, 1, 4, 355, 0, 0, 893, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1173 = CPSDRhh
6400 { 1172, 3, 1, 4, 355, 0, 0, 890, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1172 = CPSDRhd
6401 { 1171, 3, 1, 4, 355, 0, 0, 887, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1171 = CPSDRds
6402 { 1170, 3, 1, 4, 355, 0, 0, 884, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1170 = CPSDRdh
6403 { 1169, 3, 1, 4, 355, 0, 0, 530, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1169 = CPSDRdd
6404 { 1168, 5, 0, 6, 500, 0, 0, 685, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1168 = CPDT
6405 { 1167, 6, 0, 6, 312, 0, 1, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1167 = CP
6406 { 1166, 4, 2, 4, 341, 2, 2, 834, SystemZImpOpBase + 37, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1166 = CMPSC
6407 { 1165, 2, 1, 4, 332, 0, 0, 593, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #1165 = CLZG
6408 { 1164, 4, 0, 6, 229, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1164 = CLY
6409 { 1163, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1163 = CLTAsmNLH
6410 { 1162, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1162 = CLTAsmNLE
6411 { 1161, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1161 = CLTAsmNL
6412 { 1160, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1160 = CLTAsmNHE
6413 { 1159, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1159 = CLTAsmNH
6414 { 1158, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1158 = CLTAsmNE
6415 { 1157, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1157 = CLTAsmLH
6416 { 1156, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1156 = CLTAsmLE
6417 { 1155, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1155 = CLTAsmL
6418 { 1154, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1154 = CLTAsmHE
6419 { 1153, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1153 = CLTAsmH
6420 { 1152, 3, 0, 6, 17, 0, 0, 881, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1152 = CLTAsmE
6421 { 1151, 4, 0, 6, 17, 0, 0, 877, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1151 = CLTAsm
6422 { 1150, 4, 0, 6, 17, 0, 0, 877, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1150 = CLT
6423 { 1149, 4, 2, 4, 257, 1, 1, 873, SystemZImpOpBase + 35, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1149 = CLST
6424 { 1148, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1148 = CLRTAsmNLH
6425 { 1147, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1147 = CLRTAsmNLE
6426 { 1146, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1146 = CLRTAsmNL
6427 { 1145, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1145 = CLRTAsmNHE
6428 { 1144, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1144 = CLRTAsmNH
6429 { 1143, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1143 = CLRTAsmNE
6430 { 1142, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1142 = CLRTAsmLH
6431 { 1141, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1141 = CLRTAsmLE
6432 { 1140, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1140 = CLRTAsmL
6433 { 1139, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1139 = CLRTAsmHE
6434 { 1138, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1138 = CLRTAsmH
6435 { 1137, 2, 0, 4, 15, 0, 0, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1137 = CLRTAsmE
6436 { 1136, 3, 0, 4, 15, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1136 = CLRTAsm
6437 { 1135, 3, 0, 4, 15, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1135 = CLRT
6438 { 1134, 2, 0, 6, 244, 0, 1, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1134 = CLRL
6439 { 1133, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1133 = CLRJAsmNLH
6440 { 1132, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1132 = CLRJAsmNLE
6441 { 1131, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1131 = CLRJAsmNL
6442 { 1130, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1130 = CLRJAsmNHE
6443 { 1129, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1129 = CLRJAsmNH
6444 { 1128, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1128 = CLRJAsmNE
6445 { 1127, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1127 = CLRJAsmLH
6446 { 1126, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1126 = CLRJAsmLE
6447 { 1125, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1125 = CLRJAsmL
6448 { 1124, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1124 = CLRJAsmHE
6449 { 1123, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1123 = CLRJAsmH
6450 { 1122, 3, 0, 6, 11, 0, 1, 870, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1122 = CLRJAsmE
6451 { 1121, 4, 0, 6, 11, 0, 1, 866, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1121 = CLRJAsm
6452 { 1120, 4, 0, 6, 11, 0, 1, 866, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1120 = CLRJ
6453 { 1119, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1119 = CLRBAsmNLH
6454 { 1118, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1118 = CLRBAsmNLE
6455 { 1117, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1117 = CLRBAsmNL
6456 { 1116, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1116 = CLRBAsmNHE
6457 { 1115, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1115 = CLRBAsmNH
6458 { 1114, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1114 = CLRBAsmNE
6459 { 1113, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1113 = CLRBAsmLH
6460 { 1112, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1112 = CLRBAsmLE
6461 { 1111, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1111 = CLRBAsmL
6462 { 1110, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1110 = CLRBAsmHE
6463 { 1109, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1109 = CLRBAsmH
6464 { 1108, 4, 0, 6, 12, 0, 0, 862, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1108 = CLRBAsmE
6465 { 1107, 5, 0, 6, 12, 0, 0, 857, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1107 = CLRBAsm
6466 { 1106, 5, 0, 6, 12, 0, 0, 857, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1106 = CLRB
6467 { 1105, 2, 0, 2, 243, 0, 1, 855, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1105 = CLR
6468 { 1104, 4, 0, 6, 264, 0, 1, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1104 = CLMY
6469 { 1103, 4, 0, 6, 264, 0, 1, 851, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1103 = CLMH
6470 { 1102, 4, 0, 4, 264, 0, 1, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1102 = CLM
6471 { 1101, 3, 0, 6, 242, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103804ULL }, // Inst #1101 = CLIY
6472 { 1100, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1100 = CLIJAsmNLH
6473 { 1099, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1099 = CLIJAsmNLE
6474 { 1098, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1098 = CLIJAsmNL
6475 { 1097, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1097 = CLIJAsmNHE
6476 { 1096, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1096 = CLIJAsmNH
6477 { 1095, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1095 = CLIJAsmNE
6478 { 1094, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1094 = CLIJAsmLH
6479 { 1093, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1093 = CLIJAsmLE
6480 { 1092, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1092 = CLIJAsmL
6481 { 1091, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1091 = CLIJAsmHE
6482 { 1090, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1090 = CLIJAsmH
6483 { 1089, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1089 = CLIJAsmE
6484 { 1088, 4, 0, 6, 11, 0, 1, 818, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1088 = CLIJAsm
6485 { 1087, 4, 0, 6, 11, 0, 1, 818, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1087 = CLIJ
6486 { 1086, 2, 0, 6, 241, 0, 1, 816, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1086 = CLIH
6487 { 1085, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1085 = CLIBAsmNLH
6488 { 1084, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1084 = CLIBAsmNLE
6489 { 1083, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1083 = CLIBAsmNL
6490 { 1082, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1082 = CLIBAsmNHE
6491 { 1081, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1081 = CLIBAsmNH
6492 { 1080, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1080 = CLIBAsmNE
6493 { 1079, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1079 = CLIBAsmLH
6494 { 1078, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1078 = CLIBAsmLE
6495 { 1077, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1077 = CLIBAsmL
6496 { 1076, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1076 = CLIBAsmHE
6497 { 1075, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1075 = CLIBAsmH
6498 { 1074, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1074 = CLIBAsmE
6499 { 1073, 5, 0, 6, 12, 0, 0, 807, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1073 = CLIBAsm
6500 { 1072, 5, 0, 6, 12, 0, 0, 807, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1072 = CLIB
6501 { 1071, 3, 0, 4, 242, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1071 = CLI
6502 { 1070, 2, 0, 6, 240, 0, 1, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1070 = CLHRL
6503 { 1069, 2, 0, 4, 246, 0, 1, 803, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1069 = CLHLR
6504 { 1068, 3, 0, 6, 240, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1068 = CLHHSI
6505 { 1067, 2, 0, 4, 245, 0, 1, 801, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1067 = CLHHR
6506 { 1066, 4, 0, 6, 239, 0, 1, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1066 = CLHF
6507 { 1065, 4, 1, 4, 489, 1, 1, 793, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #1065 = CLGXTR
6508 { 1064, 4, 1, 4, 376, 1, 1, 793, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1064 = CLGXBR
6509 { 1063, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1063 = CLGTAsmNLH
6510 { 1062, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1062 = CLGTAsmNLE
6511 { 1061, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1061 = CLGTAsmNL
6512 { 1060, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1060 = CLGTAsmNHE
6513 { 1059, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1059 = CLGTAsmNH
6514 { 1058, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1058 = CLGTAsmNE
6515 { 1057, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1057 = CLGTAsmLH
6516 { 1056, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1056 = CLGTAsmLE
6517 { 1055, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1055 = CLGTAsmL
6518 { 1054, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1054 = CLGTAsmHE
6519 { 1053, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1053 = CLGTAsmH
6520 { 1052, 3, 0, 6, 17, 0, 0, 848, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1052 = CLGTAsmE
6521 { 1051, 4, 0, 6, 17, 0, 0, 844, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1051 = CLGTAsm
6522 { 1050, 4, 0, 6, 17, 0, 0, 844, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1050 = CLGT
6523 { 1049, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1049 = CLGRTAsmNLH
6524 { 1048, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1048 = CLGRTAsmNLE
6525 { 1047, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1047 = CLGRTAsmNL
6526 { 1046, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1046 = CLGRTAsmNHE
6527 { 1045, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1045 = CLGRTAsmNH
6528 { 1044, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1044 = CLGRTAsmNE
6529 { 1043, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1043 = CLGRTAsmLH
6530 { 1042, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1042 = CLGRTAsmLE
6531 { 1041, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1041 = CLGRTAsmL
6532 { 1040, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1040 = CLGRTAsmHE
6533 { 1039, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1039 = CLGRTAsmH
6534 { 1038, 2, 0, 4, 15, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1038 = CLGRTAsmE
6535 { 1037, 3, 0, 4, 15, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1037 = CLGRTAsm
6536 { 1036, 3, 0, 4, 15, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1036 = CLGRT
6537 { 1035, 2, 0, 6, 238, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1035 = CLGRL
6538 { 1034, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1034 = CLGRJAsmNLH
6539 { 1033, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1033 = CLGRJAsmNLE
6540 { 1032, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1032 = CLGRJAsmNL
6541 { 1031, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1031 = CLGRJAsmNHE
6542 { 1030, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1030 = CLGRJAsmNH
6543 { 1029, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1029 = CLGRJAsmNE
6544 { 1028, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1028 = CLGRJAsmLH
6545 { 1027, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1027 = CLGRJAsmLE
6546 { 1026, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1026 = CLGRJAsmL
6547 { 1025, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1025 = CLGRJAsmHE
6548 { 1024, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1024 = CLGRJAsmH
6549 { 1023, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1023 = CLGRJAsmE
6550 { 1022, 4, 0, 6, 11, 0, 1, 783, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1022 = CLGRJAsm
6551 { 1021, 4, 0, 6, 11, 0, 1, 783, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1021 = CLGRJ
6552 { 1020, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1020 = CLGRBAsmNLH
6553 { 1019, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1019 = CLGRBAsmNLE
6554 { 1018, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1018 = CLGRBAsmNL
6555 { 1017, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1017 = CLGRBAsmNHE
6556 { 1016, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1016 = CLGRBAsmNH
6557 { 1015, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1015 = CLGRBAsmNE
6558 { 1014, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1014 = CLGRBAsmLH
6559 { 1013, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1013 = CLGRBAsmLE
6560 { 1012, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1012 = CLGRBAsmL
6561 { 1011, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1011 = CLGRBAsmHE
6562 { 1010, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1010 = CLGRBAsmH
6563 { 1009, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1009 = CLGRBAsmE
6564 { 1008, 5, 0, 6, 12, 0, 0, 774, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1008 = CLGRBAsm
6565 { 1007, 5, 0, 6, 12, 0, 0, 774, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1007 = CLGRB
6566 { 1006, 2, 0, 4, 237, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1006 = CLGR
6567 { 1005, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1005 = CLGITAsmNLH
6568 { 1004, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1004 = CLGITAsmNLE
6569 { 1003, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1003 = CLGITAsmNL
6570 { 1002, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1002 = CLGITAsmNHE
6571 { 1001, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1001 = CLGITAsmNH
6572 { 1000, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1000 = CLGITAsmNE
6573 { 999, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #999 = CLGITAsmLH
6574 { 998, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #998 = CLGITAsmLE
6575 { 997, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #997 = CLGITAsmL
6576 { 996, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #996 = CLGITAsmHE
6577 { 995, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #995 = CLGITAsmH
6578 { 994, 2, 0, 6, 16, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #994 = CLGITAsmE
6579 { 993, 3, 0, 6, 16, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #993 = CLGITAsm
6580 { 992, 3, 0, 6, 16, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #992 = CLGIT
6581 { 991, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #991 = CLGIJAsmNLH
6582 { 990, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #990 = CLGIJAsmNLE
6583 { 989, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #989 = CLGIJAsmNL
6584 { 988, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #988 = CLGIJAsmNHE
6585 { 987, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #987 = CLGIJAsmNH
6586 { 986, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #986 = CLGIJAsmNE
6587 { 985, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #985 = CLGIJAsmLH
6588 { 984, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #984 = CLGIJAsmLE
6589 { 983, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #983 = CLGIJAsmL
6590 { 982, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #982 = CLGIJAsmHE
6591 { 981, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #981 = CLGIJAsmH
6592 { 980, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #980 = CLGIJAsmE
6593 { 979, 4, 0, 6, 11, 0, 1, 767, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #979 = CLGIJAsm
6594 { 978, 4, 0, 6, 11, 0, 1, 767, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #978 = CLGIJ
6595 { 977, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #977 = CLGIBAsmNLH
6596 { 976, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #976 = CLGIBAsmNLE
6597 { 975, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #975 = CLGIBAsmNL
6598 { 974, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #974 = CLGIBAsmNHE
6599 { 973, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #973 = CLGIBAsmNH
6600 { 972, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #972 = CLGIBAsmNE
6601 { 971, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #971 = CLGIBAsmLH
6602 { 970, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #970 = CLGIBAsmLE
6603 { 969, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #969 = CLGIBAsmL
6604 { 968, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #968 = CLGIBAsmHE
6605 { 967, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #967 = CLGIBAsmH
6606 { 966, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #966 = CLGIBAsmE
6607 { 965, 5, 0, 6, 12, 0, 0, 758, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #965 = CLGIBAsm
6608 { 964, 5, 0, 6, 12, 0, 0, 758, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #964 = CLGIB
6609 { 963, 3, 0, 6, 233, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #963 = CLGHSI
6610 { 962, 2, 0, 6, 233, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #962 = CLGHRL
6611 { 961, 2, 0, 6, 235, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #961 = CLGFRL
6612 { 960, 2, 0, 4, 236, 0, 1, 754, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #960 = CLGFR
6613 { 959, 2, 0, 6, 236, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #959 = CLGFI
6614 { 958, 4, 0, 6, 234, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #958 = CLGF
6615 { 957, 4, 1, 4, 375, 1, 1, 750, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #957 = CLGEBR
6616 { 956, 4, 1, 4, 488, 1, 1, 743, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #956 = CLGDTR
6617 { 955, 4, 1, 4, 375, 1, 1, 743, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #955 = CLGDBR
6618 { 954, 4, 0, 6, 232, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL }, // Inst #954 = CLG
6619 { 953, 4, 1, 4, 489, 1, 1, 736, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #953 = CLFXTR
6620 { 952, 4, 1, 4, 376, 1, 1, 736, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #952 = CLFXBR
6621 { 951, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #951 = CLFITAsmNLH
6622 { 950, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #950 = CLFITAsmNLE
6623 { 949, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #949 = CLFITAsmNL
6624 { 948, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #948 = CLFITAsmNHE
6625 { 947, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #947 = CLFITAsmNH
6626 { 946, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #946 = CLFITAsmNE
6627 { 945, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #945 = CLFITAsmLH
6628 { 944, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #944 = CLFITAsmLE
6629 { 943, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #943 = CLFITAsmL
6630 { 942, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #942 = CLFITAsmHE
6631 { 941, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #941 = CLFITAsmH
6632 { 940, 2, 0, 6, 16, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #940 = CLFITAsmE
6633 { 939, 3, 0, 6, 16, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #939 = CLFITAsm
6634 { 938, 3, 0, 6, 16, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #938 = CLFIT
6635 { 937, 2, 0, 6, 231, 0, 1, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #937 = CLFI
6636 { 936, 3, 0, 6, 230, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #936 = CLFHSI
6637 { 935, 4, 1, 4, 373, 1, 1, 727, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #935 = CLFEBR
6638 { 934, 4, 1, 4, 488, 1, 1, 720, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #934 = CLFDTR
6639 { 933, 4, 1, 4, 374, 1, 1, 720, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #933 = CLFDBR
6640 { 932, 6, 2, 6, 256, 0, 1, 838, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #932 = CLCLU
6641 { 931, 6, 2, 4, 256, 0, 1, 838, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #931 = CLCLE
6642 { 930, 4, 2, 2, 256, 0, 1, 834, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #930 = CLCL
6643 { 929, 5, 0, 6, 255, 0, 1, 829, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #929 = CLC
6644 { 928, 4, 0, 4, 229, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL }, // Inst #928 = CL
6645 { 927, 4, 2, 4, 340, 0, 1, 825, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #927 = CKSM
6646 { 926, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #926 = CITAsmNLH
6647 { 925, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #925 = CITAsmNLE
6648 { 924, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #924 = CITAsmNL
6649 { 923, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #923 = CITAsmNHE
6650 { 922, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #922 = CITAsmNH
6651 { 921, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #921 = CITAsmNE
6652 { 920, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #920 = CITAsmLH
6653 { 919, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #919 = CITAsmLE
6654 { 918, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #918 = CITAsmL
6655 { 917, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #917 = CITAsmHE
6656 { 916, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #916 = CITAsmH
6657 { 915, 2, 0, 6, 14, 0, 0, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #915 = CITAsmE
6658 { 914, 3, 0, 6, 14, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #914 = CITAsm
6659 { 913, 3, 0, 6, 14, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #913 = CIT
6660 { 912, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #912 = CIJAsmNLH
6661 { 911, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #911 = CIJAsmNLE
6662 { 910, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #910 = CIJAsmNL
6663 { 909, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #909 = CIJAsmNHE
6664 { 908, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #908 = CIJAsmNH
6665 { 907, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #907 = CIJAsmNE
6666 { 906, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #906 = CIJAsmLH
6667 { 905, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #905 = CIJAsmLE
6668 { 904, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #904 = CIJAsmL
6669 { 903, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #903 = CIJAsmHE
6670 { 902, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #902 = CIJAsmH
6671 { 901, 3, 0, 6, 11, 0, 1, 822, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #901 = CIJAsmE
6672 { 900, 4, 0, 6, 11, 0, 1, 818, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #900 = CIJAsm
6673 { 899, 4, 0, 6, 11, 0, 1, 818, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #899 = CIJ
6674 { 898, 2, 0, 6, 226, 0, 1, 816, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #898 = CIH
6675 { 897, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #897 = CIBAsmNLH
6676 { 896, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #896 = CIBAsmNLE
6677 { 895, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #895 = CIBAsmNL
6678 { 894, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #894 = CIBAsmNHE
6679 { 893, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #893 = CIBAsmNH
6680 { 892, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #892 = CIBAsmNE
6681 { 891, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #891 = CIBAsmLH
6682 { 890, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #890 = CIBAsmLE
6683 { 889, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #889 = CIBAsmL
6684 { 888, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #888 = CIBAsmHE
6685 { 887, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #887 = CIBAsmH
6686 { 886, 4, 0, 6, 12, 0, 0, 812, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #886 = CIBAsmE
6687 { 885, 5, 0, 6, 12, 0, 0, 807, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #885 = CIBAsm
6688 { 884, 5, 0, 6, 12, 0, 0, 807, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #884 = CIB
6689 { 883, 4, 0, 6, 247, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #883 = CHY
6690 { 882, 3, 0, 6, 228, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #882 = CHSI
6691 { 881, 2, 0, 6, 248, 0, 1, 805, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #881 = CHRL
6692 { 880, 2, 0, 4, 246, 0, 1, 803, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #880 = CHLR
6693 { 879, 2, 0, 4, 222, 0, 1, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #879 = CHI
6694 { 878, 3, 0, 6, 251, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #878 = CHHSI
6695 { 877, 2, 0, 4, 245, 0, 1, 801, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #877 = CHHR
6696 { 876, 4, 0, 6, 227, 0, 1, 797, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #876 = CHF
6697 { 875, 4, 0, 4, 247, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL }, // Inst #875 = CH
6698 { 874, 4, 1, 4, 487, 1, 1, 793, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #874 = CGXTRA
6699 { 873, 3, 1, 4, 487, 1, 1, 790, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #873 = CGXTR
6700 { 872, 3, 1, 4, 431, 0, 1, 790, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #872 = CGXR
6701 { 871, 4, 1, 4, 372, 1, 1, 793, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #871 = CGXBRA
6702 { 870, 3, 1, 4, 372, 1, 1, 790, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #870 = CGXBR
6703 { 869, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #869 = CGRTAsmNLH
6704 { 868, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #868 = CGRTAsmNLE
6705 { 867, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #867 = CGRTAsmNL
6706 { 866, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #866 = CGRTAsmNHE
6707 { 865, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #865 = CGRTAsmNH
6708 { 864, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #864 = CGRTAsmNE
6709 { 863, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #863 = CGRTAsmLH
6710 { 862, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #862 = CGRTAsmLE
6711 { 861, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #861 = CGRTAsmL
6712 { 860, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #860 = CGRTAsmHE
6713 { 859, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #859 = CGRTAsmH
6714 { 858, 2, 0, 4, 14, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #858 = CGRTAsmE
6715 { 857, 3, 0, 4, 14, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #857 = CGRTAsm
6716 { 856, 3, 0, 4, 14, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #856 = CGRT
6717 { 855, 2, 0, 6, 224, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #855 = CGRL
6718 { 854, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #854 = CGRJAsmNLH
6719 { 853, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #853 = CGRJAsmNLE
6720 { 852, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #852 = CGRJAsmNL
6721 { 851, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #851 = CGRJAsmNHE
6722 { 850, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #850 = CGRJAsmNH
6723 { 849, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #849 = CGRJAsmNE
6724 { 848, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #848 = CGRJAsmLH
6725 { 847, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #847 = CGRJAsmLE
6726 { 846, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #846 = CGRJAsmL
6727 { 845, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #845 = CGRJAsmHE
6728 { 844, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #844 = CGRJAsmH
6729 { 843, 3, 0, 6, 11, 0, 1, 787, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #843 = CGRJAsmE
6730 { 842, 4, 0, 6, 11, 0, 1, 783, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #842 = CGRJAsm
6731 { 841, 4, 0, 6, 11, 0, 1, 783, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #841 = CGRJ
6732 { 840, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #840 = CGRBAsmNLH
6733 { 839, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #839 = CGRBAsmNLE
6734 { 838, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #838 = CGRBAsmNL
6735 { 837, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #837 = CGRBAsmNHE
6736 { 836, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #836 = CGRBAsmNH
6737 { 835, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #835 = CGRBAsmNE
6738 { 834, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #834 = CGRBAsmLH
6739 { 833, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #833 = CGRBAsmLE
6740 { 832, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #832 = CGRBAsmL
6741 { 831, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #831 = CGRBAsmHE
6742 { 830, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #830 = CGRBAsmH
6743 { 829, 4, 0, 6, 12, 0, 0, 779, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #829 = CGRBAsmE
6744 { 828, 5, 0, 6, 12, 0, 0, 774, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #828 = CGRBAsm
6745 { 827, 5, 0, 6, 12, 0, 0, 774, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #827 = CGRB
6746 { 826, 2, 0, 4, 225, 0, 1, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #826 = CGR
6747 { 825, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #825 = CGITAsmNLH
6748 { 824, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #824 = CGITAsmNLE
6749 { 823, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #823 = CGITAsmNL
6750 { 822, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #822 = CGITAsmNHE
6751 { 821, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #821 = CGITAsmNH
6752 { 820, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #820 = CGITAsmNE
6753 { 819, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #819 = CGITAsmLH
6754 { 818, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #818 = CGITAsmLE
6755 { 817, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #817 = CGITAsmL
6756 { 816, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #816 = CGITAsmHE
6757 { 815, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #815 = CGITAsmH
6758 { 814, 2, 0, 6, 14, 0, 0, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #814 = CGITAsmE
6759 { 813, 3, 0, 6, 14, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #813 = CGITAsm
6760 { 812, 3, 0, 6, 14, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #812 = CGIT
6761 { 811, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #811 = CGIJAsmNLH
6762 { 810, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #810 = CGIJAsmNLE
6763 { 809, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #809 = CGIJAsmNL
6764 { 808, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #808 = CGIJAsmNHE
6765 { 807, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #807 = CGIJAsmNH
6766 { 806, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #806 = CGIJAsmNE
6767 { 805, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #805 = CGIJAsmLH
6768 { 804, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #804 = CGIJAsmLE
6769 { 803, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #803 = CGIJAsmL
6770 { 802, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #802 = CGIJAsmHE
6771 { 801, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #801 = CGIJAsmH
6772 { 800, 3, 0, 6, 11, 0, 1, 771, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #800 = CGIJAsmE
6773 { 799, 4, 0, 6, 11, 0, 1, 767, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #799 = CGIJAsm
6774 { 798, 4, 0, 6, 11, 0, 1, 767, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #798 = CGIJ
6775 { 797, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #797 = CGIBAsmNLH
6776 { 796, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #796 = CGIBAsmNLE
6777 { 795, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #795 = CGIBAsmNL
6778 { 794, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #794 = CGIBAsmNHE
6779 { 793, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #793 = CGIBAsmNH
6780 { 792, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #792 = CGIBAsmNE
6781 { 791, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #791 = CGIBAsmLH
6782 { 790, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #790 = CGIBAsmLE
6783 { 789, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #789 = CGIBAsmL
6784 { 788, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #788 = CGIBAsmHE
6785 { 787, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #787 = CGIBAsmH
6786 { 786, 4, 0, 6, 12, 0, 0, 763, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #786 = CGIBAsmE
6787 { 785, 5, 0, 6, 12, 0, 0, 758, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #785 = CGIBAsm
6788 { 784, 5, 0, 6, 12, 0, 0, 758, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #784 = CGIB
6789 { 783, 3, 0, 6, 224, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #783 = CGHSI
6790 { 782, 2, 0, 6, 250, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #782 = CGHRL
6791 { 781, 2, 0, 4, 223, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #781 = CGHI
6792 { 780, 4, 0, 6, 249, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #780 = CGH
6793 { 779, 2, 0, 6, 253, 0, 1, 756, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #779 = CGFRL
6794 { 778, 2, 0, 4, 254, 0, 1, 754, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #778 = CGFR
6795 { 777, 2, 0, 6, 223, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #777 = CGFI
6796 { 776, 4, 0, 6, 252, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #776 = CGF
6797 { 775, 3, 1, 4, 430, 0, 1, 747, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #775 = CGER
6798 { 774, 4, 1, 4, 371, 1, 1, 750, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #774 = CGEBRA
6799 { 773, 3, 1, 4, 371, 1, 1, 747, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #773 = CGEBR
6800 { 772, 4, 1, 4, 486, 1, 1, 743, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #772 = CGDTRA
6801 { 771, 3, 1, 4, 486, 1, 1, 740, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #771 = CGDTR
6802 { 770, 3, 1, 4, 430, 0, 1, 740, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #770 = CGDR
6803 { 769, 4, 1, 4, 371, 1, 1, 743, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #769 = CGDBRA
6804 { 768, 3, 1, 4, 371, 1, 1, 740, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #768 = CGDBR
6805 { 767, 4, 0, 6, 220, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL }, // Inst #767 = CG
6806 { 766, 4, 1, 4, 946, 1, 1, 736, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #766 = CFXTR
6807 { 765, 3, 1, 4, 431, 0, 1, 733, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #765 = CFXR
6808 { 764, 4, 1, 4, 372, 1, 1, 736, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #764 = CFXBRA
6809 { 763, 3, 1, 4, 372, 1, 1, 733, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #763 = CFXBR
6810 { 762, 2, 0, 6, 222, 0, 1, 731, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #762 = CFI
6811 { 761, 3, 1, 4, 430, 0, 1, 724, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #761 = CFER
6812 { 760, 4, 1, 4, 371, 1, 1, 727, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #760 = CFEBRA
6813 { 759, 3, 1, 4, 371, 1, 1, 724, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #759 = CFEBR
6814 { 758, 4, 1, 4, 945, 1, 1, 720, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #758 = CFDTR
6815 { 757, 3, 1, 4, 430, 0, 1, 717, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #757 = CFDR
6816 { 756, 4, 1, 4, 371, 1, 1, 720, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #756 = CFDBRA
6817 { 755, 3, 1, 4, 371, 1, 1, 717, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #755 = CFDBR
6818 { 754, 2, 0, 4, 338, 3, 4, 715, SystemZImpOpBase + 28, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #754 = CFC
6819 { 753, 2, 0, 4, 528, 0, 1, 713, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #753 = CEXTR
6820 { 752, 2, 0, 2, 470, 0, 1, 699, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #752 = CER
6821 { 751, 4, 1, 4, 942, 1, 0, 709, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #751 = CELGBR
6822 { 750, 4, 1, 4, 942, 1, 0, 703, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #750 = CELFBR
6823 { 749, 2, 1, 4, 428, 0, 0, 707, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #749 = CEGR
6824 { 748, 4, 1, 4, 367, 1, 0, 709, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #748 = CEGBRA
6825 { 747, 2, 1, 4, 367, 1, 0, 707, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #747 = CEGBR
6826 { 746, 2, 1, 4, 428, 0, 0, 701, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #746 = CEFR
6827 { 745, 4, 1, 4, 367, 1, 0, 703, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #745 = CEFBRA
6828 { 744, 2, 1, 4, 367, 1, 0, 701, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #744 = CEFBR
6829 { 743, 2, 0, 4, 527, 0, 1, 671, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #743 = CEDTR
6830 { 742, 2, 0, 4, 408, 1, 1, 699, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #742 = CEBR
6831 { 741, 4, 0, 6, 407, 1, 1, 695, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #741 = CEB
6832 { 740, 4, 0, 4, 469, 0, 1, 695, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #740 = CE
6833 { 739, 5, 1, 6, 494, 0, 0, 685, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #739 = CDZT
6834 { 738, 2, 1, 4, 490, 0, 0, 679, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #738 = CDUTR
6835 { 737, 2, 0, 4, 525, 1, 1, 671, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #737 = CDTR
6836 { 736, 5, 1, 6, 277, 0, 1, 690, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #736 = CDSY
6837 { 735, 2, 1, 4, 490, 0, 0, 679, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #735 = CDSTR
6838 { 734, 5, 1, 6, 278, 0, 1, 690, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #734 = CDSG
6839 { 733, 5, 1, 4, 277, 0, 1, 690, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #733 = CDS
6840 { 732, 2, 0, 2, 470, 0, 1, 671, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #732 = CDR
6841 { 731, 5, 1, 6, 498, 0, 0, 685, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #731 = CDPT
6842 { 730, 4, 1, 4, 483, 1, 0, 681, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #730 = CDLGTR
6843 { 729, 4, 1, 4, 369, 1, 0, 681, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #729 = CDLGBR
6844 { 728, 4, 1, 4, 482, 1, 0, 675, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #728 = CDLFTR
6845 { 727, 4, 1, 4, 369, 1, 0, 675, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #727 = CDLFBR
6846 { 726, 4, 1, 4, 479, 1, 0, 681, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #726 = CDGTRA
6847 { 725, 2, 1, 4, 479, 1, 0, 679, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #725 = CDGTR
6848 { 724, 2, 1, 4, 428, 0, 0, 679, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #724 = CDGR
6849 { 723, 4, 1, 4, 367, 1, 0, 681, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #723 = CDGBRA
6850 { 722, 2, 1, 4, 367, 1, 0, 679, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #722 = CDGBR
6851 { 721, 4, 1, 4, 478, 1, 0, 675, SystemZImpOpBase + 12, 0, 0x0ULL }, // Inst #721 = CDFTR
6852 { 720, 2, 1, 4, 428, 0, 0, 673, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #720 = CDFR
6853 { 719, 4, 1, 4, 367, 1, 0, 675, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #719 = CDFBRA
6854 { 718, 2, 1, 4, 367, 1, 0, 673, SystemZImpOpBase + 12, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #718 = CDFBR
6855 { 717, 2, 0, 4, 408, 1, 1, 671, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #717 = CDBR
6856 { 716, 4, 0, 6, 407, 1, 1, 667, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #716 = CDB
6857 { 715, 4, 0, 4, 469, 0, 1, 667, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #715 = CD
6858 { 714, 5, 1, 6, 284, 0, 1, 662, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #714 = CALGF
6859 { 713, 5, 1, 6, 284, 0, 1, 662, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #713 = CALG
6860 { 712, 5, 1, 6, 284, 0, 1, 657, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #712 = CAL
6861 { 711, 4, 0, 4, 220, 0, 1, 653, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL }, // Inst #711 = C
6862 { 710, 5, 1, 6, 10, 0, 0, 648, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #710 = BXLEG
6863 { 709, 5, 1, 4, 10, 0, 0, 643, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #709 = BXLE
6864 { 708, 5, 1, 6, 10, 0, 0, 648, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #708 = BXHG
6865 { 707, 5, 1, 4, 10, 0, 0, 643, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #707 = BXH
6866 { 706, 2, 0, 2, 324, 0, 0, 595, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #706 = BSM
6867 { 705, 2, 1, 4, 829, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #705 = BSG
6868 { 704, 2, 1, 4, 829, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #704 = BSA
6869 { 703, 4, 1, 6, 10, 0, 1, 639, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #703 = BRXLG
6870 { 702, 4, 1, 4, 10, 0, 1, 635, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #702 = BRXLE
6871 { 701, 4, 1, 6, 10, 0, 1, 639, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #701 = BRXHG
6872 { 700, 4, 1, 4, 10, 0, 1, 635, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #700 = BRXH
6873 { 699, 3, 1, 6, 8, 0, 0, 632, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #699 = BRCTH
6874 { 698, 3, 1, 4, 7, 0, 1, 629, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #698 = BRCTG
6875 { 697, 3, 1, 4, 7, 0, 1, 626, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #697 = BRCT
6876 { 696, 2, 0, 6, 2, 1, 0, 624, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #696 = BRCLAsm
6877 { 695, 3, 0, 6, 2, 1, 0, 263, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #695 = BRCL
6878 { 694, 2, 0, 4, 2, 1, 0, 624, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #694 = BRCAsm
6879 { 693, 3, 0, 4, 2, 1, 0, 263, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #693 = BRC
6880 { 692, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #692 = BRAsmZ
6881 { 691, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #691 = BRAsmP
6882 { 690, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #690 = BRAsmO
6883 { 689, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #689 = BRAsmNZ
6884 { 688, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #688 = BRAsmNP
6885 { 687, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #687 = BRAsmNO
6886 { 686, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #686 = BRAsmNM
6887 { 685, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #685 = BRAsmNLH
6888 { 684, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #684 = BRAsmNLE
6889 { 683, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #683 = BRAsmNL
6890 { 682, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #682 = BRAsmNHE
6891 { 681, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #681 = BRAsmNH
6892 { 680, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #680 = BRAsmNE
6893 { 679, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #679 = BRAsmM
6894 { 678, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #678 = BRAsmLH
6895 { 677, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #677 = BRAsmLE
6896 { 676, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #676 = BRAsmL
6897 { 675, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #675 = BRAsmHE
6898 { 674, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #674 = BRAsmH
6899 { 673, 1, 0, 2, 5, 1, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #673 = BRAsmE
6900 { 672, 3, 0, 6, 19, 0, 1, 621, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #672 = BRASL
6901 { 671, 3, 0, 4, 18, 0, 1, 621, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #671 = BRAS
6902 { 670, 1, 0, 2, 5, 0, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #670 = BR
6903 { 669, 3, 0, 6, 267, 0, 0, 618, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #669 = BPRP
6904 { 668, 4, 0, 6, 266, 0, 0, 614, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #668 = BPP
6905 { 667, 4, 0, 6, 6, 1, 0, 602, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #667 = BICAsm
6906 { 666, 5, 0, 6, 6, 1, 0, 597, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL }, // Inst #666 = BIC
6907 { 665, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #665 = BIAsmZ
6908 { 664, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #664 = BIAsmP
6909 { 663, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #663 = BIAsmO
6910 { 662, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #662 = BIAsmNZ
6911 { 661, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #661 = BIAsmNP
6912 { 660, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #660 = BIAsmNO
6913 { 659, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #659 = BIAsmNM
6914 { 658, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #658 = BIAsmNLH
6915 { 657, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #657 = BIAsmNLE
6916 { 656, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #656 = BIAsmNL
6917 { 655, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #655 = BIAsmNHE
6918 { 654, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #654 = BIAsmNH
6919 { 653, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #653 = BIAsmNE
6920 { 652, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #652 = BIAsmM
6921 { 651, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #651 = BIAsmLH
6922 { 650, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #650 = BIAsmLE
6923 { 649, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #649 = BIAsmL
6924 { 648, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #648 = BIAsmHE
6925 { 647, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #647 = BIAsmH
6926 { 646, 3, 0, 6, 6, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #646 = BIAsmE
6927 { 645, 3, 0, 6, 6, 0, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #645 = BI
6928 { 644, 3, 1, 4, 335, 0, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #644 = BEXTG
6929 { 643, 3, 1, 4, 335, 0, 0, 388, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #643 = BDEPG
6930 { 642, 3, 1, 2, 9, 0, 0, 611, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #642 = BCTR
6931 { 641, 3, 1, 4, 9, 0, 0, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #641 = BCTGR
6932 { 640, 5, 1, 6, 9, 0, 0, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #640 = BCTG
6933 { 639, 5, 1, 4, 9, 0, 0, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #639 = BCT
6934 { 638, 2, 0, 2, 4, 1, 0, 609, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #638 = BCRAsm
6935 { 637, 3, 0, 2, 4, 1, 0, 606, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #637 = BCR
6936 { 636, 4, 0, 4, 4, 1, 0, 602, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #636 = BCAsm
6937 { 635, 5, 0, 4, 4, 1, 0, 597, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL }, // Inst #635 = BC
6938 { 634, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #634 = BAsmZ
6939 { 633, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #633 = BAsmP
6940 { 632, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #632 = BAsmO
6941 { 631, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #631 = BAsmNZ
6942 { 630, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #630 = BAsmNP
6943 { 629, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #629 = BAsmNO
6944 { 628, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #628 = BAsmNM
6945 { 627, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #627 = BAsmNLH
6946 { 626, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #626 = BAsmNLE
6947 { 625, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #625 = BAsmNL
6948 { 624, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #624 = BAsmNHE
6949 { 623, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #623 = BAsmNH
6950 { 622, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #622 = BAsmNE
6951 { 621, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #621 = BAsmM
6952 { 620, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #620 = BAsmLH
6953 { 619, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #619 = BAsmLE
6954 { 618, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #618 = BAsmL
6955 { 617, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #617 = BAsmHE
6956 { 616, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #616 = BAsmH
6957 { 615, 3, 0, 4, 5, 1, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #615 = BAsmE
6958 { 614, 2, 0, 2, 325, 0, 1, 595, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #614 = BASSM
6959 { 613, 2, 0, 2, 20, 0, 1, 595, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #613 = BASR
6960 { 612, 4, 0, 4, 20, 0, 1, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #612 = BAS
6961 { 611, 2, 0, 2, 321, 1, 1, 595, SystemZImpOpBase + 26, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #611 = BALR
6962 { 610, 4, 0, 4, 321, 1, 1, 161, SystemZImpOpBase + 26, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #610 = BAL
6963 { 609, 2, 0, 4, 831, 0, 0, 593, SystemZImpOpBase + 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #609 = BAKR
6964 { 608, 3, 0, 4, 5, 0, 0, 590, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #608 = B
6965 { 607, 5, 1, 6, 104, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #607 = AY
6966 { 606, 4, 1, 4, 510, 1, 1, 586, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #606 = AXTRA
6967 { 605, 3, 1, 4, 510, 1, 1, 583, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #605 = AXTR
6968 { 604, 3, 1, 2, 445, 0, 1, 580, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #604 = AXR
6969 { 603, 3, 1, 4, 388, 1, 1, 580, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #603 = AXBR
6970 { 602, 3, 1, 2, 444, 0, 1, 527, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #602 = AWR
6971 { 601, 5, 1, 4, 443, 0, 1, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #601 = AW
6972 { 600, 3, 1, 2, 444, 0, 1, 542, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #600 = AUR
6973 { 599, 5, 1, 4, 443, 0, 1, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #599 = AU
6974 { 598, 3, 0, 6, 939, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #598 = ASI
6975 { 597, 3, 1, 4, 121, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #597 = ARK
6976 { 596, 3, 1, 2, 121, 0, 1, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #596 = AR
6977 { 595, 6, 0, 6, 308, 0, 1, 574, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #595 = AP
6978 { 594, 5, 1, 6, 114, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #594 = ALY
6979 { 593, 3, 1, 6, 124, 0, 0, 565, SystemZImpOpBase + 0, 0, 0x0ULL }, // Inst #593 = ALSIHN
6980 { 592, 3, 1, 6, 124, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #592 = ALSIH
6981 { 591, 3, 0, 6, 939, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #591 = ALSI
6982 { 590, 3, 1, 4, 120, 0, 1, 571, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #590 = ALRK
6983 { 589, 3, 1, 2, 120, 0, 1, 568, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #589 = ALR
6984 { 588, 3, 1, 6, 115, 0, 1, 251, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #588 = ALHSIK
6985 { 587, 3, 1, 4, 123, 0, 1, 562, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #587 = ALHHLR
6986 { 586, 3, 1, 4, 122, 0, 1, 559, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #586 = ALHHHR
6987 { 585, 3, 0, 6, 125, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #585 = ALGSI
6988 { 584, 3, 1, 4, 119, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #584 = ALGRK
6989 { 583, 3, 1, 4, 119, 0, 1, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #583 = ALGR
6990 { 582, 3, 1, 6, 117, 0, 1, 223, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #582 = ALGHSIK
6991 { 581, 3, 1, 4, 118, 0, 1, 553, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #581 = ALGFR
6992 { 580, 3, 1, 6, 118, 0, 1, 305, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #580 = ALGFI
6993 { 579, 5, 1, 6, 940, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #579 = ALGF
6994 { 578, 5, 1, 6, 116, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #578 = ALG
6995 { 577, 3, 1, 6, 115, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x103c00ULL }, // Inst #577 = ALFI
6996 { 576, 3, 1, 4, 127, 1, 1, 568, SystemZImpOpBase + 26, 0, 0x103c00ULL }, // Inst #576 = ALCR
6997 { 575, 3, 1, 4, 127, 1, 1, 556, SystemZImpOpBase + 26, 0, 0x103c00ULL }, // Inst #575 = ALCGR
6998 { 574, 5, 1, 6, 126, 1, 1, 548, SystemZImpOpBase + 26, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #574 = ALCG
6999 { 573, 5, 1, 6, 126, 1, 1, 517, SystemZImpOpBase + 26, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #573 = ALC
7000 { 572, 5, 1, 4, 114, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #572 = AL
7001 { 571, 3, 1, 6, 106, 0, 1, 565, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #571 = AIH
7002 { 570, 5, 1, 6, 105, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #570 = AHY
7003 { 569, 3, 1, 6, 112, 0, 1, 251, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #569 = AHIK
7004 { 568, 3, 1, 4, 112, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #568 = AHI
7005 { 567, 3, 1, 4, 123, 0, 1, 562, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #567 = AHHLR
7006 { 566, 3, 1, 4, 122, 0, 1, 559, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #566 = AHHHR
7007 { 565, 5, 1, 4, 105, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c48ULL }, // Inst #565 = AH
7008 { 564, 3, 0, 6, 125, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #564 = AGSI
7009 { 563, 3, 1, 4, 111, 0, 1, 388, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #563 = AGRK
7010 { 562, 3, 1, 4, 111, 0, 1, 556, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #562 = AGR
7011 { 561, 3, 1, 6, 110, 0, 1, 223, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #561 = AGHIK
7012 { 560, 3, 1, 4, 110, 0, 1, 305, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #560 = AGHI
7013 { 559, 5, 1, 6, 128, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #559 = AGH
7014 { 558, 3, 1, 4, 129, 0, 1, 553, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #558 = AGFR
7015 { 557, 3, 1, 6, 109, 0, 1, 305, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #557 = AGFI
7016 { 556, 5, 1, 6, 921, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #556 = AGF
7017 { 555, 5, 1, 6, 108, 0, 1, 548, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #555 = AG
7018 { 554, 3, 1, 6, 107, 0, 1, 545, SystemZImpOpBase + 0, 0, 0x203c00ULL }, // Inst #554 = AFI
7019 { 553, 3, 1, 2, 444, 0, 1, 542, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #553 = AER
7020 { 552, 3, 1, 4, 387, 1, 1, 542, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #552 = AEBR
7021 { 551, 5, 1, 6, 386, 1, 1, 537, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #551 = AEB
7022 { 550, 5, 1, 4, 443, 0, 1, 537, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #550 = AE
7023 { 549, 4, 1, 4, 509, 1, 1, 533, SystemZImpOpBase + 1, 0, 0x0ULL }, // Inst #549 = ADTRA
7024 { 548, 3, 1, 4, 509, 1, 1, 530, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #548 = ADTR
7025 { 547, 3, 1, 2, 444, 0, 1, 527, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #547 = ADR
7026 { 546, 3, 1, 4, 387, 1, 1, 527, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #546 = ADBR
7027 { 545, 5, 1, 6, 386, 1, 1, 522, SystemZImpOpBase + 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #545 = ADB
7028 { 544, 5, 1, 4, 443, 0, 1, 522, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #544 = AD
7029 { 543, 5, 1, 4, 104, 0, 1, 517, SystemZImpOpBase + 0, 0|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #543 = A
7030 { 542, 2, 1, 0, 0, 0, 0, 170, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #542 = ZEXT128
7031 { 541, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #541 = X_MemFoldPseudo
7032 { 540, 0, 0, 0, 0, 2, 2, 1, SystemZImpOpBase + 22, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #540 = XPLINK_STACKALLOC
7033 { 539, 3, 1, 6, 174, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #539 = XILF64
7034 { 538, 3, 1, 6, 173, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #538 = XIHF64
7035 { 537, 3, 1, 0, 171, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #537 = XIFMux
7036 { 536, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #536 = XG_MemFoldPseudo
7037 { 535, 5, 0, 0, 0, 0, 1, 238, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #535 = XCReg
7038 { 534, 5, 0, 0, 0, 0, 1, 233, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #534 = XCImm
7039 { 533, 4, 0, 6, 550, 0, 0, 506, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #533 = VST64
7040 { 532, 4, 0, 6, 550, 0, 0, 502, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #532 = VST32
7041 { 531, 4, 0, 6, 550, 0, 0, 498, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #531 = VST16
7042 { 530, 3, 1, 6, 534, 0, 0, 514, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #530 = VLVGP32
7043 { 529, 2, 1, 6, 531, 0, 0, 512, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #529 = VLR64
7044 { 528, 2, 1, 6, 531, 0, 0, 510, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveReg), 0x0ULL }, // Inst #528 = VLR32
7045 { 527, 4, 1, 6, 543, 0, 0, 506, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1ULL }, // Inst #527 = VL64
7046 { 526, 4, 1, 6, 543, 0, 0, 502, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1ULL }, // Inst #526 = VL32
7047 { 525, 4, 1, 6, 543, 0, 0, 498, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1ULL }, // Inst #525 = VL16
7048 { 524, 2, 0, 0, 0, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #524 = UCmp128Hi
7049 { 523, 0, 0, 4, 13, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #523 = Trap
7050 { 522, 2, 0, 0, 259, 0, 1, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #522 = TMLMux
7051 { 521, 2, 0, 4, 263, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #521 = TMLL64
7052 { 520, 2, 0, 4, 262, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #520 = TMLH64
7053 { 519, 2, 0, 0, 259, 0, 1, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #519 = TMHMux
7054 { 518, 2, 0, 4, 261, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #518 = TMHL64
7055 { 517, 2, 0, 4, 260, 0, 1, 496, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #517 = TMHH64
7056 { 516, 1, 0, 6, 21, 0, 2, 0, SystemZImpOpBase + 20, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #516 = TLS_LDCALL
7057 { 515, 1, 0, 6, 21, 0, 2, 0, SystemZImpOpBase + 20, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #515 = TLS_GDCALL
7058 { 514, 3, 0, 0, 0, 0, 1, 493, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #514 = TBEGIN_nofloat
7059 { 513, 0, 0, 2, 269, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #513 = Serialize
7060 { 512, 5, 1, 0, 0, 1, 0, 488, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #512 = SelectVR64
7061 { 511, 5, 1, 0, 0, 1, 0, 483, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #511 = SelectVR32
7062 { 510, 5, 1, 0, 0, 1, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #510 = SelectVR128
7063 { 509, 5, 1, 0, 0, 1, 0, 478, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #509 = SelectF64
7064 { 508, 5, 1, 0, 0, 1, 0, 473, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #508 = SelectF32
7065 { 507, 5, 1, 0, 0, 1, 0, 468, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #507 = SelectF128
7066 { 506, 5, 1, 0, 0, 1, 0, 463, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #506 = Select64
7067 { 505, 5, 1, 0, 0, 1, 0, 458, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #505 = Select32
7068 { 504, 5, 1, 0, 0, 1, 0, 453, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #504 = Select128
7069 { 503, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #503 = S_MemFoldPseudo
7070 { 502, 4, 0, 0, 360, 0, 0, 353, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #502 = STX
7071 { 501, 5, 0, 0, 54, 1, 0, 448, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL }, // Inst #501 = STOCMux
7072 { 500, 4, 0, 0, 48, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #500 = STMux
7073 { 499, 4, 0, 0, 77, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #499 = STHMux
7074 { 498, 4, 0, 0, 76, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #498 = STCMux
7075 { 497, 4, 0, 0, 47, 0, 0, 308, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #497 = ST128
7076 { 496, 4, 1, 0, 0, 0, 1, 254, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #496 = SRSTLoop
7077 { 495, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #495 = SL_MemFoldPseudo
7078 { 494, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #494 = SLG_MemFoldPseudo
7079 { 493, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #493 = SG_MemFoldPseudo
7080 { 492, 5, 1, 0, 55, 1, 0, 443, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #492 = SELRMux
7081 { 491, 5, 1, 0, 0, 1, 1, 165, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #491 = SEB_MemFoldPseudo
7082 { 490, 5, 1, 0, 0, 1, 1, 156, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #490 = SDB_MemFoldPseudo
7083 { 489, 2, 0, 0, 0, 0, 1, 441, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #489 = SCmp128Hi
7084 { 488, 0, 0, 4, 22, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #488 = Return_XPLINK
7085 { 487, 0, 0, 2, 22, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #487 = Return
7086 { 486, 6, 1, 0, 218, 0, 0, 435, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #486 = RISBMux
7087 { 485, 5, 1, 6, 216, 0, 0, 430, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #485 = RISBLLOpt
7088 { 484, 6, 1, 6, 216, 0, 0, 424, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #484 = RISBLL
7089 { 483, 5, 1, 6, 216, 0, 0, 419, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #483 = RISBLHOpt
7090 { 482, 6, 1, 6, 216, 0, 0, 413, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #482 = RISBLH
7091 { 481, 5, 1, 6, 215, 0, 0, 408, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #481 = RISBHLOpt
7092 { 480, 6, 1, 6, 215, 0, 0, 402, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #480 = RISBHL
7093 { 479, 5, 1, 6, 215, 0, 0, 397, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #479 = RISBHHOpt
7094 { 478, 6, 1, 6, 215, 0, 0, 391, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #478 = RISBHH
7095 { 477, 1, 0, 0, 0, 1, 3, 1, SystemZImpOpBase + 16, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #477 = PROBED_STACKALLOC
7096 { 476, 3, 1, 0, 0, 1, 2, 388, SystemZImpOpBase + 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #476 = PROBED_ALLOCA
7097 { 475, 3, 1, 0, 0, 0, 0, 385, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #475 = PAIR128
7098 { 474, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #474 = O_MemFoldPseudo
7099 { 473, 3, 1, 0, 160, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #473 = OILMux
7100 { 472, 3, 1, 4, 166, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #472 = OILL64
7101 { 471, 3, 1, 4, 165, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #471 = OILH64
7102 { 470, 3, 1, 6, 164, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #470 = OILF64
7103 { 469, 3, 1, 0, 160, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #469 = OIHMux
7104 { 468, 3, 1, 4, 163, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #468 = OIHL64
7105 { 467, 3, 1, 4, 162, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #467 = OIHH64
7106 { 466, 3, 1, 6, 161, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #466 = OIHF64
7107 { 465, 3, 1, 0, 160, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #465 = OIFMux
7108 { 464, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #464 = OG_MemFoldPseudo
7109 { 463, 5, 0, 0, 0, 0, 1, 238, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #463 = OCReg
7110 { 462, 5, 0, 0, 0, 0, 1, 233, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #462 = OCImm
7111 { 461, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #461 = N_MemFoldPseudo
7112 { 460, 3, 1, 0, 147, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #460 = NILMux
7113 { 459, 3, 1, 4, 154, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #459 = NILL64
7114 { 458, 3, 1, 4, 153, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #458 = NILH64
7115 { 457, 3, 1, 6, 152, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #457 = NILF64
7116 { 456, 3, 1, 0, 147, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #456 = NIHMux
7117 { 455, 3, 1, 4, 151, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #455 = NIHL64
7118 { 454, 3, 1, 4, 150, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #454 = NIHH64
7119 { 453, 3, 1, 6, 149, 0, 1, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #453 = NIHF64
7120 { 452, 3, 1, 0, 147, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #452 = NIFMux
7121 { 451, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #451 = NG_MemFoldPseudo
7122 { 450, 5, 0, 0, 0, 0, 1, 238, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #450 = NCReg
7123 { 449, 5, 0, 0, 0, 0, 1, 233, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #449 = NCImm
7124 { 448, 4, 0, 0, 0, 0, 1, 381, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #448 = MemsetRegReg
7125 { 447, 4, 0, 0, 0, 0, 1, 377, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #447 = MemsetRegImm
7126 { 446, 4, 0, 0, 0, 0, 1, 373, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #446 = MemsetImmReg
7127 { 445, 4, 0, 0, 0, 0, 1, 369, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #445 = MemsetImmImm
7128 { 444, 4, 1, 0, 0, 0, 1, 254, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #444 = MVSTLoop
7129 { 443, 5, 0, 0, 0, 0, 1, 238, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #443 = MVCReg
7130 { 442, 5, 0, 0, 0, 0, 1, 233, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #442 = MVCImm
7131 { 441, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #441 = MSGC_MemFoldPseudo
7132 { 440, 6, 1, 0, 0, 1, 0, 363, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #440 = MSEB_MemFoldPseudo
7133 { 439, 6, 1, 0, 0, 1, 0, 357, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #439 = MSDB_MemFoldPseudo
7134 { 438, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #438 = MSC_MemFoldPseudo
7135 { 437, 5, 1, 0, 0, 1, 0, 165, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #437 = MEEB_MemFoldPseudo
7136 { 436, 5, 1, 0, 0, 1, 0, 156, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #436 = MDB_MemFoldPseudo
7137 { 435, 6, 1, 0, 0, 1, 0, 363, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #435 = MAEB_MemFoldPseudo
7138 { 434, 6, 1, 0, 0, 1, 0, 357, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #434 = MADB_MemFoldPseudo
7139 { 433, 4, 1, 0, 358, 0, 0, 353, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #433 = LX
7140 { 432, 1, 0, 0, 0, 1, 1, 352, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #432 = LTXBRCompare_Pseudo
7141 { 431, 1, 0, 0, 0, 1, 1, 351, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #431 = LTEBRCompare_Pseudo
7142 { 430, 1, 0, 0, 0, 1, 1, 350, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #430 = LTDBRCompare_Pseudo
7143 { 429, 5, 1, 0, 50, 1, 0, 345, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #429 = LOCRMux
7144 { 428, 6, 1, 0, 0, 1, 0, 339, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #428 = LOCMux_MemFoldPseudo
7145 { 427, 6, 1, 0, 53, 1, 0, 333, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL }, // Inst #427 = LOCMux
7146 { 426, 5, 1, 0, 52, 1, 0, 328, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x80000ULL }, // Inst #426 = LOCHIMux
7147 { 425, 6, 1, 0, 0, 1, 0, 322, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #425 = LOCG_MemFoldPseudo
7148 { 424, 4, 1, 0, 33, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #424 = LMux
7149 { 423, 2, 1, 0, 67, 0, 0, 320, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #423 = LLHRMux
7150 { 422, 4, 1, 0, 70, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #422 = LLHMux
7151 { 421, 2, 1, 0, 66, 0, 0, 320, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #421 = LLCRMux
7152 { 420, 4, 1, 0, 69, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #420 = LLCMux
7153 { 419, 4, 1, 0, 63, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #419 = LHMux
7154 { 418, 2, 1, 0, 40, 0, 0, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #418 = LHIMux
7155 { 417, 2, 1, 6, 742, 0, 0, 318, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #417 = LFER_16
7156 { 416, 2, 1, 6, 742, 0, 0, 316, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #416 = LFER
7157 { 415, 2, 1, 6, 741, 0, 0, 314, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #415 = LEFR_16
7158 { 414, 2, 1, 6, 741, 0, 0, 312, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #414 = LEFR
7159 { 413, 4, 1, 0, 61, 0, 0, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #413 = LBMux
7160 { 412, 4, 1, 0, 36, 0, 0, 308, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #412 = L128
7161 { 411, 3, 1, 0, 97, 0, 0, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #411 = IILMux
7162 { 410, 3, 1, 4, 103, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #410 = IILL64
7163 { 409, 3, 1, 4, 102, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #409 = IILH64
7164 { 408, 3, 1, 6, 101, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #408 = IILF64
7165 { 407, 3, 1, 0, 97, 0, 0, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #407 = IIHMux
7166 { 406, 3, 1, 4, 100, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #406 = IIHL64
7167 { 405, 3, 1, 4, 99, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #405 = IIHH64
7168 { 404, 3, 1, 6, 98, 0, 0, 305, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #404 = IIHF64
7169 { 403, 2, 1, 0, 97, 0, 0, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #403 = IIFMux
7170 { 402, 1, 1, 6, 87, 0, 0, 304, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #402 = GOT
7171 { 401, 6, 0, 6, 0, 0, 0, 298, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #401 = EXRL_Pseudo
7172 { 400, 1, 0, 0, 0, 0, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #400 = EH_SjLj_Setup
7173 { 399, 2, 1, 0, 0, 0, 0, 296, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #399 = EH_SjLj_SetJmp
7174 { 398, 1, 0, 0, 0, 0, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #398 = EH_SjLj_LongJmp
7175 { 397, 5, 1, 0, 0, 1, 0, 165, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #397 = DEB_MemFoldPseudo
7176 { 396, 5, 1, 0, 0, 1, 0, 156, SystemZImpOpBase + 12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #396 = DDB_MemFoldPseudo
7177 { 395, 2, 0, 4, 13, 1, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #395 = CondTrap
7178 { 394, 6, 0, 0, 0, 1, 0, 290, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #394 = CondStoreF64Inv
7179 { 393, 6, 0, 0, 0, 1, 0, 290, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #393 = CondStoreF64
7180 { 392, 6, 0, 0, 0, 1, 0, 284, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #392 = CondStoreF32Inv
7181 { 391, 6, 0, 0, 0, 1, 0, 284, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #391 = CondStoreF32
7182 { 390, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #390 = CondStore8MuxInv
7183 { 389, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #389 = CondStore8Mux
7184 { 388, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #388 = CondStore8Inv
7185 { 387, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #387 = CondStore8
7186 { 386, 6, 0, 0, 0, 1, 0, 278, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #386 = CondStore64Inv
7187 { 385, 6, 0, 0, 0, 1, 0, 278, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #385 = CondStore64
7188 { 384, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #384 = CondStore32MuxInv
7189 { 383, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #383 = CondStore32Mux
7190 { 382, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #382 = CondStore32Inv
7191 { 381, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #381 = CondStore32
7192 { 380, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #380 = CondStore16MuxInv
7193 { 379, 6, 0, 0, 0, 1, 0, 272, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #379 = CondStore16Mux
7194 { 378, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #378 = CondStore16Inv
7195 { 377, 6, 0, 0, 0, 1, 0, 266, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #377 = CondStore16
7196 { 376, 2, 0, 4, 23, 1, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #376 = CondReturn_XPLINK
7197 { 375, 2, 0, 2, 23, 1, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #375 = CondReturn
7198 { 374, 1, 0, 6, 3, 0, 0, 262, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #374 = CallJG
7199 { 373, 3, 0, 6, 2, 0, 0, 263, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #373 = CallBRCL
7200 { 372, 1, 0, 8, 19, 1, 2, 262, SystemZImpOpBase + 9, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #372 = CallBRASL_XPLINK64
7201 { 371, 1, 0, 6, 19, 1, 2, 262, SystemZImpOpBase + 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #371 = CallBRASL
7202 { 370, 1, 0, 2, 5, 0, 0, 258, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #370 = CallBR
7203 { 369, 3, 0, 2, 4, 0, 0, 259, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #369 = CallBCR
7204 { 368, 1, 0, 4, 20, 1, 2, 258, SystemZImpOpBase + 9, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #368 = CallBASR_XPLINK64
7205 { 367, 1, 0, 4, 20, 1, 2, 258, SystemZImpOpBase + 6, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #367 = CallBASR_STACKEXT
7206 { 366, 1, 0, 2, 20, 1, 2, 258, SystemZImpOpBase + 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #366 = CallBASR
7207 { 365, 3, 0, 6, 12, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #365 = CRBReturn
7208 { 364, 4, 0, 6, 12, 0, 0, 247, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #364 = CRBCall
7209 { 363, 4, 0, 0, 220, 0, 1, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #363 = CMux
7210 { 362, 4, 1, 0, 0, 0, 1, 254, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #362 = CLSTLoop
7211 { 361, 3, 0, 6, 12, 0, 0, 251, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #361 = CLRBReturn
7212 { 360, 4, 0, 6, 12, 0, 0, 247, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #360 = CLRBCall
7213 { 359, 4, 0, 0, 229, 0, 1, 243, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #359 = CLMux
7214 { 358, 3, 0, 6, 12, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #358 = CLIBReturn
7215 { 357, 4, 0, 6, 12, 0, 0, 226, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #357 = CLIBCall
7216 { 356, 3, 0, 6, 12, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #356 = CLGRBReturn
7217 { 355, 4, 0, 6, 12, 0, 0, 219, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #355 = CLGRBCall
7218 { 354, 3, 0, 6, 12, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #354 = CLGIBReturn
7219 { 353, 4, 0, 6, 12, 0, 0, 212, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #353 = CLGIBCall
7220 { 352, 2, 0, 0, 231, 0, 1, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #352 = CLFIMux
7221 { 351, 5, 0, 0, 0, 0, 1, 238, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #351 = CLCReg
7222 { 350, 5, 0, 0, 0, 0, 1, 233, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #350 = CLCImm
7223 { 349, 3, 0, 6, 12, 0, 0, 230, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #349 = CIBReturn
7224 { 348, 4, 0, 6, 12, 0, 0, 226, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #348 = CIBCall
7225 { 347, 2, 0, 0, 222, 0, 1, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #347 = CHIMux
7226 { 346, 3, 0, 6, 12, 0, 0, 223, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #346 = CGRBReturn
7227 { 345, 4, 0, 6, 12, 0, 0, 219, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #345 = CGRBCall
7228 { 344, 3, 0, 6, 12, 0, 0, 216, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #344 = CGIBReturn
7229 { 343, 4, 0, 6, 12, 0, 0, 212, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #343 = CGIBCall
7230 { 342, 2, 0, 0, 222, 0, 1, 210, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #342 = CFIMux
7231 { 341, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #341 = A_MemFoldPseudo
7232 { 340, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #340 = ATOMIC_SWAPW
7233 { 339, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #339 = ATOMIC_LOADW_XR
7234 { 338, 7, 1, 0, 0, 0, 1, 196, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #338 = ATOMIC_LOADW_XILF
7235 { 337, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #337 = ATOMIC_LOADW_UMIN
7236 { 336, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #336 = ATOMIC_LOADW_UMAX
7237 { 335, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #335 = ATOMIC_LOADW_SR
7238 { 334, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #334 = ATOMIC_LOADW_OR
7239 { 333, 7, 1, 0, 0, 0, 1, 196, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #333 = ATOMIC_LOADW_OILH
7240 { 332, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #332 = ATOMIC_LOADW_NRi
7241 { 331, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #331 = ATOMIC_LOADW_NR
7242 { 330, 7, 1, 0, 0, 0, 1, 196, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #330 = ATOMIC_LOADW_NILHi
7243 { 329, 7, 1, 0, 0, 0, 1, 196, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #329 = ATOMIC_LOADW_NILH
7244 { 328, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #328 = ATOMIC_LOADW_MIN
7245 { 327, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #327 = ATOMIC_LOADW_MAX
7246 { 326, 7, 1, 0, 0, 0, 1, 203, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #326 = ATOMIC_LOADW_AR
7247 { 325, 7, 1, 0, 0, 0, 1, 196, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #325 = ATOMIC_LOADW_AFI
7248 { 324, 8, 1, 0, 0, 0, 1, 188, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #324 = ATOMIC_CMP_SWAPW
7249 { 323, 5, 1, 0, 0, 0, 1, 183, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #323 = AL_MemFoldPseudo
7250 { 322, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #322 = ALG_MemFoldPseudo
7251 { 321, 3, 1, 0, 113, 0, 1, 180, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #321 = AHIMuxK
7252 { 320, 3, 1, 0, 113, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #320 = AHIMux
7253 { 319, 5, 1, 0, 0, 0, 1, 175, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #319 = AG_MemFoldPseudo
7254 { 318, 3, 1, 0, 107, 0, 1, 172, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #318 = AFIMux
7255 { 317, 2, 1, 0, 0, 0, 0, 170, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #317 = AEXT128
7256 { 316, 5, 1, 0, 0, 1, 1, 165, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #316 = AEB_MemFoldPseudo
7257 { 315, 4, 1, 0, 1, 0, 0, 161, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #315 = ADJDYNALLOC
7258 { 314, 2, 0, 0, 0, 0, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #314 = ADJCALLSTACKUP
7259 { 313, 2, 0, 0, 0, 0, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #313 = ADJCALLSTACKDOWN
7260 { 312, 5, 1, 0, 0, 1, 1, 156, SystemZImpOpBase + 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #312 = ADB_MemFoldPseudo
7261 { 311, 4, 1, 12, 0, 0, 1, 152, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #311 = ADA_ENTRY_VALUE
7262 { 310, 4, 1, 12, 0, 0, 1, 152, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #310 = ADA_ENTRY
7263 { 309, 4, 1, 0, 0, 0, 0, 148, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #309 = G_UBFX
7264 { 308, 4, 1, 0, 0, 0, 0, 148, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #308 = G_SBFX
7265 { 307, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #307 = G_VECREDUCE_UMIN
7266 { 306, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #306 = G_VECREDUCE_UMAX
7267 { 305, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #305 = G_VECREDUCE_SMIN
7268 { 304, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #304 = G_VECREDUCE_SMAX
7269 { 303, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #303 = G_VECREDUCE_XOR
7270 { 302, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #302 = G_VECREDUCE_OR
7271 { 301, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #301 = G_VECREDUCE_AND
7272 { 300, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #300 = G_VECREDUCE_MUL
7273 { 299, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #299 = G_VECREDUCE_ADD
7274 { 298, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #298 = G_VECREDUCE_FMINIMUM
7275 { 297, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #297 = G_VECREDUCE_FMAXIMUM
7276 { 296, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #296 = G_VECREDUCE_FMIN
7277 { 295, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #295 = G_VECREDUCE_FMAX
7278 { 294, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #294 = G_VECREDUCE_FMUL
7279 { 293, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #293 = G_VECREDUCE_FADD
7280 { 292, 3, 1, 0, 0, 0, 0, 131, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #292 = G_VECREDUCE_SEQ_FMUL
7281 { 291, 3, 1, 0, 0, 0, 0, 131, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #291 = G_VECREDUCE_SEQ_FADD
7282 { 290, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #290 = G_UBSANTRAP
7283 { 289, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #289 = G_DEBUGTRAP
7284 { 288, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #288 = G_TRAP
7285 { 287, 3, 0, 0, 0, 0, 0, 58, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #287 = G_BZERO
7286 { 286, 4, 0, 0, 0, 0, 0, 144, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #286 = G_MEMSET
7287 { 285, 4, 0, 0, 0, 0, 0, 144, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #285 = G_MEMMOVE
7288 { 284, 3, 0, 0, 0, 0, 0, 131, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #284 = G_MEMCPY_INLINE
7289 { 283, 4, 0, 0, 0, 0, 0, 144, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #283 = G_MEMCPY
7290 { 282, 2, 0, 0, 0, 0, 0, 142, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #282 = G_WRITE_REGISTER
7291 { 281, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #281 = G_READ_REGISTER
7292 { 280, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #280 = G_STRICT_FLDEXP
7293 { 279, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #279 = G_STRICT_FSQRT
7294 { 278, 4, 1, 0, 0, 0, 0, 46, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #278 = G_STRICT_FMA
7295 { 277, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #277 = G_STRICT_FREM
7296 { 276, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #276 = G_STRICT_FDIV
7297 { 275, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = G_STRICT_FMUL
7298 { 274, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = G_STRICT_FSUB
7299 { 273, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = G_STRICT_FADD
7300 { 272, 1, 0, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #272 = G_STACKRESTORE
7301 { 271, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #271 = G_STACKSAVE
7302 { 270, 3, 1, 0, 0, 0, 0, 69, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #270 = G_DYN_STACKALLOC
7303 { 269, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #269 = G_JUMP_TABLE
7304 { 268, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #268 = G_BLOCK_ADDR
7305 { 267, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #267 = G_ADDRSPACE_CAST
7306 { 266, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #266 = G_FNEARBYINT
7307 { 265, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #265 = G_FRINT
7308 { 264, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #264 = G_FFLOOR
7309 { 263, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #263 = G_FSQRT
7310 { 262, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #262 = G_FTANH
7311 { 261, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #261 = G_FSINH
7312 { 260, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #260 = G_FCOSH
7313 { 259, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #259 = G_FATAN2
7314 { 258, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #258 = G_FATAN
7315 { 257, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #257 = G_FASIN
7316 { 256, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #256 = G_FACOS
7317 { 255, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #255 = G_FTAN
7318 { 254, 3, 2, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_FSINCOS
7319 { 253, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_FSIN
7320 { 252, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_FCOS
7321 { 251, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #251 = G_FCEIL
7322 { 250, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #250 = G_BITREVERSE
7323 { 249, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #249 = G_BSWAP
7324 { 248, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #248 = G_CTPOP
7325 { 247, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #247 = G_CTLZ_ZERO_UNDEF
7326 { 246, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #246 = G_CTLZ
7327 { 245, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #245 = G_CTTZ_ZERO_UNDEF
7328 { 244, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #244 = G_CTTZ
7329 { 243, 4, 1, 0, 0, 0, 0, 138, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #243 = G_VECTOR_COMPRESS
7330 { 242, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #242 = G_STEP_VECTOR
7331 { 241, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #241 = G_SPLAT_VECTOR
7332 { 240, 4, 1, 0, 0, 0, 0, 134, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #240 = G_SHUFFLE_VECTOR
7333 { 239, 3, 1, 0, 0, 0, 0, 131, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #239 = G_EXTRACT_VECTOR_ELT
7334 { 238, 4, 1, 0, 0, 0, 0, 127, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #238 = G_INSERT_VECTOR_ELT
7335 { 237, 3, 1, 0, 0, 0, 0, 58, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #237 = G_EXTRACT_SUBVECTOR
7336 { 236, 4, 1, 0, 0, 0, 0, 63, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #236 = G_INSERT_SUBVECTOR
7337 { 235, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #235 = G_VSCALE
7338 { 234, 3, 0, 0, 0, 0, 0, 124, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #234 = G_BRJT
7339 { 233, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #233 = G_BR
7340 { 232, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_LLROUND
7341 { 231, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_LROUND
7342 { 230, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_ABS
7343 { 229, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #229 = G_UMAX
7344 { 228, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #228 = G_UMIN
7345 { 227, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #227 = G_SMAX
7346 { 226, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #226 = G_SMIN
7347 { 225, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_PTRMASK
7348 { 224, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_PTR_ADD
7349 { 223, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #223 = G_RESET_FPMODE
7350 { 222, 1, 0, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #222 = G_SET_FPMODE
7351 { 221, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #221 = G_GET_FPMODE
7352 { 220, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #220 = G_RESET_FPENV
7353 { 219, 1, 0, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #219 = G_SET_FPENV
7354 { 218, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #218 = G_GET_FPENV
7355 { 217, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #217 = G_FMAXIMUMNUM
7356 { 216, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #216 = G_FMINIMUMNUM
7357 { 215, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #215 = G_FMAXIMUM
7358 { 214, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #214 = G_FMINIMUM
7359 { 213, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #213 = G_FMAXNUM_IEEE
7360 { 212, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #212 = G_FMINNUM_IEEE
7361 { 211, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #211 = G_FMAXNUM
7362 { 210, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #210 = G_FMINNUM
7363 { 209, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #209 = G_FCANONICALIZE
7364 { 208, 3, 1, 0, 0, 0, 0, 98, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #208 = G_IS_FPCLASS
7365 { 207, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #207 = G_FCOPYSIGN
7366 { 206, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #206 = G_FABS
7367 { 205, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #205 = G_FPTOUI_SAT
7368 { 204, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #204 = G_FPTOSI_SAT
7369 { 203, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #203 = G_UITOFP
7370 { 202, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #202 = G_SITOFP
7371 { 201, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #201 = G_FPTOUI
7372 { 200, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #200 = G_FPTOSI
7373 { 199, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #199 = G_FPTRUNC
7374 { 198, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #198 = G_FPEXT
7375 { 197, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #197 = G_FNEG
7376 { 196, 3, 2, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #196 = G_FFREXP
7377 { 195, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #195 = G_FLDEXP
7378 { 194, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #194 = G_FLOG10
7379 { 193, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #193 = G_FLOG2
7380 { 192, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #192 = G_FLOG
7381 { 191, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #191 = G_FEXP10
7382 { 190, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FEXP2
7383 { 189, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_FEXP
7384 { 188, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FPOWI
7385 { 187, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FPOW
7386 { 186, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_FREM
7387 { 185, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_FDIV
7388 { 184, 4, 1, 0, 0, 0, 0, 46, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FMAD
7389 { 183, 4, 1, 0, 0, 0, 0, 46, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FMA
7390 { 182, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #182 = G_FMUL
7391 { 181, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FSUB
7392 { 180, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #180 = G_FADD
7393 { 179, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_UDIVFIXSAT
7394 { 178, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_SDIVFIXSAT
7395 { 177, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_UDIVFIX
7396 { 176, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_SDIVFIX
7397 { 175, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #175 = G_UMULFIXSAT
7398 { 174, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #174 = G_SMULFIXSAT
7399 { 173, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #173 = G_UMULFIX
7400 { 172, 4, 1, 0, 0, 0, 0, 120, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #172 = G_SMULFIX
7401 { 171, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_SSHLSAT
7402 { 170, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_USHLSAT
7403 { 169, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_SSUBSAT
7404 { 168, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_USUBSAT
7405 { 167, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #167 = G_SADDSAT
7406 { 166, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #166 = G_UADDSAT
7407 { 165, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_SMULH
7408 { 164, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #164 = G_UMULH
7409 { 163, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #163 = G_SMULO
7410 { 162, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #162 = G_UMULO
7411 { 161, 5, 2, 0, 0, 0, 0, 115, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SSUBE
7412 { 160, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_SSUBO
7413 { 159, 5, 2, 0, 0, 0, 0, 115, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #159 = G_SADDE
7414 { 158, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_SADDO
7415 { 157, 5, 2, 0, 0, 0, 0, 115, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #157 = G_USUBE
7416 { 156, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #156 = G_USUBO
7417 { 155, 5, 2, 0, 0, 0, 0, 115, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #155 = G_UADDE
7418 { 154, 4, 2, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #154 = G_UADDO
7419 { 153, 4, 1, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_SELECT
7420 { 152, 3, 1, 0, 0, 0, 0, 112, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_UCMP
7421 { 151, 3, 1, 0, 0, 0, 0, 112, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_SCMP
7422 { 150, 4, 1, 0, 0, 0, 0, 108, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #150 = G_FCMP
7423 { 149, 4, 1, 0, 0, 0, 0, 108, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #149 = G_ICMP
7424 { 148, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #148 = G_ROTL
7425 { 147, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #147 = G_ROTR
7426 { 146, 4, 1, 0, 0, 0, 0, 104, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #146 = G_FSHR
7427 { 145, 4, 1, 0, 0, 0, 0, 104, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #145 = G_FSHL
7428 { 144, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_ASHR
7429 { 143, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_LSHR
7430 { 142, 3, 1, 0, 0, 0, 0, 101, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_SHL
7431 { 141, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #141 = G_ZEXT
7432 { 140, 3, 1, 0, 0, 0, 0, 40, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_SEXT_INREG
7433 { 139, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_SEXT
7434 { 138, 3, 1, 0, 0, 0, 0, 98, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #138 = G_VAARG
7435 { 137, 1, 0, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #137 = G_VASTART
7436 { 136, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_FCONSTANT
7437 { 135, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_CONSTANT
7438 { 134, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_TRUNC
7439 { 133, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ANYEXT
7440 { 132, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #132 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
7441 { 131, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #131 = G_INTRINSIC_CONVERGENT
7442 { 130, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #130 = G_INTRINSIC_W_SIDE_EFFECTS
7443 { 129, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #129 = G_INTRINSIC
7444 { 128, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #128 = G_INVOKE_REGION_START
7445 { 127, 1, 0, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #127 = G_BRINDIRECT
7446 { 126, 2, 0, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #126 = G_BRCOND
7447 { 125, 4, 0, 0, 0, 0, 0, 94, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #125 = G_PREFETCH
7448 { 124, 2, 0, 0, 0, 0, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #124 = G_FENCE
7449 { 123, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #123 = G_ATOMICRMW_USUB_SAT
7450 { 122, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #122 = G_ATOMICRMW_USUB_COND
7451 { 121, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #121 = G_ATOMICRMW_UDEC_WRAP
7452 { 120, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #120 = G_ATOMICRMW_UINC_WRAP
7453 { 119, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #119 = G_ATOMICRMW_FMINIMUM
7454 { 118, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #118 = G_ATOMICRMW_FMAXIMUM
7455 { 117, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #117 = G_ATOMICRMW_FMIN
7456 { 116, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #116 = G_ATOMICRMW_FMAX
7457 { 115, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #115 = G_ATOMICRMW_FSUB
7458 { 114, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #114 = G_ATOMICRMW_FADD
7459 { 113, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #113 = G_ATOMICRMW_UMIN
7460 { 112, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #112 = G_ATOMICRMW_UMAX
7461 { 111, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #111 = G_ATOMICRMW_MIN
7462 { 110, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #110 = G_ATOMICRMW_MAX
7463 { 109, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #109 = G_ATOMICRMW_XOR
7464 { 108, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_OR
7465 { 107, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_NAND
7466 { 106, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_AND
7467 { 105, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_SUB
7468 { 104, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_ADD
7469 { 103, 3, 1, 0, 0, 0, 0, 91, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_XCHG
7470 { 102, 4, 1, 0, 0, 0, 0, 87, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMIC_CMPXCHG
7471 { 101, 5, 2, 0, 0, 0, 0, 82, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
7472 { 100, 5, 1, 0, 0, 0, 0, 77, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_INDEXED_STORE
7473 { 99, 2, 0, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_STORE
7474 { 98, 5, 2, 0, 0, 0, 0, 72, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #98 = G_INDEXED_ZEXTLOAD
7475 { 97, 5, 2, 0, 0, 0, 0, 72, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #97 = G_INDEXED_SEXTLOAD
7476 { 96, 5, 2, 0, 0, 0, 0, 72, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #96 = G_INDEXED_LOAD
7477 { 95, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #95 = G_ZEXTLOAD
7478 { 94, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #94 = G_SEXTLOAD
7479 { 93, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #93 = G_LOAD
7480 { 92, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #92 = G_READSTEADYCOUNTER
7481 { 91, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #91 = G_READCYCLECOUNTER
7482 { 90, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #90 = G_INTRINSIC_ROUNDEVEN
7483 { 89, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #89 = G_INTRINSIC_LLRINT
7484 { 88, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #88 = G_INTRINSIC_LRINT
7485 { 87, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #87 = G_INTRINSIC_ROUND
7486 { 86, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #86 = G_INTRINSIC_TRUNC
7487 { 85, 3, 1, 0, 0, 0, 0, 69, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #85 = G_INTRINSIC_FPTRUNC_ROUND
7488 { 84, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #84 = G_CONSTANT_FOLD_BARRIER
7489 { 83, 2, 1, 0, 0, 0, 0, 67, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #83 = G_FREEZE
7490 { 82, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #82 = G_BITCAST
7491 { 81, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #81 = G_INTTOPTR
7492 { 80, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_PTRTOINT
7493 { 79, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #79 = G_CONCAT_VECTORS
7494 { 78, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #78 = G_BUILD_VECTOR_TRUNC
7495 { 77, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #77 = G_BUILD_VECTOR
7496 { 76, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #76 = G_MERGE_VALUES
7497 { 75, 4, 1, 0, 0, 0, 0, 63, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #75 = G_INSERT
7498 { 74, 2, 1, 0, 0, 0, 0, 61, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #74 = G_UNMERGE_VALUES
7499 { 73, 3, 1, 0, 0, 0, 0, 58, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #73 = G_EXTRACT
7500 { 72, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #72 = G_CONSTANT_POOL
7501 { 71, 5, 1, 0, 0, 0, 0, 53, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_PTRAUTH_GLOBAL_VALUE
7502 { 70, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #70 = G_GLOBAL_VALUE
7503 { 69, 2, 1, 0, 0, 0, 0, 51, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #69 = G_FRAME_INDEX
7504 { 68, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #68 = G_PHI
7505 { 67, 1, 1, 0, 0, 0, 0, 50, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #67 = G_IMPLICIT_DEF
7506 { 66, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #66 = G_ABDU
7507 { 65, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #65 = G_ABDS
7508 { 64, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #64 = G_XOR
7509 { 63, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #63 = G_OR
7510 { 62, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #62 = G_AND
7511 { 61, 4, 2, 0, 0, 0, 0, 46, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #61 = G_UDIVREM
7512 { 60, 4, 2, 0, 0, 0, 0, 46, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #60 = G_SDIVREM
7513 { 59, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_UREM
7514 { 58, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #58 = G_SREM
7515 { 57, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #57 = G_UDIV
7516 { 56, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #56 = G_SDIV
7517 { 55, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #55 = G_MUL
7518 { 54, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SUB
7519 { 53, 3, 1, 0, 0, 0, 0, 43, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #53 = G_ADD
7520 { 52, 3, 1, 0, 0, 0, 0, 40, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_ASSERT_ALIGN
7521 { 51, 3, 1, 0, 0, 0, 0, 40, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #51 = G_ASSERT_ZEXT
7522 { 50, 3, 1, 0, 0, 0, 0, 40, SystemZImpOpBase + 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_ASSERT_SEXT
7523 { 49, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #49 = CONVERGENCECTRL_GLUE
7524 { 48, 2, 1, 0, 0, 0, 0, 13, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #48 = CONVERGENCECTRL_LOOP
7525 { 47, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #47 = CONVERGENCECTRL_ANCHOR
7526 { 46, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #46 = CONVERGENCECTRL_ENTRY
7527 { 45, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #45 = JUMP_TABLE_DEBUG_INFO
7528 { 44, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #44 = MEMBARRIER
7529 { 43, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #43 = FAKE_USE
7530 { 42, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = ICALL_BRANCH_FUNNEL
7531 { 41, 3, 0, 0, 0, 0, 0, 37, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = PATCHABLE_TYPED_EVENT_CALL
7532 { 40, 2, 0, 0, 0, 0, 0, 35, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_EVENT_CALL
7533 { 39, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_TAIL_CALL
7534 { 38, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_FUNCTION_EXIT
7535 { 37, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_RET
7536 { 36, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_FUNCTION_ENTER
7537 { 35, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_OP
7538 { 34, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = FAULTING_OP
7539 { 33, 2, 0, 0, 0, 0, 0, 33, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #33 = LOCAL_ESCAPE
7540 { 32, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #32 = STATEPOINT
7541 { 31, 3, 1, 0, 0, 0, 0, 30, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = PREALLOCATED_ARG
7542 { 30, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_SETUP
7543 { 29, 1, 1, 0, 0, 0, 0, 29, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #29 = LOAD_STACK_GUARD
7544 { 28, 6, 1, 0, 0, 0, 0, 23, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #28 = PATCHPOINT
7545 { 27, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = FENTRY_CALL
7546 { 26, 2, 0, 0, 0, 0, 0, 21, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = STACKMAP
7547 { 25, 2, 1, 0, 0, 0, 0, 19, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #25 = ARITH_FENCE
7548 { 24, 4, 0, 0, 0, 0, 0, 15, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #24 = PSEUDO_PROBE
7549 { 23, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #23 = LIFETIME_END
7550 { 22, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_START
7551 { 21, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #21 = BUNDLE
7552 { 20, 2, 1, 0, 29, 0, 0, 13, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #20 = COPY
7553 { 19, 2, 1, 0, 32, 0, 0, 13, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = REG_SEQUENCE
7554 { 18, 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #18 = DBG_LABEL
7555 { 17, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #17 = DBG_PHI
7556 { 16, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_INSTR_REF
7557 { 15, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_VALUE_LIST
7558 { 14, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE
7559 { 13, 3, 1, 0, 29, 0, 0, 2, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #13 = COPY_TO_REGCLASS
7560 { 12, 4, 1, 0, 0, 0, 0, 9, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #12 = SUBREG_TO_REG
7561 { 11, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = INIT_UNDEF
7562 { 10, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF
7563 { 9, 4, 1, 0, 31, 0, 0, 5, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG
7564 { 8, 3, 1, 0, 30, 0, 0, 2, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG
7565 { 7, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL
7566 { 6, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL
7567 { 5, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL
7568 { 4, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL
7569 { 3, 1, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION
7570 { 2, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR
7571 { 1, 0, 0, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM
7572 { 0, 1, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI
7573 }, {
7574 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7575 /* 1 */
7576 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7577 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7578 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7579 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7580 /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7581 /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7582 /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
7583 /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7584 /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7585 /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
7586 /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7587 /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7588 /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7589 /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7590 /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7591 /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7592 /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7593 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7594 /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7595 /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7596 /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7597 /* 61 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7598 /* 63 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7599 /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7600 /* 69 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7601 /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7602 /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7603 /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7604 /* 87 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7605 /* 91 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7606 /* 94 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7607 /* 98 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7608 /* 101 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7609 /* 104 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7610 /* 108 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7611 /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7612 /* 115 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7613 /* 120 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7614 /* 124 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7615 /* 127 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7616 /* 131 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7617 /* 134 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7618 /* 138 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7619 /* 142 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7620 /* 144 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7621 /* 148 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7622 /* 152 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7623 /* 156 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7624 /* 161 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7625 /* 165 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7626 /* 170 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7627 /* 172 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7628 /* 175 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7629 /* 180 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7630 /* 183 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7631 /* 188 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7632 /* 196 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7633 /* 203 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7634 /* 210 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7635 /* 212 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7636 /* 216 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7637 /* 219 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7638 /* 223 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7639 /* 226 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7640 /* 230 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7641 /* 233 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7642 /* 238 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7643 /* 243 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7644 /* 247 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7645 /* 251 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7646 /* 254 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7647 /* 258 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7648 /* 259 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7649 /* 262 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
7650 /* 263 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7651 /* 266 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7652 /* 272 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7653 /* 278 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7654 /* 284 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7655 /* 290 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7656 /* 296 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7657 /* 298 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7658 /* 304 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7659 /* 305 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7660 /* 308 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7661 /* 312 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7662 /* 314 */ { SystemZ::VR16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7663 /* 316 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7664 /* 318 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7665 /* 320 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7666 /* 322 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7667 /* 328 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7668 /* 333 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7669 /* 339 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7670 /* 345 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7671 /* 350 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7672 /* 351 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7673 /* 352 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7674 /* 353 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7675 /* 357 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7676 /* 363 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7677 /* 369 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7678 /* 373 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7679 /* 377 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7680 /* 381 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7681 /* 385 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7682 /* 388 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7683 /* 391 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7684 /* 397 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7685 /* 402 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7686 /* 408 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7687 /* 413 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7688 /* 419 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7689 /* 424 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7690 /* 430 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7691 /* 435 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7692 /* 441 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7693 /* 443 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7694 /* 448 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7695 /* 453 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7696 /* 458 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7697 /* 463 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7698 /* 468 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7699 /* 473 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7700 /* 478 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7701 /* 483 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7702 /* 488 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7703 /* 493 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7704 /* 496 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7705 /* 498 */ { SystemZ::VR16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7706 /* 502 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7707 /* 506 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7708 /* 510 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7709 /* 512 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7710 /* 514 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7711 /* 517 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7712 /* 522 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7713 /* 527 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7714 /* 530 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7715 /* 533 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7716 /* 537 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7717 /* 542 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7718 /* 545 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7719 /* 548 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7720 /* 553 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7721 /* 556 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7722 /* 559 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7723 /* 562 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7724 /* 565 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7725 /* 568 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7726 /* 571 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7727 /* 574 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7728 /* 580 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7729 /* 583 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7730 /* 586 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7731 /* 590 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7732 /* 593 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7733 /* 595 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7734 /* 597 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7735 /* 602 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7736 /* 606 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7737 /* 609 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7738 /* 611 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7739 /* 614 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7740 /* 618 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7741 /* 621 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7742 /* 624 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7743 /* 626 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7744 /* 629 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7745 /* 632 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7746 /* 635 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7747 /* 639 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7748 /* 643 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7749 /* 648 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7750 /* 653 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7751 /* 657 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7752 /* 662 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7753 /* 667 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7754 /* 671 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7755 /* 673 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7756 /* 675 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7757 /* 679 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7758 /* 681 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7759 /* 685 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7760 /* 690 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7761 /* 695 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7762 /* 699 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7763 /* 701 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7764 /* 703 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7765 /* 707 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7766 /* 709 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7767 /* 713 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7768 /* 715 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7769 /* 717 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7770 /* 720 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7771 /* 724 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7772 /* 727 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7773 /* 731 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7774 /* 733 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7775 /* 736 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7776 /* 740 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7777 /* 743 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7778 /* 747 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7779 /* 750 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7780 /* 754 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7781 /* 756 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7782 /* 758 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7783 /* 763 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7784 /* 767 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7785 /* 771 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7786 /* 774 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7787 /* 779 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7788 /* 783 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7789 /* 787 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7790 /* 790 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7791 /* 793 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7792 /* 797 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7793 /* 801 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7794 /* 803 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7795 /* 805 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7796 /* 807 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7797 /* 812 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7798 /* 816 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7799 /* 818 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7800 /* 822 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7801 /* 825 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7802 /* 829 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7803 /* 834 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7804 /* 838 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7805 /* 844 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7806 /* 848 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7807 /* 851 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7808 /* 855 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7809 /* 857 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7810 /* 862 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7811 /* 866 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7812 /* 870 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7813 /* 873 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7814 /* 877 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7815 /* 881 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7816 /* 884 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7817 /* 887 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7818 /* 890 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7819 /* 893 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7820 /* 896 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7821 /* 899 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7822 /* 902 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7823 /* 905 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7824 /* 908 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7825 /* 913 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7826 /* 915 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7827 /* 919 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7828 /* 922 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7829 /* 925 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7830 /* 928 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7831 /* 933 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7832 /* 936 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7833 /* 941 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7834 /* 943 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7835 /* 945 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7836 /* 947 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7837 /* 951 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7838 /* 953 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7839 /* 957 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7840 /* 959 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7841 /* 964 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7842 /* 969 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7843 /* 974 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7844 /* 979 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7845 /* 982 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7846 /* 984 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7847 /* 988 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7848 /* 990 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7849 /* 992 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7850 /* 993 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7851 /* 995 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7852 /* 997 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7853 /* 1001 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7854 /* 1003 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7855 /* 1006 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7856 /* 1010 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7857 /* 1013 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7858 /* 1017 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7859 /* 1020 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7860 /* 1024 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7861 /* 1029 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7862 /* 1034 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7863 /* 1038 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7864 /* 1041 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7865 /* 1044 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7866 /* 1048 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7867 /* 1051 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7868 /* 1054 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7869 /* 1058 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7870 /* 1061 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7871 /* 1067 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7872 /* 1070 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7873 /* 1075 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7874 /* 1081 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7875 /* 1086 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7876 /* 1091 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7877 /* 1097 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7878 /* 1100 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7879 /* 1104 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7880 /* 1111 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7881 /* 1116 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7882 /* 1122 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7883 /* 1128 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7884 /* 1135 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7885 /* 1141 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7886 /* 1147 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7887 /* 1153 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7888 /* 1158 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7889 /* 1161 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7890 /* 1166 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(2) },
7891 /* 1172 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7892 /* 1176 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7893 /* 1180 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7894 /* 1185 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7895 /* 1187 */ { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7896 /* 1191 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7897 /* 1193 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7898 /* 1196 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7899 /* 1198 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7900 /* 1202 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7901 /* 1204 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7902 /* 1208 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7903 /* 1210 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7904 /* 1214 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7905 /* 1220 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7906 /* 1224 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7907 /* 1230 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7908 /* 1235 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7909 /* 1239 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7910 /* 1245 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7911 /* 1250 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7912 /* 1254 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7913 /* 1258 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7914 /* 1261 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7915 /* 1267 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7916 /* 1272 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7917 /* 1276 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7918 /* 1281 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7919 /* 1285 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7920 /* 1290 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7921 /* 1294 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7922 /* 1299 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7923 /* 1303 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7924 /* 1308 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7925 /* 1312 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7926 /* 1316 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7927 /* 1321 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7928 /* 1326 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7929 /* 1328 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7930 /* 1331 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7931 /* 1333 */ { SystemZ::FP16BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7932 /* 1334 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7933 /* 1340 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7934 /* 1344 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7935 /* 1350 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7936 /* 1354 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7937 /* 1357 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7938 /* 1358 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7939 /* 1364 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7940 /* 1369 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7941 /* 1372 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7942 /* 1377 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7943 /* 1380 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7944 /* 1383 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7945 /* 1388 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7946 /* 1394 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7947 /* 1396 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7948 /* 1401 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7949 /* 1407 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7950 /* 1413 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7951 /* 1418 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7952 /* 1424 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7953 /* 1429 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7954 /* 1433 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7955 /* 1438 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7956 /* 1443 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7957 /* 1445 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7958 /* 1450 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7959 /* 1454 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7960 /* 1458 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7961 /* 1462 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7962 /* 1466 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7963 /* 1471 */ { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7964 /* 1473 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7965 /* 1479 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7966 /* 1482 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7967 /* 1487 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7968 /* 1492 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7969 /* 1496 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7970 /* 1499 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7971 /* 1504 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7972 /* 1507 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7973 /* 1510 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7974 /* 1514 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7975 /* 1519 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7976 /* 1523 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7977 /* 1526 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7978 /* 1530 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7979 /* 1533 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7980 /* 1538 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7981 /* 1542 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7982 /* 1547 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7983 /* 1551 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7984 /* 1554 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7985 /* 1557 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7986 /* 1560 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7987 /* 1564 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7988 /* 1568 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7989 /* 1572 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7990 /* 1576 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7991 /* 1582 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7992 /* 1587 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7993 /* 1592 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7994 /* 1596 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7995 /* 1602 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7996 /* 1608 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7997 /* 1610 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7998 /* 1616 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7999 /* 1620 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8000 /* 1623 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
8001 /* 1627 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8002 /* 1632 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8003 /* 1638 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8004 /* 1642 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8005 /* 1647 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
8006 /* 1651 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
8007 /* 1655 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
8008 /* 1659 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8009 /* 1664 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8010 /* 1668 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8011 /* 1674 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
8012 /* 1679 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
8013 /* 1684 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8014 /* 1687 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8015 /* 1688 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8016 /* 1693 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8017 /* 1697 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8018 /* 1701 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8019 /* 1704 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8020 /* 1707 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8021 /* 1709 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8022 /* 1711 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8023 /* 1715 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8024 /* 1719 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8025 /* 1723 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
8026 /* 1727 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8027 /* 1731 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8028 /* 1735 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8029 /* 1738 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
8030 }, {
8031 /* 0 */
8032 /* 0 */ SystemZ::CC,
8033 /* 1 */ SystemZ::FPC, SystemZ::CC,
8034 /* 3 */ SystemZ::FPC, SystemZ::R14D, SystemZ::CC,
8035 /* 6 */ SystemZ::FPC, SystemZ::R3D, SystemZ::CC,
8036 /* 9 */ SystemZ::FPC, SystemZ::R7D, SystemZ::CC,
8037 /* 12 */ SystemZ::FPC,
8038 /* 13 */ SystemZ::R15D, SystemZ::R15D, SystemZ::CC,
8039 /* 16 */ SystemZ::R15D, SystemZ::R1D, SystemZ::R15D, SystemZ::CC,
8040 /* 20 */ SystemZ::R14D, SystemZ::CC,
8041 /* 22 */ SystemZ::R3D, SystemZ::R4D, SystemZ::R3D, SystemZ::CC,
8042 /* 26 */ SystemZ::CC, SystemZ::CC,
8043 /* 28 */ SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
8044 /* 35 */ SystemZ::R0L, SystemZ::CC,
8045 /* 37 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC, SystemZ::R1D,
8046 /* 41 */ SystemZ::R1L, SystemZ::CC,
8047 /* 43 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC,
8048 /* 46 */ SystemZ::R0L, SystemZ::R1L, SystemZ::CC,
8049 /* 49 */ SystemZ::R0D, SystemZ::R1D,
8050 /* 51 */ SystemZ::R2L, SystemZ::R2L,
8051 /* 53 */ SystemZ::R0L, SystemZ::R1L,
8052 /* 55 */ SystemZ::R0L,
8053 /* 56 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R0D, SystemZ::CC,
8054 /* 60 */ SystemZ::R0L, SystemZ::R1D,
8055 /* 62 */ SystemZ::R0D, SystemZ::CC,
8056 /* 64 */ SystemZ::FPC, SystemZ::R0L, SystemZ::F4Q, SystemZ::CC, SystemZ::R1L, SystemZ::F0Q,
8057 /* 70 */ SystemZ::R0D, SystemZ::R0D, SystemZ::CC,
8058 /* 73 */ SystemZ::R1L,
8059 /* 74 */ SystemZ::R1L, SystemZ::R2D,
8060 /* 76 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC,
8061 /* 81 */ SystemZ::FPC, SystemZ::FPC,
8062 /* 83 */ SystemZ::R0L, SystemZ::R1L, SystemZ::R0L, SystemZ::CC,
8063 /* 87 */ SystemZ::CC, SystemZ::R0L, SystemZ::R1D,
8064 /* 90 */ SystemZ::R1D, SystemZ::CC,
8065 /* 92 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::CC, SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R5D,
8066 }
8067};
8068
8069
8070#ifdef __GNUC__
8071#pragma GCC diagnostic push
8072#pragma GCC diagnostic ignored "-Woverlength-strings"
8073#endif
8074extern const char SystemZInstrNameData[] = {
8075 /* 0 */ "G_FLOG10\000"
8076 /* 9 */ "G_FEXP10\000"
8077 /* 18 */ "CU21\000"
8078 /* 23 */ "SAM31\000"
8079 /* 29 */ "CU41\000"
8080 /* 34 */ "CU12\000"
8081 /* 39 */ "IC32\000"
8082 /* 44 */ "LDE32\000"
8083 /* 50 */ "CondStoreF32\000"
8084 /* 63 */ "SelectF32\000"
8085 /* 73 */ "RISBG32\000"
8086 /* 81 */ "VL32\000"
8087 /* 86 */ "VLVGP32\000"
8088 /* 94 */ "LDR32\000"
8089 /* 100 */ "VLR32\000"
8090 /* 106 */ "SelectVR32\000"
8091 /* 117 */ "VST32\000"
8092 /* 123 */ "LCDFR_32\000"
8093 /* 132 */ "LNDFR_32\000"
8094 /* 141 */ "LPDFR_32\000"
8095 /* 150 */ "CondStore32\000"
8096 /* 162 */ "Select32\000"
8097 /* 171 */ "CU42\000"
8098 /* 176 */ "G_FLOG2\000"
8099 /* 184 */ "G_FATAN2\000"
8100 /* 193 */ "TRAP2\000"
8101 /* 199 */ "G_FEXP2\000"
8102 /* 207 */ "CU14\000"
8103 /* 212 */ "SAM24\000"
8104 /* 218 */ "CU24\000"
8105 /* 223 */ "IIHF64\000"
8106 /* 230 */ "NIHF64\000"
8107 /* 237 */ "OIHF64\000"
8108 /* 244 */ "XIHF64\000"
8109 /* 251 */ "IILF64\000"
8110 /* 258 */ "NILF64\000"
8111 /* 265 */ "OILF64\000"
8112 /* 272 */ "XILF64\000"
8113 /* 279 */ "CondStoreF64\000"
8114 /* 292 */ "SelectF64\000"
8115 /* 302 */ "IIHH64\000"
8116 /* 309 */ "NIHH64\000"
8117 /* 316 */ "OIHH64\000"
8118 /* 323 */ "TMHH64\000"
8119 /* 330 */ "IILH64\000"
8120 /* 337 */ "NILH64\000"
8121 /* 344 */ "OILH64\000"
8122 /* 351 */ "TMLH64\000"
8123 /* 358 */ "CallBRASL_XPLINK64\000"
8124 /* 377 */ "CallBASR_XPLINK64\000"
8125 /* 395 */ "IIHL64\000"
8126 /* 402 */ "NIHL64\000"
8127 /* 409 */ "OIHL64\000"
8128 /* 416 */ "TMHL64\000"
8129 /* 423 */ "IILL64\000"
8130 /* 430 */ "NILL64\000"
8131 /* 437 */ "OILL64\000"
8132 /* 444 */ "TMLL64\000"
8133 /* 451 */ "VL64\000"
8134 /* 456 */ "SAM64\000"
8135 /* 462 */ "VLR64\000"
8136 /* 468 */ "SelectVR64\000"
8137 /* 479 */ "VST64\000"
8138 /* 485 */ "CondStore64\000"
8139 /* 497 */ "Select64\000"
8140 /* 506 */ "TRAP4\000"
8141 /* 512 */ "LE16\000"
8142 /* 517 */ "STE16\000"
8143 /* 523 */ "VL16\000"
8144 /* 528 */ "LDR16\000"
8145 /* 534 */ "LER16\000"
8146 /* 540 */ "VST16\000"
8147 /* 546 */ "LFER_16\000"
8148 /* 554 */ "LZER_16\000"
8149 /* 562 */ "LCDFR_16\000"
8150 /* 571 */ "LNDFR_16\000"
8151 /* 580 */ "LPDFR_16\000"
8152 /* 589 */ "LEFR_16\000"
8153 /* 597 */ "CondStore16\000"
8154 /* 609 */ "SelectF128\000"
8155 /* 620 */ "L128\000"
8156 /* 625 */ "PAIR128\000"
8157 /* 633 */ "SelectVR128\000"
8158 /* 645 */ "ST128\000"
8159 /* 651 */ "AEXT128\000"
8160 /* 659 */ "ZEXT128\000"
8161 /* 667 */ "Select128\000"
8162 /* 677 */ "CondStore8\000"
8163 /* 688 */ "LAA\000"
8164 /* 692 */ "PROBED_ALLOCA\000"
8165 /* 706 */ "SLDA\000"
8166 /* 711 */ "SRDA\000"
8167 /* 716 */ "ESEA\000"
8168 /* 721 */ "LPTEA\000"
8169 /* 727 */ "VFA\000"
8170 /* 731 */ "SIGA\000"
8171 /* 736 */ "ECPGA\000"
8172 /* 742 */ "UNPKA\000"
8173 /* 748 */ "SPKA\000"
8174 /* 753 */ "SLA\000"
8175 /* 757 */ "VGFMA\000"
8176 /* 763 */ "VFMA\000"
8177 /* 768 */ "G_FMA\000"
8178 /* 774 */ "G_STRICT_FMA\000"
8179 /* 787 */ "KMA\000"
8180 /* 791 */ "VFNMA\000"
8181 /* 797 */ "NNPA\000"
8182 /* 802 */ "PPA\000"
8183 /* 806 */ "LEDBRA\000"
8184 /* 813 */ "CFDBRA\000"
8185 /* 820 */ "CGDBRA\000"
8186 /* 827 */ "FIDBRA\000"
8187 /* 834 */ "CFEBRA\000"
8188 /* 841 */ "CGEBRA\000"
8189 /* 848 */ "FIEBRA\000"
8190 /* 855 */ "CDFBRA\000"
8191 /* 862 */ "CEFBRA\000"
8192 /* 869 */ "CXFBRA\000"
8193 /* 876 */ "CDGBRA\000"
8194 /* 883 */ "CEGBRA\000"
8195 /* 890 */ "CXGBRA\000"
8196 /* 897 */ "LDXBRA\000"
8197 /* 904 */ "LEXBRA\000"
8198 /* 911 */ "CFXBRA\000"
8199 /* 918 */ "CGXBRA\000"
8200 /* 925 */ "FIXBRA\000"
8201 /* 932 */ "LRA\000"
8202 /* 936 */ "VESRA\000"
8203 /* 942 */ "VSRA\000"
8204 /* 947 */ "ADTRA\000"
8205 /* 953 */ "DDTRA\000"
8206 /* 959 */ "CGDTRA\000"
8207 /* 966 */ "MDTRA\000"
8208 /* 972 */ "SDTRA\000"
8209 /* 978 */ "CDGTRA\000"
8210 /* 985 */ "CXGTRA\000"
8211 /* 992 */ "AXTRA\000"
8212 /* 998 */ "DXTRA\000"
8213 /* 1004 */ "CGXTRA\000"
8214 /* 1011 */ "MXTRA\000"
8215 /* 1017 */ "SXTRA\000"
8216 /* 1023 */ "LURA\000"
8217 /* 1028 */ "STURA\000"
8218 /* 1034 */ "BSA\000"
8219 /* 1038 */ "KDSA\000"
8220 /* 1043 */ "ESTA\000"
8221 /* 1048 */ "MSTA\000"
8222 /* 1053 */ "VA\000"
8223 /* 1056 */ "CPYA\000"
8224 /* 1061 */ "VGFMAB\000"
8225 /* 1068 */ "VESRAB\000"
8226 /* 1075 */ "VSRAB\000"
8227 /* 1081 */ "VAB\000"
8228 /* 1085 */ "LLXAB\000"
8229 /* 1091 */ "LCBB\000"
8230 /* 1096 */ "VLBB\000"
8231 /* 1101 */ "VACCB\000"
8232 /* 1107 */ "VECB\000"
8233 /* 1112 */ "VLCB\000"
8234 /* 1117 */ "VSTRCB\000"
8235 /* 1124 */ "VFADB\000"
8236 /* 1130 */ "WFADB\000"
8237 /* 1136 */ "VFMADB\000"
8238 /* 1143 */ "WFMADB\000"
8239 /* 1150 */ "VFNMADB\000"
8240 /* 1158 */ "WFNMADB\000"
8241 /* 1166 */ "WFCDB\000"
8242 /* 1172 */ "VFLCDB\000"
8243 /* 1179 */ "WFLCDB\000"
8244 /* 1186 */ "TCDB\000"
8245 /* 1191 */ "VFDDB\000"
8246 /* 1197 */ "WFDDB\000"
8247 /* 1203 */ "VFCEDB\000"
8248 /* 1210 */ "WFCEDB\000"
8249 /* 1217 */ "VFCHEDB\000"
8250 /* 1225 */ "WFCHEDB\000"
8251 /* 1233 */ "VFKHEDB\000"
8252 /* 1241 */ "WFKHEDB\000"
8253 /* 1249 */ "VFKEDB\000"
8254 /* 1256 */ "WFKEDB\000"
8255 /* 1263 */ "VLEDB\000"
8256 /* 1269 */ "WLEDB\000"
8257 /* 1275 */ "VCGDB\000"
8258 /* 1281 */ "WCGDB\000"
8259 /* 1287 */ "VCLGDB\000"
8260 /* 1294 */ "WCLGDB\000"
8261 /* 1301 */ "VFCHDB\000"
8262 /* 1308 */ "WFCHDB\000"
8263 /* 1315 */ "VFKHDB\000"
8264 /* 1322 */ "WFKHDB\000"
8265 /* 1329 */ "VFTCIDB\000"
8266 /* 1337 */ "WFTCIDB\000"
8267 /* 1345 */ "VFIDB\000"
8268 /* 1351 */ "WFIDB\000"
8269 /* 1357 */ "WFKDB\000"
8270 /* 1363 */ "VSLDB\000"
8271 /* 1369 */ "VFMDB\000"
8272 /* 1375 */ "WFMDB\000"
8273 /* 1381 */ "VBLENDB\000"
8274 /* 1389 */ "VFMINDB\000"
8275 /* 1397 */ "WFMINDB\000"
8276 /* 1405 */ "VFLNDB\000"
8277 /* 1412 */ "WFLNDB\000"
8278 /* 1419 */ "VFPSODB\000"
8279 /* 1427 */ "WFPSODB\000"
8280 /* 1435 */ "VFLPDB\000"
8281 /* 1442 */ "WFLPDB\000"
8282 /* 1449 */ "VFSQDB\000"
8283 /* 1456 */ "WFSQDB\000"
8284 /* 1463 */ "VFSDB\000"
8285 /* 1469 */ "WFSDB\000"
8286 /* 1475 */ "VFMSDB\000"
8287 /* 1482 */ "WFMSDB\000"
8288 /* 1489 */ "VFNMSDB\000"
8289 /* 1497 */ "WFNMSDB\000"
8290 /* 1505 */ "VFMAXDB\000"
8291 /* 1513 */ "WFMAXDB\000"
8292 /* 1521 */ "LXDB\000"
8293 /* 1526 */ "MXDB\000"
8294 /* 1531 */ "VFAEB\000"
8295 /* 1537 */ "VMAEB\000"
8296 /* 1543 */ "TCEB\000"
8297 /* 1548 */ "VLDEB\000"
8298 /* 1554 */ "WLDEB\000"
8299 /* 1560 */ "MDEB\000"
8300 /* 1565 */ "VFEEB\000"
8301 /* 1571 */ "MEEB\000"
8302 /* 1576 */ "VCFEB\000"
8303 /* 1582 */ "WCFEB\000"
8304 /* 1588 */ "VCLFEB\000"
8305 /* 1595 */ "WCLFEB\000"
8306 /* 1602 */ "KEB\000"
8307 /* 1606 */ "VMALEB\000"
8308 /* 1613 */ "VMLEB\000"
8309 /* 1619 */ "VLEB\000"
8310 /* 1624 */ "VMEB\000"
8311 /* 1629 */ "VFENEB\000"
8312 /* 1636 */ "SQEB\000"
8313 /* 1641 */ "MSEB\000"
8314 /* 1646 */ "VSTEB\000"
8315 /* 1652 */ "LXEB\000"
8316 /* 1657 */ "VCEFB\000"
8317 /* 1663 */ "WCEFB\000"
8318 /* 1669 */ "VCELFB\000"
8319 /* 1676 */ "WCELFB\000"
8320 /* 1683 */ "VCDGB\000"
8321 /* 1689 */ "WCDGB\000"
8322 /* 1695 */ "VSEGB\000"
8323 /* 1701 */ "VCDLGB\000"
8324 /* 1708 */ "WCDLGB\000"
8325 /* 1715 */ "VAVGB\000"
8326 /* 1721 */ "VLVGB\000"
8327 /* 1727 */ "VMAHB\000"
8328 /* 1733 */ "VCHB\000"
8329 /* 1738 */ "VMALHB\000"
8330 /* 1745 */ "VMLHB\000"
8331 /* 1751 */ "VUPLHB\000"
8332 /* 1758 */ "VMHB\000"
8333 /* 1763 */ "VUPHB\000"
8334 /* 1769 */ "VMRHB\000"
8335 /* 1775 */ "VSCBIB\000"
8336 /* 1782 */ "CIB\000"
8337 /* 1786 */ "VLEIB\000"
8338 /* 1792 */ "CGIB\000"
8339 /* 1797 */ "CLGIB\000"
8340 /* 1803 */ "CLIB\000"
8341 /* 1808 */ "VREPIB\000"
8342 /* 1815 */ "VMALB\000"
8343 /* 1821 */ "PALB\000"
8344 /* 1826 */ "VECLB\000"
8345 /* 1832 */ "VAVGLB\000"
8346 /* 1839 */ "VCHLB\000"
8347 /* 1845 */ "VUPLLB\000"
8348 /* 1852 */ "VERLLB\000"
8349 /* 1859 */ "VMLB\000"
8350 /* 1864 */ "VMNLB\000"
8351 /* 1870 */ "VUPLB\000"
8352 /* 1876 */ "VMRLB\000"
8353 /* 1882 */ "VESRLB\000"
8354 /* 1889 */ "VSRLB\000"
8355 /* 1895 */ "VESLB\000"
8356 /* 1901 */ "VSLB\000"
8357 /* 1906 */ "PTLB\000"
8358 /* 1911 */ "VMXLB\000"
8359 /* 1917 */ "VGEMB\000"
8360 /* 1923 */ "VGFMB\000"
8361 /* 1929 */ "VGMB\000"
8362 /* 1934 */ "VERIMB\000"
8363 /* 1941 */ "SRNMB\000"
8364 /* 1947 */ "VSUMB\000"
8365 /* 1953 */ "VMNB\000"
8366 /* 1958 */ "VMAOB\000"
8367 /* 1964 */ "VMALOB\000"
8368 /* 1971 */ "VMLOB\000"
8369 /* 1977 */ "VMOB\000"
8370 /* 1982 */ "VLREPB\000"
8371 /* 1989 */ "VREPB\000"
8372 /* 1995 */ "VLPB\000"
8373 /* 2000 */ "VCEQB\000"
8374 /* 2006 */ "CRB\000"
8375 /* 2010 */ "CGRB\000"
8376 /* 2015 */ "CLGRB\000"
8377 /* 2021 */ "CLRB\000"
8378 /* 2026 */ "VISTRB\000"
8379 /* 2033 */ "VFASB\000"
8380 /* 2039 */ "WFASB\000"
8381 /* 2045 */ "VFMASB\000"
8382 /* 2052 */ "WFMASB\000"
8383 /* 2059 */ "VFNMASB\000"
8384 /* 2067 */ "WFNMASB\000"
8385 /* 2075 */ "WFCSB\000"
8386 /* 2081 */ "VFLCSB\000"
8387 /* 2088 */ "WFLCSB\000"
8388 /* 2095 */ "VFDSB\000"
8389 /* 2101 */ "WFDSB\000"
8390 /* 2107 */ "VFCESB\000"
8391 /* 2114 */ "WFCESB\000"
8392 /* 2121 */ "VFCHESB\000"
8393 /* 2129 */ "WFCHESB\000"
8394 /* 2137 */ "VFKHESB\000"
8395 /* 2145 */ "WFKHESB\000"
8396 /* 2153 */ "VFKESB\000"
8397 /* 2160 */ "WFKESB\000"
8398 /* 2167 */ "VFCHSB\000"
8399 /* 2174 */ "WFCHSB\000"
8400 /* 2181 */ "VFKHSB\000"
8401 /* 2188 */ "WFKHSB\000"
8402 /* 2195 */ "VFTCISB\000"
8403 /* 2203 */ "WFTCISB\000"
8404 /* 2211 */ "VFISB\000"
8405 /* 2217 */ "WFISB\000"
8406 /* 2223 */ "WFKSB\000"
8407 /* 2229 */ "VFMSB\000"
8408 /* 2235 */ "WFMSB\000"
8409 /* 2241 */ "VFMINSB\000"
8410 /* 2249 */ "WFMINSB\000"
8411 /* 2257 */ "VFLNSB\000"
8412 /* 2264 */ "WFLNSB\000"
8413 /* 2271 */ "VFPSOSB\000"
8414 /* 2279 */ "WFPSOSB\000"
8415 /* 2287 */ "VFLPSB\000"
8416 /* 2294 */ "WFLPSB\000"
8417 /* 2301 */ "VFSQSB\000"
8418 /* 2308 */ "WFSQSB\000"
8419 /* 2315 */ "VSTRSB\000"
8420 /* 2322 */ "VFSSB\000"
8421 /* 2328 */ "WFSSB\000"
8422 /* 2334 */ "VFMSSB\000"
8423 /* 2341 */ "WFMSSB\000"
8424 /* 2348 */ "VFNMSSB\000"
8425 /* 2356 */ "WFNMSSB\000"
8426 /* 2364 */ "VSB\000"
8427 /* 2368 */ "VFMAXSB\000"
8428 /* 2376 */ "WFMAXSB\000"
8429 /* 2384 */ "VPOPCTB\000"
8430 /* 2392 */ "G_FSUB\000"
8431 /* 2399 */ "G_STRICT_FSUB\000"
8432 /* 2413 */ "G_ATOMICRMW_FSUB\000"
8433 /* 2430 */ "G_SUB\000"
8434 /* 2436 */ "G_ATOMICRMW_SUB\000"
8435 /* 2452 */ "VESRAVB\000"
8436 /* 2460 */ "VCVB\000"
8437 /* 2465 */ "VLGVB\000"
8438 /* 2471 */ "VERLLVB\000"
8439 /* 2479 */ "VESRLVB\000"
8440 /* 2487 */ "VESLVB\000"
8441 /* 2494 */ "WFAXB\000"
8442 /* 2500 */ "WFMAXB\000"
8443 /* 2507 */ "WFNMAXB\000"
8444 /* 2515 */ "WFCXB\000"
8445 /* 2521 */ "WFLCXB\000"
8446 /* 2528 */ "TCXB\000"
8447 /* 2533 */ "WFDXB\000"
8448 /* 2539 */ "WFCEXB\000"
8449 /* 2546 */ "WFCHEXB\000"
8450 /* 2554 */ "WFKHEXB\000"
8451 /* 2562 */ "WFKEXB\000"
8452 /* 2569 */ "WFCHXB\000"
8453 /* 2576 */ "WFKHXB\000"
8454 /* 2583 */ "WFTCIXB\000"
8455 /* 2591 */ "WFIXB\000"
8456 /* 2597 */ "WFKXB\000"
8457 /* 2603 */ "WFMXB\000"
8458 /* 2609 */ "VMXB\000"
8459 /* 2614 */ "WFMINXB\000"
8460 /* 2622 */ "WFLNXB\000"
8461 /* 2629 */ "WFPSOXB\000"
8462 /* 2637 */ "WFLPXB\000"
8463 /* 2644 */ "WFSQXB\000"
8464 /* 2651 */ "WFSXB\000"
8465 /* 2657 */ "WFMSXB\000"
8466 /* 2664 */ "WFNMSXB\000"
8467 /* 2672 */ "WFMAXXB\000"
8468 /* 2680 */ "VSTRCZB\000"
8469 /* 2688 */ "VFAEZB\000"
8470 /* 2695 */ "VFEEZB\000"
8471 /* 2702 */ "VLLEZB\000"
8472 /* 2709 */ "VFENEZB\000"
8473 /* 2717 */ "VCLZB\000"
8474 /* 2723 */ "VSTRSZB\000"
8475 /* 2731 */ "VCTZB\000"
8476 /* 2737 */ "IAC\000"
8477 /* 2741 */ "KMAC\000"
8478 /* 2746 */ "SAC\000"
8479 /* 2750 */ "VAC\000"
8480 /* 2754 */ "BC\000"
8481 /* 2757 */ "VACC\000"
8482 /* 2762 */ "VACCC\000"
8483 /* 2768 */ "PCC\000"
8484 /* 2772 */ "DFLTCC\000"
8485 /* 2779 */ "VEC\000"
8486 /* 2783 */ "CFC\000"
8487 /* 2787 */ "WFC\000"
8488 /* 2791 */ "LLGC\000"
8489 /* 2796 */ "MSGC\000"
8490 /* 2801 */ "BIC\000"
8491 /* 2805 */ "G_INTRINSIC\000"
8492 /* 2817 */ "SCKC\000"
8493 /* 2822 */ "STCKC\000"
8494 /* 2828 */ "MSGRKC\000"
8495 /* 2835 */ "MSRKC\000"
8496 /* 2841 */ "ALC\000"
8497 /* 2845 */ "CLC\000"
8498 /* 2849 */ "LLC\000"
8499 /* 2853 */ "VLC\000"
8500 /* 2857 */ "KMC\000"
8501 /* 2861 */ "TBEGINC\000"
8502 /* 2869 */ "G_FPTRUNC\000"
8503 /* 2879 */ "G_INTRINSIC_TRUNC\000"
8504 /* 2897 */ "G_TRUNC\000"
8505 /* 2905 */ "G_BUILD_VECTOR_TRUNC\000"
8506 /* 2926 */ "VNC\000"
8507 /* 2930 */ "PROBED_STACKALLOC\000"
8508 /* 2948 */ "XPLINK_STACKALLOC\000"
8509 /* 2966 */ "G_DYN_STACKALLOC\000"
8510 /* 2983 */ "ADJDYNALLOC\000"
8511 /* 2995 */ "STOC\000"
8512 /* 3000 */ "VOC\000"
8513 /* 3004 */ "EFPC\000"
8514 /* 3009 */ "LFPC\000"
8515 /* 3014 */ "SFPC\000"
8516 /* 3019 */ "STFPC\000"
8517 /* 3025 */ "BRC\000"
8518 /* 3029 */ "VSTRC\000"
8519 /* 3035 */ "LGSC\000"
8520 /* 3040 */ "STGSC\000"
8521 /* 3046 */ "MSC\000"
8522 /* 3050 */ "CMPSC\000"
8523 /* 3056 */ "STC\000"
8524 /* 3060 */ "MVC\000"
8525 /* 3064 */ "SVC\000"
8526 /* 3068 */ "XC\000"
8527 /* 3071 */ "G_FMAD\000"
8528 /* 3078 */ "G_INDEXED_SEXTLOAD\000"
8529 /* 3097 */ "G_SEXTLOAD\000"
8530 /* 3108 */ "G_INDEXED_ZEXTLOAD\000"
8531 /* 3127 */ "G_ZEXTLOAD\000"
8532 /* 3138 */ "G_INDEXED_LOAD\000"
8533 /* 3153 */ "G_LOAD\000"
8534 /* 3160 */ "CD\000"
8535 /* 3163 */ "G_VECREDUCE_FADD\000"
8536 /* 3180 */ "G_FADD\000"
8537 /* 3187 */ "G_VECREDUCE_SEQ_FADD\000"
8538 /* 3208 */ "G_STRICT_FADD\000"
8539 /* 3222 */ "G_ATOMICRMW_FADD\000"
8540 /* 3239 */ "G_VECREDUCE_ADD\000"
8541 /* 3255 */ "G_ADD\000"
8542 /* 3261 */ "G_PTR_ADD\000"
8543 /* 3271 */ "G_ATOMICRMW_ADD\000"
8544 /* 3287 */ "VLED\000"
8545 /* 3292 */ "PFD\000"
8546 /* 3296 */ "VFD\000"
8547 /* 3300 */ "VCGD\000"
8548 /* 3305 */ "VCLGD\000"
8549 /* 3311 */ "WFLLD\000"
8550 /* 3317 */ "VSLD\000"
8551 /* 3322 */ "KIMD\000"
8552 /* 3327 */ "KLMD\000"
8553 /* 3332 */ "G_ATOMICRMW_NAND\000"
8554 /* 3349 */ "G_VECREDUCE_AND\000"
8555 /* 3365 */ "G_AND\000"
8556 /* 3371 */ "G_ATOMICRMW_AND\000"
8557 /* 3387 */ "VBLEND\000"
8558 /* 3394 */ "TEND\000"
8559 /* 3399 */ "LIFETIME_END\000"
8560 /* 3412 */ "G_BRCOND\000"
8561 /* 3421 */ "G_ATOMICRMW_USUB_COND\000"
8562 /* 3443 */ "ETND\000"
8563 /* 3448 */ "G_LLROUND\000"
8564 /* 3458 */ "G_LROUND\000"
8565 /* 3467 */ "G_INTRINSIC_ROUND\000"
8566 /* 3485 */ "G_INTRINSIC_FPTRUNC_ROUND\000"
8567 /* 3511 */ "LPD\000"
8568 /* 3515 */ "SQD\000"
8569 /* 3519 */ "LOAD_STACK_GUARD\000"
8570 /* 3536 */ "VFLRD\000"
8571 /* 3542 */ "WFLRD\000"
8572 /* 3548 */ "VSRD\000"
8573 /* 3553 */ "MSD\000"
8574 /* 3557 */ "STD\000"
8575 /* 3561 */ "VCVD\000"
8576 /* 3566 */ "LXD\000"
8577 /* 3570 */ "MXD\000"
8578 /* 3574 */ "VFAE\000"
8579 /* 3579 */ "LAE\000"
8580 /* 3583 */ "VMAE\000"
8581 /* 3588 */ "PSEUDO_PROBE\000"
8582 /* 3601 */ "RRBE\000"
8583 /* 3606 */ "G_SSUBE\000"
8584 /* 3614 */ "G_USUBE\000"
8585 /* 3622 */ "TRACE\000"
8586 /* 3628 */ "VFCE\000"
8587 /* 3633 */ "G_FENCE\000"
8588 /* 3641 */ "ARITH_FENCE\000"
8589 /* 3653 */ "REG_SEQUENCE\000"
8590 /* 3666 */ "G_SADDE\000"
8591 /* 3674 */ "G_UADDE\000"
8592 /* 3682 */ "VLDE\000"
8593 /* 3687 */ "MDE\000"
8594 /* 3691 */ "G_GET_FPMODE\000"
8595 /* 3704 */ "G_RESET_FPMODE\000"
8596 /* 3719 */ "G_SET_FPMODE\000"
8597 /* 3732 */ "G_FMINNUM_IEEE\000"
8598 /* 3747 */ "G_FMAXNUM_IEEE\000"
8599 /* 3762 */ "VFEE\000"
8600 /* 3767 */ "MEE\000"
8601 /* 3771 */ "VFCHE\000"
8602 /* 3777 */ "CIBAsmNHE\000"
8603 /* 3787 */ "CGIBAsmNHE\000"
8604 /* 3798 */ "CLGIBAsmNHE\000"
8605 /* 3810 */ "CLIBAsmNHE\000"
8606 /* 3821 */ "CRBAsmNHE\000"
8607 /* 3831 */ "CGRBAsmNHE\000"
8608 /* 3842 */ "CLGRBAsmNHE\000"
8609 /* 3854 */ "CLRBAsmNHE\000"
8610 /* 3865 */ "LOCAsmNHE\000"
8611 /* 3875 */ "STOCAsmNHE\000"
8612 /* 3886 */ "LOCGAsmNHE\000"
8613 /* 3897 */ "STOCGAsmNHE\000"
8614 /* 3909 */ "JGAsmNHE\000"
8615 /* 3918 */ "LOCFHAsmNHE\000"
8616 /* 3930 */ "STOCFHAsmNHE\000"
8617 /* 3943 */ "BIAsmNHE\000"
8618 /* 3952 */ "LOCHIAsmNHE\000"
8619 /* 3964 */ "LOCGHIAsmNHE\000"
8620 /* 3977 */ "LOCHHIAsmNHE\000"
8621 /* 3990 */ "CIJAsmNHE\000"
8622 /* 4000 */ "CGIJAsmNHE\000"
8623 /* 4011 */ "CLGIJAsmNHE\000"
8624 /* 4023 */ "CLIJAsmNHE\000"
8625 /* 4034 */ "CRJAsmNHE\000"
8626 /* 4044 */ "CGRJAsmNHE\000"
8627 /* 4055 */ "CLGRJAsmNHE\000"
8628 /* 4067 */ "CLRJAsmNHE\000"
8629 /* 4078 */ "BRAsmNHE\000"
8630 /* 4087 */ "LOCRAsmNHE\000"
8631 /* 4098 */ "LOCGRAsmNHE\000"
8632 /* 4110 */ "SELGRAsmNHE\000"
8633 /* 4122 */ "LOCFHRAsmNHE\000"
8634 /* 4135 */ "SELFHRAsmNHE\000"
8635 /* 4148 */ "SELRAsmNHE\000"
8636 /* 4159 */ "CLGTAsmNHE\000"
8637 /* 4170 */ "CITAsmNHE\000"
8638 /* 4180 */ "CLFITAsmNHE\000"
8639 /* 4192 */ "CGITAsmNHE\000"
8640 /* 4203 */ "CLGITAsmNHE\000"
8641 /* 4215 */ "CLTAsmNHE\000"
8642 /* 4225 */ "CRTAsmNHE\000"
8643 /* 4235 */ "CGRTAsmNHE\000"
8644 /* 4246 */ "CLGRTAsmNHE\000"
8645 /* 4258 */ "CLRTAsmNHE\000"
8646 /* 4269 */ "CIBAsmHE\000"
8647 /* 4278 */ "CGIBAsmHE\000"
8648 /* 4288 */ "CLGIBAsmHE\000"
8649 /* 4299 */ "CLIBAsmHE\000"
8650 /* 4309 */ "CRBAsmHE\000"
8651 /* 4318 */ "CGRBAsmHE\000"
8652 /* 4328 */ "CLGRBAsmHE\000"
8653 /* 4339 */ "CLRBAsmHE\000"
8654 /* 4349 */ "LOCAsmHE\000"
8655 /* 4358 */ "STOCAsmHE\000"
8656 /* 4368 */ "LOCGAsmHE\000"
8657 /* 4378 */ "STOCGAsmHE\000"
8658 /* 4389 */ "JGAsmHE\000"
8659 /* 4397 */ "LOCFHAsmHE\000"
8660 /* 4408 */ "STOCFHAsmHE\000"
8661 /* 4420 */ "BIAsmHE\000"
8662 /* 4428 */ "LOCHIAsmHE\000"
8663 /* 4439 */ "LOCGHIAsmHE\000"
8664 /* 4451 */ "LOCHHIAsmHE\000"
8665 /* 4463 */ "CIJAsmHE\000"
8666 /* 4472 */ "CGIJAsmHE\000"
8667 /* 4482 */ "CLGIJAsmHE\000"
8668 /* 4493 */ "CLIJAsmHE\000"
8669 /* 4503 */ "CRJAsmHE\000"
8670 /* 4512 */ "CGRJAsmHE\000"
8671 /* 4522 */ "CLGRJAsmHE\000"
8672 /* 4533 */ "CLRJAsmHE\000"
8673 /* 4543 */ "BRAsmHE\000"
8674 /* 4551 */ "LOCRAsmHE\000"
8675 /* 4561 */ "LOCGRAsmHE\000"
8676 /* 4572 */ "SELGRAsmHE\000"
8677 /* 4583 */ "LOCFHRAsmHE\000"
8678 /* 4595 */ "SELFHRAsmHE\000"
8679 /* 4607 */ "SELRAsmHE\000"
8680 /* 4617 */ "CLGTAsmHE\000"
8681 /* 4627 */ "CITAsmHE\000"
8682 /* 4636 */ "CLFITAsmHE\000"
8683 /* 4647 */ "CGITAsmHE\000"
8684 /* 4657 */ "CLGITAsmHE\000"
8685 /* 4668 */ "CLTAsmHE\000"
8686 /* 4677 */ "CRTAsmHE\000"
8687 /* 4686 */ "CGRTAsmHE\000"
8688 /* 4696 */ "CLGRTAsmHE\000"
8689 /* 4707 */ "CLRTAsmHE\000"
8690 /* 4717 */ "InsnRIE\000"
8691 /* 4725 */ "SIE\000"
8692 /* 4729 */ "STCKE\000"
8693 /* 4735 */ "ISKE\000"
8694 /* 4740 */ "SSKE\000"
8695 /* 4745 */ "G_VSCALE\000"
8696 /* 4754 */ "VMALE\000"
8697 /* 4760 */ "G_JUMP_TABLE\000"
8698 /* 4773 */ "CLCLE\000"
8699 /* 4779 */ "MVCLE\000"
8700 /* 4785 */ "BUNDLE\000"
8701 /* 4792 */ "STFLE\000"
8702 /* 4798 */ "VMLE\000"
8703 /* 4803 */ "CIBAsmNLE\000"
8704 /* 4813 */ "CGIBAsmNLE\000"
8705 /* 4824 */ "CLGIBAsmNLE\000"
8706 /* 4836 */ "CLIBAsmNLE\000"
8707 /* 4847 */ "CRBAsmNLE\000"
8708 /* 4857 */ "CGRBAsmNLE\000"
8709 /* 4868 */ "CLGRBAsmNLE\000"
8710 /* 4880 */ "CLRBAsmNLE\000"
8711 /* 4891 */ "LOCAsmNLE\000"
8712 /* 4901 */ "STOCAsmNLE\000"
8713 /* 4912 */ "LOCGAsmNLE\000"
8714 /* 4923 */ "STOCGAsmNLE\000"
8715 /* 4935 */ "JGAsmNLE\000"
8716 /* 4944 */ "LOCFHAsmNLE\000"
8717 /* 4956 */ "STOCFHAsmNLE\000"
8718 /* 4969 */ "BIAsmNLE\000"
8719 /* 4978 */ "LOCHIAsmNLE\000"
8720 /* 4990 */ "LOCGHIAsmNLE\000"
8721 /* 5003 */ "LOCHHIAsmNLE\000"
8722 /* 5016 */ "CIJAsmNLE\000"
8723 /* 5026 */ "CGIJAsmNLE\000"
8724 /* 5037 */ "CLGIJAsmNLE\000"
8725 /* 5049 */ "CLIJAsmNLE\000"
8726 /* 5060 */ "CRJAsmNLE\000"
8727 /* 5070 */ "CGRJAsmNLE\000"
8728 /* 5081 */ "CLGRJAsmNLE\000"
8729 /* 5093 */ "CLRJAsmNLE\000"
8730 /* 5104 */ "BRAsmNLE\000"
8731 /* 5113 */ "LOCRAsmNLE\000"
8732 /* 5124 */ "LOCGRAsmNLE\000"
8733 /* 5136 */ "SELGRAsmNLE\000"
8734 /* 5148 */ "LOCFHRAsmNLE\000"
8735 /* 5161 */ "SELFHRAsmNLE\000"
8736 /* 5174 */ "SELRAsmNLE\000"
8737 /* 5185 */ "CLGTAsmNLE\000"
8738 /* 5196 */ "CITAsmNLE\000"
8739 /* 5206 */ "CLFITAsmNLE\000"
8740 /* 5218 */ "CGITAsmNLE\000"
8741 /* 5229 */ "CLGITAsmNLE\000"
8742 /* 5241 */ "CLTAsmNLE\000"
8743 /* 5251 */ "CRTAsmNLE\000"
8744 /* 5261 */ "CGRTAsmNLE\000"
8745 /* 5272 */ "CLGRTAsmNLE\000"
8746 /* 5284 */ "CLRTAsmNLE\000"
8747 /* 5295 */ "BXLE\000"
8748 /* 5300 */ "BRXLE\000"
8749 /* 5306 */ "CIBAsmLE\000"
8750 /* 5315 */ "CGIBAsmLE\000"
8751 /* 5325 */ "CLGIBAsmLE\000"
8752 /* 5336 */ "CLIBAsmLE\000"
8753 /* 5346 */ "CRBAsmLE\000"
8754 /* 5355 */ "CGRBAsmLE\000"
8755 /* 5365 */ "CLGRBAsmLE\000"
8756 /* 5376 */ "CLRBAsmLE\000"
8757 /* 5386 */ "LOCAsmLE\000"
8758 /* 5395 */ "STOCAsmLE\000"
8759 /* 5405 */ "LOCGAsmLE\000"
8760 /* 5415 */ "STOCGAsmLE\000"
8761 /* 5426 */ "JGAsmLE\000"
8762 /* 5434 */ "LOCFHAsmLE\000"
8763 /* 5445 */ "STOCFHAsmLE\000"
8764 /* 5457 */ "BIAsmLE\000"
8765 /* 5465 */ "LOCHIAsmLE\000"
8766 /* 5476 */ "LOCGHIAsmLE\000"
8767 /* 5488 */ "LOCHHIAsmLE\000"
8768 /* 5500 */ "CIJAsmLE\000"
8769 /* 5509 */ "CGIJAsmLE\000"
8770 /* 5519 */ "CLGIJAsmLE\000"
8771 /* 5530 */ "CLIJAsmLE\000"
8772 /* 5540 */ "CRJAsmLE\000"
8773 /* 5549 */ "CGRJAsmLE\000"
8774 /* 5559 */ "CLGRJAsmLE\000"
8775 /* 5570 */ "CLRJAsmLE\000"
8776 /* 5580 */ "BRAsmLE\000"
8777 /* 5588 */ "LOCRAsmLE\000"
8778 /* 5598 */ "LOCGRAsmLE\000"
8779 /* 5609 */ "SELGRAsmLE\000"
8780 /* 5620 */ "LOCFHRAsmLE\000"
8781 /* 5632 */ "SELFHRAsmLE\000"
8782 /* 5644 */ "SELRAsmLE\000"
8783 /* 5654 */ "CLGTAsmLE\000"
8784 /* 5664 */ "CITAsmLE\000"
8785 /* 5673 */ "CLFITAsmLE\000"
8786 /* 5684 */ "CGITAsmLE\000"
8787 /* 5694 */ "CLGITAsmLE\000"
8788 /* 5705 */ "CLTAsmLE\000"
8789 /* 5714 */ "CRTAsmLE\000"
8790 /* 5723 */ "CGRTAsmLE\000"
8791 /* 5733 */ "CLGRTAsmLE\000"
8792 /* 5744 */ "CLRTAsmLE\000"
8793 /* 5754 */ "VME\000"
8794 /* 5758 */ "VFENE\000"
8795 /* 5764 */ "G_MEMCPY_INLINE\000"
8796 /* 5780 */ "VONE\000"
8797 /* 5785 */ "CIBAsmNE\000"
8798 /* 5794 */ "CGIBAsmNE\000"
8799 /* 5804 */ "CLGIBAsmNE\000"
8800 /* 5815 */ "CLIBAsmNE\000"
8801 /* 5825 */ "CRBAsmNE\000"
8802 /* 5834 */ "CGRBAsmNE\000"
8803 /* 5844 */ "CLGRBAsmNE\000"
8804 /* 5855 */ "CLRBAsmNE\000"
8805 /* 5865 */ "LOCAsmNE\000"
8806 /* 5874 */ "STOCAsmNE\000"
8807 /* 5884 */ "LOCGAsmNE\000"
8808 /* 5894 */ "STOCGAsmNE\000"
8809 /* 5905 */ "JGAsmNE\000"
8810 /* 5913 */ "LOCFHAsmNE\000"
8811 /* 5924 */ "STOCFHAsmNE\000"
8812 /* 5936 */ "BIAsmNE\000"
8813 /* 5944 */ "LOCHIAsmNE\000"
8814 /* 5955 */ "LOCGHIAsmNE\000"
8815 /* 5967 */ "LOCHHIAsmNE\000"
8816 /* 5979 */ "CIJAsmNE\000"
8817 /* 5988 */ "CGIJAsmNE\000"
8818 /* 5998 */ "CLGIJAsmNE\000"
8819 /* 6009 */ "CLIJAsmNE\000"
8820 /* 6019 */ "CRJAsmNE\000"
8821 /* 6028 */ "CGRJAsmNE\000"
8822 /* 6038 */ "CLGRJAsmNE\000"
8823 /* 6049 */ "CLRJAsmNE\000"
8824 /* 6059 */ "BRAsmNE\000"
8825 /* 6067 */ "LOCRAsmNE\000"
8826 /* 6077 */ "LOCGRAsmNE\000"
8827 /* 6088 */ "SELGRAsmNE\000"
8828 /* 6099 */ "LOCFHRAsmNE\000"
8829 /* 6111 */ "SELFHRAsmNE\000"
8830 /* 6123 */ "SELRAsmNE\000"
8831 /* 6133 */ "CLGTAsmNE\000"
8832 /* 6143 */ "CITAsmNE\000"
8833 /* 6152 */ "CLFITAsmNE\000"
8834 /* 6163 */ "CGITAsmNE\000"
8835 /* 6173 */ "CLGITAsmNE\000"
8836 /* 6184 */ "CLTAsmNE\000"
8837 /* 6193 */ "CRTAsmNE\000"
8838 /* 6202 */ "CGRTAsmNE\000"
8839 /* 6212 */ "CLGRTAsmNE\000"
8840 /* 6223 */ "CLRTAsmNE\000"
8841 /* 6233 */ "LOCAL_ESCAPE\000"
8842 /* 6246 */ "SQE\000"
8843 /* 6250 */ "G_STACKRESTORE\000"
8844 /* 6265 */ "G_INDEXED_STORE\000"
8845 /* 6281 */ "G_STORE\000"
8846 /* 6289 */ "InsnRRE\000"
8847 /* 6297 */ "TRTRE\000"
8848 /* 6303 */ "MSE\000"
8849 /* 6307 */ "G_BITREVERSE\000"
8850 /* 6320 */ "InsnRSE\000"
8851 /* 6328 */ "InsnSSE\000"
8852 /* 6336 */ "CUSE\000"
8853 /* 6341 */ "FAKE_USE\000"
8854 /* 6350 */ "IDTE\000"
8855 /* 6355 */ "CRDTE\000"
8856 /* 6361 */ "IPTE\000"
8857 /* 6366 */ "TRTE\000"
8858 /* 6371 */ "STE\000"
8859 /* 6375 */ "DBG_VALUE\000"
8860 /* 6385 */ "G_GLOBAL_VALUE\000"
8861 /* 6400 */ "G_PTRAUTH_GLOBAL_VALUE\000"
8862 /* 6423 */ "ADA_ENTRY_VALUE\000"
8863 /* 6439 */ "CONVERGENCECTRL_GLUE\000"
8864 /* 6460 */ "G_STACKSAVE\000"
8865 /* 6472 */ "G_MEMMOVE\000"
8866 /* 6482 */ "LPSWE\000"
8867 /* 6488 */ "LXE\000"
8868 /* 6492 */ "InsnRXE\000"
8869 /* 6500 */ "G_FREEZE\000"
8870 /* 6509 */ "G_FCANONICALIZE\000"
8871 /* 6525 */ "VLLEBRZE\000"
8872 /* 6534 */ "CIBAsmE\000"
8873 /* 6542 */ "CGIBAsmE\000"
8874 /* 6551 */ "CLGIBAsmE\000"
8875 /* 6561 */ "CLIBAsmE\000"
8876 /* 6570 */ "CRBAsmE\000"
8877 /* 6578 */ "CGRBAsmE\000"
8878 /* 6587 */ "CLGRBAsmE\000"
8879 /* 6597 */ "CLRBAsmE\000"
8880 /* 6606 */ "LOCAsmE\000"
8881 /* 6614 */ "STOCAsmE\000"
8882 /* 6623 */ "LOCGAsmE\000"
8883 /* 6632 */ "STOCGAsmE\000"
8884 /* 6642 */ "JGAsmE\000"
8885 /* 6649 */ "LOCFHAsmE\000"
8886 /* 6659 */ "STOCFHAsmE\000"
8887 /* 6670 */ "BIAsmE\000"
8888 /* 6677 */ "LOCHIAsmE\000"
8889 /* 6687 */ "LOCGHIAsmE\000"
8890 /* 6698 */ "LOCHHIAsmE\000"
8891 /* 6709 */ "CIJAsmE\000"
8892 /* 6717 */ "CGIJAsmE\000"
8893 /* 6726 */ "CLGIJAsmE\000"
8894 /* 6736 */ "CLIJAsmE\000"
8895 /* 6745 */ "CRJAsmE\000"
8896 /* 6753 */ "CGRJAsmE\000"
8897 /* 6762 */ "CLGRJAsmE\000"
8898 /* 6772 */ "CLRJAsmE\000"
8899 /* 6781 */ "BRAsmE\000"
8900 /* 6788 */ "LOCRAsmE\000"
8901 /* 6797 */ "LOCGRAsmE\000"
8902 /* 6807 */ "SELGRAsmE\000"
8903 /* 6817 */ "LOCFHRAsmE\000"
8904 /* 6828 */ "SELFHRAsmE\000"
8905 /* 6839 */ "SELRAsmE\000"
8906 /* 6848 */ "CLGTAsmE\000"
8907 /* 6857 */ "CITAsmE\000"
8908 /* 6865 */ "CLFITAsmE\000"
8909 /* 6875 */ "CGITAsmE\000"
8910 /* 6884 */ "CLGITAsmE\000"
8911 /* 6894 */ "CLTAsmE\000"
8912 /* 6902 */ "CRTAsmE\000"
8913 /* 6910 */ "CGRTAsmE\000"
8914 /* 6919 */ "CLGRTAsmE\000"
8915 /* 6929 */ "CLRTAsmE\000"
8916 /* 6938 */ "InsnE\000"
8917 /* 6944 */ "VGFMAF\000"
8918 /* 6951 */ "VESRAF\000"
8919 /* 6958 */ "VAF\000"
8920 /* 6962 */ "LLXAF\000"
8921 /* 6968 */ "SACF\000"
8922 /* 6973 */ "VACCF\000"
8923 /* 6979 */ "VECF\000"
8924 /* 6984 */ "VLCF\000"
8925 /* 6989 */ "VSTRCF\000"
8926 /* 6996 */ "VBLENDF\000"
8927 /* 7004 */ "VDF\000"
8928 /* 7008 */ "VFAEF\000"
8929 /* 7014 */ "VMAEF\000"
8930 /* 7020 */ "VSCEF\000"
8931 /* 7026 */ "G_CTLZ_ZERO_UNDEF\000"
8932 /* 7044 */ "G_CTTZ_ZERO_UNDEF\000"
8933 /* 7062 */ "INIT_UNDEF\000"
8934 /* 7073 */ "G_IMPLICIT_DEF\000"
8935 /* 7088 */ "VFEEF\000"
8936 /* 7094 */ "VGEF\000"
8937 /* 7099 */ "VMALEF\000"
8938 /* 7106 */ "VMLEF\000"
8939 /* 7112 */ "VLEF\000"
8940 /* 7117 */ "VMEF\000"
8941 /* 7122 */ "VFENEF\000"
8942 /* 7129 */ "DBG_INSTR_REF\000"
8943 /* 7143 */ "VSTEF\000"
8944 /* 7149 */ "PTFF\000"
8945 /* 7154 */ "AGF\000"
8946 /* 7158 */ "CGF\000"
8947 /* 7162 */ "VSEGF\000"
8948 /* 7168 */ "CALGF\000"
8949 /* 7174 */ "CLGF\000"
8950 /* 7179 */ "LLGF\000"
8951 /* 7184 */ "SLGF\000"
8952 /* 7189 */ "VSUMGF\000"
8953 /* 7196 */ "LLZRGF\000"
8954 /* 7203 */ "DSGF\000"
8955 /* 7208 */ "MSGF\000"
8956 /* 7213 */ "LTGF\000"
8957 /* 7218 */ "VAVGF\000"
8958 /* 7224 */ "VLVGF\000"
8959 /* 7230 */ "VMAHF\000"
8960 /* 7236 */ "VCHF\000"
8961 /* 7241 */ "IIHF\000"
8962 /* 7246 */ "LLIHF\000"
8963 /* 7252 */ "NIHF\000"
8964 /* 7257 */ "OIHF\000"
8965 /* 7262 */ "XIHF\000"
8966 /* 7267 */ "VMALHF\000"
8967 /* 7274 */ "CLHF\000"
8968 /* 7279 */ "VMLHF\000"
8969 /* 7285 */ "VUPLHF\000"
8970 /* 7292 */ "VMHF\000"
8971 /* 7297 */ "VUPHF\000"
8972 /* 7303 */ "VMRHF\000"
8973 /* 7309 */ "VSCBIF\000"
8974 /* 7316 */ "VLEIF\000"
8975 /* 7322 */ "VREPIF\000"
8976 /* 7329 */ "STCKF\000"
8977 /* 7335 */ "VPKF\000"
8978 /* 7340 */ "VMALF\000"
8979 /* 7346 */ "VECLF\000"
8980 /* 7352 */ "VDLF\000"
8981 /* 7357 */ "VAVGLF\000"
8982 /* 7364 */ "VCHLF\000"
8983 /* 7370 */ "IILF\000"
8984 /* 7375 */ "LLILF\000"
8985 /* 7381 */ "NILF\000"
8986 /* 7386 */ "OILF\000"
8987 /* 7391 */ "ATOMIC_LOADW_XILF\000"
8988 /* 7409 */ "VUPLLF\000"
8989 /* 7416 */ "VERLLF\000"
8990 /* 7423 */ "VMLF\000"
8991 /* 7428 */ "VMNLF\000"
8992 /* 7434 */ "VUPLF\000"
8993 /* 7440 */ "VMRLF\000"
8994 /* 7446 */ "VESRLF\000"
8995 /* 7453 */ "VRLF\000"
8996 /* 7458 */ "VESLF\000"
8997 /* 7464 */ "VMXLF\000"
8998 /* 7470 */ "VLLEZLF\000"
8999 /* 7478 */ "VGEMF\000"
9000 /* 7484 */ "VGFMF\000"
9001 /* 7490 */ "PFMF\000"
9002 /* 7495 */ "VGMF\000"
9003 /* 7500 */ "VERIMF\000"
9004 /* 7507 */ "KMF\000"
9005 /* 7511 */ "VCNF\000"
9006 /* 7516 */ "VMNF\000"
9007 /* 7521 */ "VCRNF\000"
9008 /* 7527 */ "VMAOF\000"
9009 /* 7533 */ "VMALOF\000"
9010 /* 7540 */ "VMLOF\000"
9011 /* 7546 */ "VMOF\000"
9012 /* 7551 */ "VLREPF\000"
9013 /* 7558 */ "VLBRREPF\000"
9014 /* 7567 */ "VREPF\000"
9015 /* 7573 */ "SCKPF\000"
9016 /* 7579 */ "VLPF\000"
9017 /* 7584 */ "VCEQF\000"
9018 /* 7590 */ "VSUMQF\000"
9019 /* 7597 */ "VLEBRF\000"
9020 /* 7604 */ "VSTEBRF\000"
9021 /* 7612 */ "VLBRF\000"
9022 /* 7618 */ "VSTBRF\000"
9023 /* 7625 */ "VLERF\000"
9024 /* 7631 */ "VSTERF\000"
9025 /* 7638 */ "InsnRRF\000"
9026 /* 7646 */ "VISTRF\000"
9027 /* 7653 */ "VRF\000"
9028 /* 7657 */ "LZRF\000"
9029 /* 7662 */ "VPKSF\000"
9030 /* 7668 */ "VPKLSF\000"
9031 /* 7675 */ "VSTRSF\000"
9032 /* 7682 */ "InsnSSF\000"
9033 /* 7690 */ "VSF\000"
9034 /* 7694 */ "VPOPCTF\000"
9035 /* 7702 */ "PTF\000"
9036 /* 7706 */ "CUUTF\000"
9037 /* 7712 */ "VESRAVF\000"
9038 /* 7720 */ "VLGVF\000"
9039 /* 7726 */ "VERLLVF\000"
9040 /* 7734 */ "VESRLVF\000"
9041 /* 7742 */ "VESLVF\000"
9042 /* 7749 */ "VMXF\000"
9043 /* 7754 */ "InsnRXF\000"
9044 /* 7762 */ "VSTRCZF\000"
9045 /* 7770 */ "VFAEZF\000"
9046 /* 7777 */ "VFEEZF\000"
9047 /* 7784 */ "VLLEZF\000"
9048 /* 7791 */ "VFENEZF\000"
9049 /* 7799 */ "VCLZF\000"
9050 /* 7805 */ "VLLEBRZF\000"
9051 /* 7814 */ "VSTRSZF\000"
9052 /* 7822 */ "VCTZF\000"
9053 /* 7828 */ "LAAG\000"
9054 /* 7833 */ "ECAG\000"
9055 /* 7838 */ "DIAG\000"
9056 /* 7843 */ "SLAG\000"
9057 /* 7848 */ "VGFMAG\000"
9058 /* 7855 */ "LRAG\000"
9059 /* 7860 */ "VESRAG\000"
9060 /* 7867 */ "STRAG\000"
9061 /* 7873 */ "LURAG\000"
9062 /* 7879 */ "VAG\000"
9063 /* 7883 */ "LLXAG\000"
9064 /* 7889 */ "SLBG\000"
9065 /* 7894 */ "RISBG\000"
9066 /* 7900 */ "RNSBG\000"
9067 /* 7906 */ "ROSBG\000"
9068 /* 7912 */ "RXSBG\000"
9069 /* 7918 */ "VCVBG\000"
9070 /* 7924 */ "TRACG\000"
9071 /* 7930 */ "VACCG\000"
9072 /* 7936 */ "VECG\000"
9073 /* 7941 */ "ALCG\000"
9074 /* 7946 */ "VLCG\000"
9075 /* 7951 */ "LOCG\000"
9076 /* 7956 */ "STOCG\000"
9077 /* 7962 */ "VCDG\000"
9078 /* 7967 */ "VBLENDG\000"
9079 /* 7975 */ "LPDG\000"
9080 /* 7980 */ "VCVDG\000"
9081 /* 7986 */ "VMAEG\000"
9082 /* 7992 */ "VSCEG\000"
9083 /* 7998 */ "VGEG\000"
9084 /* 8003 */ "VMALEG\000"
9085 /* 8010 */ "VMLEG\000"
9086 /* 8016 */ "VLEG\000"
9087 /* 8021 */ "BXLEG\000"
9088 /* 8027 */ "VMEG\000"
9089 /* 8032 */ "G_FNEG\000"
9090 /* 8039 */ "EXTRACT_SUBREG\000"
9091 /* 8054 */ "INSERT_SUBREG\000"
9092 /* 8068 */ "EREG\000"
9093 /* 8073 */ "G_SEXT_INREG\000"
9094 /* 8086 */ "SUBREG_TO_REG\000"
9095 /* 8100 */ "VSEG\000"
9096 /* 8105 */ "VSTEG\000"
9097 /* 8111 */ "EREGG\000"
9098 /* 8117 */ "LGG\000"
9099 /* 8121 */ "VAVGG\000"
9100 /* 8127 */ "VLVGG\000"
9101 /* 8133 */ "VMAHG\000"
9102 /* 8139 */ "RISBHG\000"
9103 /* 8146 */ "VCHG\000"
9104 /* 8151 */ "G_ATOMIC_CMPXCHG\000"
9105 /* 8168 */ "G_ATOMICRMW_XCHG\000"
9106 /* 8185 */ "VMALHG\000"
9107 /* 8192 */ "VMLHG\000"
9108 /* 8198 */ "VUPLHG\000"
9109 /* 8205 */ "VMHG\000"
9110 /* 8210 */ "VUPHG\000"
9111 /* 8216 */ "VMRHG\000"
9112 /* 8222 */ "BXHG\000"
9113 /* 8227 */ "BRXHG\000"
9114 /* 8233 */ "VSCBIG\000"
9115 /* 8240 */ "VLEIG\000"
9116 /* 8246 */ "VREPIG\000"
9117 /* 8253 */ "CallJG\000"
9118 /* 8260 */ "VPKG\000"
9119 /* 8265 */ "LAALG\000"
9120 /* 8271 */ "CALG\000"
9121 /* 8276 */ "VMALG\000"
9122 /* 8282 */ "RISBLG\000"
9123 /* 8289 */ "VECLG\000"
9124 /* 8295 */ "VCDLG\000"
9125 /* 8301 */ "VDLG\000"
9126 /* 8306 */ "VAVGLG\000"
9127 /* 8313 */ "VCHLG\000"
9128 /* 8319 */ "VUPLLG\000"
9129 /* 8326 */ "VERLLG\000"
9130 /* 8333 */ "SLLG\000"
9131 /* 8338 */ "VMLG\000"
9132 /* 8343 */ "VMNLG\000"
9133 /* 8349 */ "VUPLG\000"
9134 /* 8355 */ "VMRLG\000"
9135 /* 8361 */ "VESRLG\000"
9136 /* 8368 */ "VRLG\000"
9137 /* 8373 */ "VESLG\000"
9138 /* 8379 */ "VMSLG\000"
9139 /* 8385 */ "LCTLG\000"
9140 /* 8391 */ "VMXLG\000"
9141 /* 8397 */ "BRXLG\000"
9142 /* 8403 */ "VGEMG\000"
9143 /* 8409 */ "VGFMG\000"
9144 /* 8415 */ "VGMG\000"
9145 /* 8420 */ "VERIMG\000"
9146 /* 8427 */ "LMG\000"
9147 /* 8431 */ "STMG\000"
9148 /* 8436 */ "VSUMG\000"
9149 /* 8442 */ "LANG\000"
9150 /* 8447 */ "VMNG\000"
9151 /* 8452 */ "LAOG\000"
9152 /* 8457 */ "VMAOG\000"
9153 /* 8463 */ "VMALOG\000"
9154 /* 8470 */ "G_FLOG\000"
9155 /* 8477 */ "VMLOG\000"
9156 /* 8483 */ "VMOG\000"
9157 /* 8488 */ "BDEPG\000"
9158 /* 8494 */ "VLREPG\000"
9159 /* 8501 */ "VLBRREPG\000"
9160 /* 8510 */ "VREPG\000"
9161 /* 8516 */ "VLPG\000"
9162 /* 8521 */ "CSPG\000"
9163 /* 8526 */ "MVPG\000"
9164 /* 8531 */ "VCEQG\000"
9165 /* 8537 */ "VSUMQG\000"
9166 /* 8544 */ "G_VAARG\000"
9167 /* 8552 */ "PREALLOCATED_ARG\000"
9168 /* 8569 */ "VLEBRG\000"
9169 /* 8576 */ "VSTEBRG\000"
9170 /* 8584 */ "VLBRG\000"
9171 /* 8590 */ "VSTBRG\000"
9172 /* 8597 */ "VLERG\000"
9173 /* 8603 */ "VSTERG\000"
9174 /* 8610 */ "STURG\000"
9175 /* 8616 */ "VRG\000"
9176 /* 8620 */ "LZRG\000"
9177 /* 8625 */ "BSG\000"
9178 /* 8629 */ "CSG\000"
9179 /* 8633 */ "CDSG\000"
9180 /* 8638 */ "LLGFSG\000"
9181 /* 8645 */ "VPKSG\000"
9182 /* 8651 */ "VPKLSG\000"
9183 /* 8658 */ "MSG\000"
9184 /* 8662 */ "VSG\000"
9185 /* 8666 */ "BCTG\000"
9186 /* 8671 */ "ECTG\000"
9187 /* 8676 */ "VPOPCTG\000"
9188 /* 8684 */ "BRCTG\000"
9189 /* 8690 */ "STCTG\000"
9190 /* 8696 */ "LTG\000"
9191 /* 8700 */ "NTSTG\000"
9192 /* 8706 */ "BEXTG\000"
9193 /* 8712 */ "VESRAVG\000"
9194 /* 8720 */ "VAVG\000"
9195 /* 8725 */ "VLGVG\000"
9196 /* 8731 */ "VERLLVG\000"
9197 /* 8739 */ "VESRLVG\000"
9198 /* 8747 */ "VESLVG\000"
9199 /* 8754 */ "VLVG\000"
9200 /* 8759 */ "LRVG\000"
9201 /* 8764 */ "STRVG\000"
9202 /* 8770 */ "LAXG\000"
9203 /* 8775 */ "VMXG\000"
9204 /* 8780 */ "VLLEZG\000"
9205 /* 8787 */ "VCLZG\000"
9206 /* 8793 */ "VLLEBRZG\000"
9207 /* 8802 */ "VCTZG\000"
9208 /* 8808 */ "VGFMAH\000"
9209 /* 8815 */ "VMAH\000"
9210 /* 8820 */ "VESRAH\000"
9211 /* 8827 */ "VAH\000"
9212 /* 8831 */ "LLXAH\000"
9213 /* 8837 */ "LBH\000"
9214 /* 8841 */ "VACCH\000"
9215 /* 8847 */ "VECH\000"
9216 /* 8852 */ "VFCH\000"
9217 /* 8857 */ "LLCH\000"
9218 /* 8862 */ "VLCH\000"
9219 /* 8867 */ "VSTRCH\000"
9220 /* 8874 */ "CSCH\000"
9221 /* 8879 */ "HSCH\000"
9222 /* 8884 */ "MSCH\000"
9223 /* 8889 */ "RSCH\000"
9224 /* 8894 */ "SSCH\000"
9225 /* 8899 */ "STSCH\000"
9226 /* 8905 */ "XSCH\000"
9227 /* 8910 */ "G_PREFETCH\000"
9228 /* 8921 */ "STCH\000"
9229 /* 8926 */ "VCH\000"
9230 /* 8930 */ "VBLENDH\000"
9231 /* 8938 */ "VFAEH\000"
9232 /* 8944 */ "VMAEH\000"
9233 /* 8950 */ "VFEEH\000"
9234 /* 8956 */ "VMALEH\000"
9235 /* 8963 */ "VMLEH\000"
9236 /* 8969 */ "VLEH\000"
9237 /* 8974 */ "VMEH\000"
9238 /* 8979 */ "VFENEH\000"
9239 /* 8986 */ "VSTEH\000"
9240 /* 8992 */ "LOCFH\000"
9241 /* 8998 */ "STOCFH\000"
9242 /* 9005 */ "LFH\000"
9243 /* 9009 */ "STFH\000"
9244 /* 9014 */ "AGH\000"
9245 /* 9018 */ "CGH\000"
9246 /* 9022 */ "VSEGH\000"
9247 /* 9028 */ "LLGH\000"
9248 /* 9033 */ "VSUMGH\000"
9249 /* 9040 */ "SGH\000"
9250 /* 9044 */ "VAVGH\000"
9251 /* 9050 */ "VLVGH\000"
9252 /* 9056 */ "VMAHH\000"
9253 /* 9062 */ "RISBHH\000"
9254 /* 9069 */ "VCHH\000"
9255 /* 9074 */ "IIHH\000"
9256 /* 9079 */ "LLIHH\000"
9257 /* 9085 */ "NIHH\000"
9258 /* 9090 */ "OIHH\000"
9259 /* 9095 */ "VMALHH\000"
9260 /* 9102 */ "LLHH\000"
9261 /* 9107 */ "VMLHH\000"
9262 /* 9113 */ "VUPLHH\000"
9263 /* 9120 */ "TMHH\000"
9264 /* 9125 */ "VMHH\000"
9265 /* 9130 */ "VUPHH\000"
9266 /* 9136 */ "VMRHH\000"
9267 /* 9142 */ "STHH\000"
9268 /* 9147 */ "AIH\000"
9269 /* 9151 */ "VSCBIH\000"
9270 /* 9158 */ "CIH\000"
9271 /* 9162 */ "VLEIH\000"
9272 /* 9168 */ "CLIH\000"
9273 /* 9173 */ "VREPIH\000"
9274 /* 9180 */ "ALSIH\000"
9275 /* 9186 */ "VPKH\000"
9276 /* 9191 */ "VMALH\000"
9277 /* 9197 */ "RISBLH\000"
9278 /* 9204 */ "VECLH\000"
9279 /* 9210 */ "VAVGLH\000"
9280 /* 9217 */ "VCHLH\000"
9281 /* 9223 */ "IILH\000"
9282 /* 9228 */ "LLILH\000"
9283 /* 9234 */ "ATOMIC_LOADW_NILH\000"
9284 /* 9252 */ "ATOMIC_LOADW_OILH\000"
9285 /* 9270 */ "VUPLLH\000"
9286 /* 9277 */ "VERLLH\000"
9287 /* 9284 */ "TMLH\000"
9288 /* 9289 */ "VMLH\000"
9289 /* 9294 */ "VMNLH\000"
9290 /* 9300 */ "CIBAsmNLH\000"
9291 /* 9310 */ "CGIBAsmNLH\000"
9292 /* 9321 */ "CLGIBAsmNLH\000"
9293 /* 9333 */ "CLIBAsmNLH\000"
9294 /* 9344 */ "CRBAsmNLH\000"
9295 /* 9354 */ "CGRBAsmNLH\000"
9296 /* 9365 */ "CLGRBAsmNLH\000"
9297 /* 9377 */ "CLRBAsmNLH\000"
9298 /* 9388 */ "LOCAsmNLH\000"
9299 /* 9398 */ "STOCAsmNLH\000"
9300 /* 9409 */ "LOCGAsmNLH\000"
9301 /* 9420 */ "STOCGAsmNLH\000"
9302 /* 9432 */ "JGAsmNLH\000"
9303 /* 9441 */ "LOCFHAsmNLH\000"
9304 /* 9453 */ "STOCFHAsmNLH\000"
9305 /* 9466 */ "BIAsmNLH\000"
9306 /* 9475 */ "LOCHIAsmNLH\000"
9307 /* 9487 */ "LOCGHIAsmNLH\000"
9308 /* 9500 */ "LOCHHIAsmNLH\000"
9309 /* 9513 */ "CIJAsmNLH\000"
9310 /* 9523 */ "CGIJAsmNLH\000"
9311 /* 9534 */ "CLGIJAsmNLH\000"
9312 /* 9546 */ "CLIJAsmNLH\000"
9313 /* 9557 */ "CRJAsmNLH\000"
9314 /* 9567 */ "CGRJAsmNLH\000"
9315 /* 9578 */ "CLGRJAsmNLH\000"
9316 /* 9590 */ "CLRJAsmNLH\000"
9317 /* 9601 */ "BRAsmNLH\000"
9318 /* 9610 */ "LOCRAsmNLH\000"
9319 /* 9621 */ "LOCGRAsmNLH\000"
9320 /* 9633 */ "SELGRAsmNLH\000"
9321 /* 9645 */ "LOCFHRAsmNLH\000"
9322 /* 9658 */ "SELFHRAsmNLH\000"
9323 /* 9671 */ "SELRAsmNLH\000"
9324 /* 9682 */ "CLGTAsmNLH\000"
9325 /* 9693 */ "CITAsmNLH\000"
9326 /* 9703 */ "CLFITAsmNLH\000"
9327 /* 9715 */ "CGITAsmNLH\000"
9328 /* 9726 */ "CLGITAsmNLH\000"
9329 /* 9738 */ "CLTAsmNLH\000"
9330 /* 9748 */ "CRTAsmNLH\000"
9331 /* 9758 */ "CGRTAsmNLH\000"
9332 /* 9769 */ "CLGRTAsmNLH\000"
9333 /* 9781 */ "CLRTAsmNLH\000"
9334 /* 9792 */ "VUPLH\000"
9335 /* 9798 */ "VMRLH\000"
9336 /* 9804 */ "VESRLH\000"
9337 /* 9811 */ "VESLH\000"
9338 /* 9817 */ "G_SMULH\000"
9339 /* 9825 */ "G_UMULH\000"
9340 /* 9833 */ "VMXLH\000"
9341 /* 9839 */ "CIBAsmLH\000"
9342 /* 9848 */ "CGIBAsmLH\000"
9343 /* 9858 */ "CLGIBAsmLH\000"
9344 /* 9869 */ "CLIBAsmLH\000"
9345 /* 9879 */ "CRBAsmLH\000"
9346 /* 9888 */ "CGRBAsmLH\000"
9347 /* 9898 */ "CLGRBAsmLH\000"
9348 /* 9909 */ "CLRBAsmLH\000"
9349 /* 9919 */ "LOCAsmLH\000"
9350 /* 9928 */ "STOCAsmLH\000"
9351 /* 9938 */ "LOCGAsmLH\000"
9352 /* 9948 */ "STOCGAsmLH\000"
9353 /* 9959 */ "JGAsmLH\000"
9354 /* 9967 */ "LOCFHAsmLH\000"
9355 /* 9978 */ "STOCFHAsmLH\000"
9356 /* 9990 */ "BIAsmLH\000"
9357 /* 9998 */ "LOCHIAsmLH\000"
9358 /* 10009 */ "LOCGHIAsmLH\000"
9359 /* 10021 */ "LOCHHIAsmLH\000"
9360 /* 10033 */ "CIJAsmLH\000"
9361 /* 10042 */ "CGIJAsmLH\000"
9362 /* 10052 */ "CLGIJAsmLH\000"
9363 /* 10063 */ "CLIJAsmLH\000"
9364 /* 10073 */ "CRJAsmLH\000"
9365 /* 10082 */ "CGRJAsmLH\000"
9366 /* 10092 */ "CLGRJAsmLH\000"
9367 /* 10103 */ "CLRJAsmLH\000"
9368 /* 10113 */ "BRAsmLH\000"
9369 /* 10121 */ "LOCRAsmLH\000"
9370 /* 10131 */ "LOCGRAsmLH\000"
9371 /* 10142 */ "SELGRAsmLH\000"
9372 /* 10153 */ "LOCFHRAsmLH\000"
9373 /* 10165 */ "SELFHRAsmLH\000"
9374 /* 10177 */ "SELRAsmLH\000"
9375 /* 10187 */ "CLGTAsmLH\000"
9376 /* 10197 */ "CITAsmLH\000"
9377 /* 10206 */ "CLFITAsmLH\000"
9378 /* 10217 */ "CGITAsmLH\000"
9379 /* 10227 */ "CLGITAsmLH\000"
9380 /* 10238 */ "CLTAsmLH\000"
9381 /* 10247 */ "CRTAsmLH\000"
9382 /* 10256 */ "CGRTAsmLH\000"
9383 /* 10266 */ "CLGRTAsmLH\000"
9384 /* 10277 */ "CLRTAsmLH\000"
9385 /* 10287 */ "ICMH\000"
9386 /* 10292 */ "STCMH\000"
9387 /* 10298 */ "VGEMH\000"
9388 /* 10304 */ "VGFMH\000"
9389 /* 10310 */ "VGMH\000"
9390 /* 10315 */ "VERIMH\000"
9391 /* 10322 */ "CLMH\000"
9392 /* 10327 */ "STMH\000"
9393 /* 10332 */ "VSUMH\000"
9394 /* 10338 */ "VMH\000"
9395 /* 10342 */ "G_FTANH\000"
9396 /* 10350 */ "VCLFNH\000"
9397 /* 10357 */ "G_FSINH\000"
9398 /* 10365 */ "VMNH\000"
9399 /* 10370 */ "CIBAsmNH\000"
9400 /* 10379 */ "CGIBAsmNH\000"
9401 /* 10389 */ "CLGIBAsmNH\000"
9402 /* 10400 */ "CLIBAsmNH\000"
9403 /* 10410 */ "CRBAsmNH\000"
9404 /* 10419 */ "CGRBAsmNH\000"
9405 /* 10429 */ "CLGRBAsmNH\000"
9406 /* 10440 */ "CLRBAsmNH\000"
9407 /* 10450 */ "LOCAsmNH\000"
9408 /* 10459 */ "STOCAsmNH\000"
9409 /* 10469 */ "LOCGAsmNH\000"
9410 /* 10479 */ "STOCGAsmNH\000"
9411 /* 10490 */ "JGAsmNH\000"
9412 /* 10498 */ "LOCFHAsmNH\000"
9413 /* 10509 */ "STOCFHAsmNH\000"
9414 /* 10521 */ "BIAsmNH\000"
9415 /* 10529 */ "LOCHIAsmNH\000"
9416 /* 10540 */ "LOCGHIAsmNH\000"
9417 /* 10552 */ "LOCHHIAsmNH\000"
9418 /* 10564 */ "CIJAsmNH\000"
9419 /* 10573 */ "CGIJAsmNH\000"
9420 /* 10583 */ "CLGIJAsmNH\000"
9421 /* 10594 */ "CLIJAsmNH\000"
9422 /* 10604 */ "CRJAsmNH\000"
9423 /* 10613 */ "CGRJAsmNH\000"
9424 /* 10623 */ "CLGRJAsmNH\000"
9425 /* 10634 */ "CLRJAsmNH\000"
9426 /* 10644 */ "BRAsmNH\000"
9427 /* 10652 */ "LOCRAsmNH\000"
9428 /* 10662 */ "LOCGRAsmNH\000"
9429 /* 10673 */ "SELGRAsmNH\000"
9430 /* 10684 */ "LOCFHRAsmNH\000"
9431 /* 10696 */ "SELFHRAsmNH\000"
9432 /* 10708 */ "SELRAsmNH\000"
9433 /* 10718 */ "CLGTAsmNH\000"
9434 /* 10728 */ "CITAsmNH\000"
9435 /* 10737 */ "CLFITAsmNH\000"
9436 /* 10748 */ "CGITAsmNH\000"
9437 /* 10758 */ "CLGITAsmNH\000"
9438 /* 10769 */ "CLTAsmNH\000"
9439 /* 10778 */ "CRTAsmNH\000"
9440 /* 10787 */ "CGRTAsmNH\000"
9441 /* 10797 */ "CLGRTAsmNH\000"
9442 /* 10808 */ "CLRTAsmNH\000"
9443 /* 10818 */ "VMAOH\000"
9444 /* 10824 */ "VMALOH\000"
9445 /* 10831 */ "VMLOH\000"
9446 /* 10837 */ "VMOH\000"
9447 /* 10842 */ "VLREPH\000"
9448 /* 10849 */ "VLBRREPH\000"
9449 /* 10858 */ "VREPH\000"
9450 /* 10864 */ "VLPH\000"
9451 /* 10869 */ "VCSPH\000"
9452 /* 10875 */ "VUPH\000"
9453 /* 10880 */ "VCEQH\000"
9454 /* 10886 */ "VLEBRH\000"
9455 /* 10893 */ "VSTEBRH\000"
9456 /* 10901 */ "VLBRH\000"
9457 /* 10907 */ "VSTBRH\000"
9458 /* 10914 */ "VLERH\000"
9459 /* 10920 */ "VSTERH\000"
9460 /* 10927 */ "VMRH\000"
9461 /* 10932 */ "VISTRH\000"
9462 /* 10939 */ "VPKSH\000"
9463 /* 10945 */ "VPKLSH\000"
9464 /* 10952 */ "G_FCOSH\000"
9465 /* 10960 */ "VSTRSH\000"
9466 /* 10967 */ "VSH\000"
9467 /* 10971 */ "VPOPCTH\000"
9468 /* 10979 */ "BRCTH\000"
9469 /* 10985 */ "STH\000"
9470 /* 10989 */ "VESRAVH\000"
9471 /* 10997 */ "VLGVH\000"
9472 /* 11003 */ "VERLLVH\000"
9473 /* 11011 */ "VESRLVH\000"
9474 /* 11019 */ "VESLVH\000"
9475 /* 11026 */ "LRVH\000"
9476 /* 11031 */ "STRVH\000"
9477 /* 11037 */ "BXH\000"
9478 /* 11041 */ "VMXH\000"
9479 /* 11046 */ "BRXH\000"
9480 /* 11051 */ "MAYH\000"
9481 /* 11056 */ "MYH\000"
9482 /* 11060 */ "VSTRCZH\000"
9483 /* 11068 */ "VFAEZH\000"
9484 /* 11075 */ "VFEEZH\000"
9485 /* 11082 */ "VLLEZH\000"
9486 /* 11089 */ "VFENEZH\000"
9487 /* 11097 */ "VUPKZH\000"
9488 /* 11104 */ "VCLZH\000"
9489 /* 11110 */ "VLLEBRZH\000"
9490 /* 11119 */ "VSTRSZH\000"
9491 /* 11127 */ "VCTZH\000"
9492 /* 11133 */ "CIBAsmH\000"
9493 /* 11141 */ "CGIBAsmH\000"
9494 /* 11150 */ "CLGIBAsmH\000"
9495 /* 11160 */ "CLIBAsmH\000"
9496 /* 11169 */ "CRBAsmH\000"
9497 /* 11177 */ "CGRBAsmH\000"
9498 /* 11186 */ "CLGRBAsmH\000"
9499 /* 11196 */ "CLRBAsmH\000"
9500 /* 11205 */ "LOCAsmH\000"
9501 /* 11213 */ "STOCAsmH\000"
9502 /* 11222 */ "LOCGAsmH\000"
9503 /* 11231 */ "STOCGAsmH\000"
9504 /* 11241 */ "JGAsmH\000"
9505 /* 11248 */ "LOCFHAsmH\000"
9506 /* 11258 */ "STOCFHAsmH\000"
9507 /* 11269 */ "BIAsmH\000"
9508 /* 11276 */ "LOCHIAsmH\000"
9509 /* 11286 */ "LOCGHIAsmH\000"
9510 /* 11297 */ "LOCHHIAsmH\000"
9511 /* 11308 */ "CIJAsmH\000"
9512 /* 11316 */ "CGIJAsmH\000"
9513 /* 11325 */ "CLGIJAsmH\000"
9514 /* 11335 */ "CLIJAsmH\000"
9515 /* 11344 */ "CRJAsmH\000"
9516 /* 11352 */ "CGRJAsmH\000"
9517 /* 11361 */ "CLGRJAsmH\000"
9518 /* 11371 */ "CLRJAsmH\000"
9519 /* 11380 */ "BRAsmH\000"
9520 /* 11387 */ "LOCRAsmH\000"
9521 /* 11396 */ "LOCGRAsmH\000"
9522 /* 11406 */ "SELGRAsmH\000"
9523 /* 11416 */ "LOCFHRAsmH\000"
9524 /* 11427 */ "SELFHRAsmH\000"
9525 /* 11438 */ "SELRAsmH\000"
9526 /* 11447 */ "CLGTAsmH\000"
9527 /* 11456 */ "CITAsmH\000"
9528 /* 11464 */ "CLFITAsmH\000"
9529 /* 11474 */ "CGITAsmH\000"
9530 /* 11483 */ "CLGITAsmH\000"
9531 /* 11493 */ "CLTAsmH\000"
9532 /* 11501 */ "CRTAsmH\000"
9533 /* 11509 */ "CGRTAsmH\000"
9534 /* 11518 */ "CLGRTAsmH\000"
9535 /* 11528 */ "CLRTAsmH\000"
9536 /* 11537 */ "NIAI\000"
9537 /* 11542 */ "VSBCBI\000"
9538 /* 11549 */ "VSCBI\000"
9539 /* 11555 */ "VSBI\000"
9540 /* 11560 */ "QPACI\000"
9541 /* 11566 */ "VFTCI\000"
9542 /* 11572 */ "VPDI\000"
9543 /* 11577 */ "TPEI\000"
9544 /* 11582 */ "ATOMIC_LOADW_AFI\000"
9545 /* 11599 */ "CFI\000"
9546 /* 11603 */ "AGFI\000"
9547 /* 11608 */ "CGFI\000"
9548 /* 11613 */ "ALGFI\000"
9549 /* 11619 */ "CLGFI\000"
9550 /* 11625 */ "SLGFI\000"
9551 /* 11631 */ "MSGFI\000"
9552 /* 11637 */ "ALFI\000"
9553 /* 11642 */ "CLFI\000"
9554 /* 11647 */ "SLFI\000"
9555 /* 11652 */ "MSFI\000"
9556 /* 11657 */ "VFI\000"
9557 /* 11661 */ "AHI\000"
9558 /* 11665 */ "LOCHI\000"
9559 /* 11671 */ "AGHI\000"
9560 /* 11676 */ "LOCGHI\000"
9561 /* 11683 */ "LGHI\000"
9562 /* 11688 */ "MGHI\000"
9563 /* 11693 */ "MVGHI\000"
9564 /* 11699 */ "LOCHHI\000"
9565 /* 11706 */ "MVHHI\000"
9566 /* 11712 */ "LHI\000"
9567 /* 11716 */ "MHI\000"
9568 /* 11720 */ "DBG_PHI\000"
9569 /* 11728 */ "MVHI\000"
9570 /* 11733 */ "CLI\000"
9571 /* 11737 */ "NI\000"
9572 /* 11740 */ "OI\000"
9573 /* 11743 */ "VREPI\000"
9574 /* 11749 */ "TPI\000"
9575 /* 11753 */ "QCTRI\000"
9576 /* 11759 */ "InsnVRI\000"
9577 /* 11767 */ "InsnRI\000"
9578 /* 11774 */ "ASI\000"
9579 /* 11778 */ "AGSI\000"
9580 /* 11783 */ "ALGSI\000"
9581 /* 11789 */ "CHSI\000"
9582 /* 11794 */ "CLFHSI\000"
9583 /* 11801 */ "CGHSI\000"
9584 /* 11807 */ "CLGHSI\000"
9585 /* 11814 */ "CHHSI\000"
9586 /* 11820 */ "CLHHSI\000"
9587 /* 11827 */ "ALSI\000"
9588 /* 11832 */ "G_FPTOSI\000"
9589 /* 11841 */ "QSI\000"
9590 /* 11845 */ "InsnRSI\000"
9591 /* 11853 */ "STSI\000"
9592 /* 11858 */ "InsnVSI\000"
9593 /* 11866 */ "InsnSI\000"
9594 /* 11873 */ "PTI\000"
9595 /* 11877 */ "G_FPTOUI\000"
9596 /* 11886 */ "MVI\000"
9597 /* 11890 */ "G_FPOWI\000"
9598 /* 11898 */ "XI\000"
9599 /* 11901 */ "CIJ\000"
9600 /* 11905 */ "CGIJ\000"
9601 /* 11910 */ "CLGIJ\000"
9602 /* 11916 */ "CLIJ\000"
9603 /* 11921 */ "CRJ\000"
9604 /* 11925 */ "CGRJ\000"
9605 /* 11930 */ "CLGRJ\000"
9606 /* 11936 */ "CLRJ\000"
9607 /* 11941 */ "SLAK\000"
9608 /* 11946 */ "SRAK\000"
9609 /* 11951 */ "PACK\000"
9610 /* 11956 */ "SCK\000"
9611 /* 11960 */ "STCK\000"
9612 /* 11965 */ "MVCK\000"
9613 /* 11970 */ "MVCDK\000"
9614 /* 11976 */ "WFK\000"
9615 /* 11980 */ "AHIK\000"
9616 /* 11985 */ "AGHIK\000"
9617 /* 11991 */ "ALGHSIK\000"
9618 /* 11999 */ "ALHSIK\000"
9619 /* 12006 */ "SLLK\000"
9620 /* 12011 */ "SRLK\000"
9621 /* 12016 */ "EDMK\000"
9622 /* 12021 */ "CondReturn_XPLINK\000"
9623 /* 12039 */ "IPK\000"
9624 /* 12043 */ "UNPK\000"
9625 /* 12048 */ "VPK\000"
9626 /* 12052 */ "ARK\000"
9627 /* 12056 */ "NCRK\000"
9628 /* 12061 */ "OCRK\000"
9629 /* 12066 */ "AGRK\000"
9630 /* 12071 */ "NCGRK\000"
9631 /* 12077 */ "OCGRK\000"
9632 /* 12083 */ "ALGRK\000"
9633 /* 12089 */ "SLGRK\000"
9634 /* 12095 */ "MGRK\000"
9635 /* 12100 */ "NNGRK\000"
9636 /* 12106 */ "NOGRK\000"
9637 /* 12112 */ "SGRK\000"
9638 /* 12117 */ "NXGRK\000"
9639 /* 12123 */ "ALRK\000"
9640 /* 12128 */ "SLRK\000"
9641 /* 12133 */ "NNRK\000"
9642 /* 12138 */ "NORK\000"
9643 /* 12143 */ "SRK\000"
9644 /* 12147 */ "NXRK\000"
9645 /* 12152 */ "G_PTRMASK\000"
9646 /* 12162 */ "MVCSK\000"
9647 /* 12168 */ "IVSK\000"
9648 /* 12173 */ "AHIMuxK\000"
9649 /* 12181 */ "LAAL\000"
9650 /* 12186 */ "BAL\000"
9651 /* 12190 */ "CAL\000"
9652 /* 12194 */ "VMAL\000"
9653 /* 12199 */ "SAL\000"
9654 /* 12203 */ "VEVAL\000"
9655 /* 12209 */ "VECL\000"
9656 /* 12214 */ "CLCL\000"
9657 /* 12219 */ "CallBRCL\000"
9658 /* 12228 */ "MVCL\000"
9659 /* 12233 */ "SLDL\000"
9660 /* 12238 */ "SRDL\000"
9661 /* 12243 */ "VDL\000"
9662 /* 12247 */ "GC_LABEL\000"
9663 /* 12256 */ "DBG_LABEL\000"
9664 /* 12266 */ "EH_LABEL\000"
9665 /* 12275 */ "ANNOTATION_LABEL\000"
9666 /* 12292 */ "ICALL_BRANCH_FUNNEL\000"
9667 /* 12312 */ "VSEL\000"
9668 /* 12317 */ "STFL\000"
9669 /* 12322 */ "VAVGL\000"
9670 /* 12328 */ "RISBHL\000"
9671 /* 12335 */ "VCHL\000"
9672 /* 12340 */ "IIHL\000"
9673 /* 12345 */ "LLIHL\000"
9674 /* 12351 */ "NIHL\000"
9675 /* 12356 */ "OIHL\000"
9676 /* 12361 */ "TMHL\000"
9677 /* 12366 */ "G_FSHL\000"
9678 /* 12373 */ "G_SHL\000"
9679 /* 12379 */ "G_FCEIL\000"
9680 /* 12387 */ "InsnRIL\000"
9681 /* 12395 */ "InsnSIL\000"
9682 /* 12403 */ "TLS_GDCALL\000"
9683 /* 12414 */ "TLS_LDCALL\000"
9684 /* 12425 */ "PATCHABLE_TAIL_CALL\000"
9685 /* 12445 */ "PATCHABLE_TYPED_EVENT_CALL\000"
9686 /* 12472 */ "PATCHABLE_EVENT_CALL\000"
9687 /* 12493 */ "FENTRY_CALL\000"
9688 /* 12505 */ "RISBLL\000"
9689 /* 12512 */ "VFLL\000"
9690 /* 12517 */ "IILL\000"
9691 /* 12522 */ "KILL\000"
9692 /* 12527 */ "LLILL\000"
9693 /* 12533 */ "NILL\000"
9694 /* 12538 */ "OILL\000"
9695 /* 12543 */ "TMLL\000"
9696 /* 12548 */ "VUPLL\000"
9697 /* 12554 */ "VERLL\000"
9698 /* 12560 */ "SLL\000"
9699 /* 12564 */ "VLL\000"
9700 /* 12568 */ "VML\000"
9701 /* 12572 */ "VCLFNL\000"
9702 /* 12579 */ "VMNL\000"
9703 /* 12584 */ "CIBAsmNL\000"
9704 /* 12593 */ "CGIBAsmNL\000"
9705 /* 12603 */ "CLGIBAsmNL\000"
9706 /* 12614 */ "CLIBAsmNL\000"
9707 /* 12624 */ "CRBAsmNL\000"
9708 /* 12633 */ "CGRBAsmNL\000"
9709 /* 12643 */ "CLGRBAsmNL\000"
9710 /* 12654 */ "CLRBAsmNL\000"
9711 /* 12664 */ "LOCAsmNL\000"
9712 /* 12673 */ "STOCAsmNL\000"
9713 /* 12683 */ "LOCGAsmNL\000"
9714 /* 12693 */ "STOCGAsmNL\000"
9715 /* 12704 */ "JGAsmNL\000"
9716 /* 12712 */ "LOCFHAsmNL\000"
9717 /* 12723 */ "STOCFHAsmNL\000"
9718 /* 12735 */ "BIAsmNL\000"
9719 /* 12743 */ "LOCHIAsmNL\000"
9720 /* 12754 */ "LOCGHIAsmNL\000"
9721 /* 12766 */ "LOCHHIAsmNL\000"
9722 /* 12778 */ "CIJAsmNL\000"
9723 /* 12787 */ "CGIJAsmNL\000"
9724 /* 12797 */ "CLGIJAsmNL\000"
9725 /* 12808 */ "CLIJAsmNL\000"
9726 /* 12818 */ "CRJAsmNL\000"
9727 /* 12827 */ "CGRJAsmNL\000"
9728 /* 12837 */ "CLGRJAsmNL\000"
9729 /* 12848 */ "CLRJAsmNL\000"
9730 /* 12858 */ "BRAsmNL\000"
9731 /* 12866 */ "LOCRAsmNL\000"
9732 /* 12876 */ "LOCGRAsmNL\000"
9733 /* 12887 */ "SELGRAsmNL\000"
9734 /* 12898 */ "LOCFHRAsmNL\000"
9735 /* 12910 */ "SELFHRAsmNL\000"
9736 /* 12922 */ "SELRAsmNL\000"
9737 /* 12932 */ "CLGTAsmNL\000"
9738 /* 12942 */ "CITAsmNL\000"
9739 /* 12951 */ "CLFITAsmNL\000"
9740 /* 12962 */ "CGITAsmNL\000"
9741 /* 12972 */ "CLGITAsmNL\000"
9742 /* 12983 */ "CLTAsmNL\000"
9743 /* 12992 */ "CRTAsmNL\000"
9744 /* 13001 */ "CGRTAsmNL\000"
9745 /* 13011 */ "CLGRTAsmNL\000"
9746 /* 13022 */ "CLRTAsmNL\000"
9747 /* 13032 */ "G_CONSTANT_POOL\000"
9748 /* 13048 */ "VCFPL\000"
9749 /* 13054 */ "VUPL\000"
9750 /* 13059 */ "LARL\000"
9751 /* 13064 */ "MVCRL\000"
9752 /* 13070 */ "PFDRL\000"
9753 /* 13076 */ "CGFRL\000"
9754 /* 13082 */ "CLGFRL\000"
9755 /* 13089 */ "LLGFRL\000"
9756 /* 13096 */ "CGRL\000"
9757 /* 13101 */ "CLGRL\000"
9758 /* 13107 */ "STGRL\000"
9759 /* 13113 */ "CHRL\000"
9760 /* 13118 */ "CGHRL\000"
9761 /* 13124 */ "CLGHRL\000"
9762 /* 13131 */ "LLGHRL\000"
9763 /* 13138 */ "CLHRL\000"
9764 /* 13144 */ "LLHRL\000"
9765 /* 13150 */ "STHRL\000"
9766 /* 13156 */ "CLRL\000"
9767 /* 13161 */ "VLRL\000"
9768 /* 13166 */ "VMRL\000"
9769 /* 13171 */ "VESRL\000"
9770 /* 13177 */ "VSRL\000"
9771 /* 13182 */ "VSTRL\000"
9772 /* 13188 */ "VRL\000"
9773 /* 13192 */ "EXRL\000"
9774 /* 13197 */ "CallBRASL\000"
9775 /* 13207 */ "VESL\000"
9776 /* 13212 */ "VMSL\000"
9777 /* 13217 */ "VSL\000"
9778 /* 13221 */ "LCCTL\000"
9779 /* 13227 */ "LCTL\000"
9780 /* 13232 */ "LPCTL\000"
9781 /* 13238 */ "LSCTL\000"
9782 /* 13244 */ "STCTL\000"
9783 /* 13250 */ "G_ROTL\000"
9784 /* 13257 */ "SORTL\000"
9785 /* 13263 */ "VSTL\000"
9786 /* 13268 */ "G_VECREDUCE_FMUL\000"
9787 /* 13285 */ "G_FMUL\000"
9788 /* 13292 */ "G_VECREDUCE_SEQ_FMUL\000"
9789 /* 13313 */ "G_STRICT_FMUL\000"
9790 /* 13327 */ "G_VECREDUCE_MUL\000"
9791 /* 13343 */ "G_MUL\000"
9792 /* 13349 */ "VL\000"
9793 /* 13352 */ "VMXL\000"
9794 /* 13357 */ "MAYL\000"
9795 /* 13362 */ "MYL\000"
9796 /* 13366 */ "VUPKZL\000"
9797 /* 13373 */ "CIBAsmL\000"
9798 /* 13381 */ "CGIBAsmL\000"
9799 /* 13390 */ "CLGIBAsmL\000"
9800 /* 13400 */ "CLIBAsmL\000"
9801 /* 13409 */ "CRBAsmL\000"
9802 /* 13417 */ "CGRBAsmL\000"
9803 /* 13426 */ "CLGRBAsmL\000"
9804 /* 13436 */ "CLRBAsmL\000"
9805 /* 13445 */ "LOCAsmL\000"
9806 /* 13453 */ "STOCAsmL\000"
9807 /* 13462 */ "LOCGAsmL\000"
9808 /* 13471 */ "STOCGAsmL\000"
9809 /* 13481 */ "JGAsmL\000"
9810 /* 13488 */ "LOCFHAsmL\000"
9811 /* 13498 */ "STOCFHAsmL\000"
9812 /* 13509 */ "BIAsmL\000"
9813 /* 13516 */ "LOCHIAsmL\000"
9814 /* 13526 */ "LOCGHIAsmL\000"
9815 /* 13537 */ "LOCHHIAsmL\000"
9816 /* 13548 */ "CIJAsmL\000"
9817 /* 13556 */ "CGIJAsmL\000"
9818 /* 13565 */ "CLGIJAsmL\000"
9819 /* 13575 */ "CLIJAsmL\000"
9820 /* 13584 */ "CRJAsmL\000"
9821 /* 13592 */ "CGRJAsmL\000"
9822 /* 13601 */ "CLGRJAsmL\000"
9823 /* 13611 */ "CLRJAsmL\000"
9824 /* 13620 */ "BRAsmL\000"
9825 /* 13627 */ "LOCRAsmL\000"
9826 /* 13636 */ "LOCGRAsmL\000"
9827 /* 13646 */ "SELGRAsmL\000"
9828 /* 13656 */ "LOCFHRAsmL\000"
9829 /* 13667 */ "SELFHRAsmL\000"
9830 /* 13678 */ "SELRAsmL\000"
9831 /* 13687 */ "CLGTAsmL\000"
9832 /* 13696 */ "CITAsmL\000"
9833 /* 13704 */ "CLFITAsmL\000"
9834 /* 13714 */ "CGITAsmL\000"
9835 /* 13723 */ "CLGITAsmL\000"
9836 /* 13733 */ "CLTAsmL\000"
9837 /* 13741 */ "CRTAsmL\000"
9838 /* 13749 */ "CGRTAsmL\000"
9839 /* 13758 */ "CLGRTAsmL\000"
9840 /* 13768 */ "CLRTAsmL\000"
9841 /* 13777 */ "LAM\000"
9842 /* 13781 */ "STAM\000"
9843 /* 13786 */ "VGBM\000"
9844 /* 13791 */ "IRBM\000"
9845 /* 13796 */ "RRBM\000"
9846 /* 13801 */ "ICM\000"
9847 /* 13805 */ "STCM\000"
9848 /* 13810 */ "VGEM\000"
9849 /* 13815 */ "G_FREM\000"
9850 /* 13822 */ "G_STRICT_FREM\000"
9851 /* 13836 */ "G_SREM\000"
9852 /* 13843 */ "G_UREM\000"
9853 /* 13850 */ "G_SDIVREM\000"
9854 /* 13860 */ "G_UDIVREM\000"
9855 /* 13870 */ "VGFM\000"
9856 /* 13875 */ "VFM\000"
9857 /* 13879 */ "VGM\000"
9858 /* 13883 */ "SCHM\000"
9859 /* 13888 */ "VERIM\000"
9860 /* 13894 */ "KM\000"
9861 /* 13897 */ "CLM\000"
9862 /* 13901 */ "VLM\000"
9863 /* 13905 */ "SRNM\000"
9864 /* 13910 */ "BAsmNM\000"
9865 /* 13917 */ "LOCAsmNM\000"
9866 /* 13926 */ "STOCAsmNM\000"
9867 /* 13936 */ "LOCGAsmNM\000"
9868 /* 13946 */ "STOCGAsmNM\000"
9869 /* 13957 */ "JGAsmNM\000"
9870 /* 13965 */ "LOCFHAsmNM\000"
9871 /* 13976 */ "STOCFHAsmNM\000"
9872 /* 13988 */ "BIAsmNM\000"
9873 /* 13996 */ "LOCHIAsmNM\000"
9874 /* 14007 */ "LOCGHIAsmNM\000"
9875 /* 14019 */ "LOCHHIAsmNM\000"
9876 /* 14031 */ "JAsmNM\000"
9877 /* 14038 */ "BRAsmNM\000"
9878 /* 14046 */ "LOCRAsmNM\000"
9879 /* 14056 */ "LOCGRAsmNM\000"
9880 /* 14067 */ "SELGRAsmNM\000"
9881 /* 14078 */ "LOCFHRAsmNM\000"
9882 /* 14090 */ "SELFHRAsmNM\000"
9883 /* 14102 */ "SELRAsmNM\000"
9884 /* 14112 */ "IPM\000"
9885 /* 14116 */ "SPM\000"
9886 /* 14120 */ "VBPERM\000"
9887 /* 14127 */ "VPERM\000"
9888 /* 14133 */ "INLINEASM\000"
9889 /* 14143 */ "BSM\000"
9890 /* 14147 */ "VCKSM\000"
9891 /* 14153 */ "STNSM\000"
9892 /* 14159 */ "STOSM\000"
9893 /* 14165 */ "BASSM\000"
9894 /* 14171 */ "VSTM\000"
9895 /* 14176 */ "VTM\000"
9896 /* 14180 */ "G_VECREDUCE_FMINIMUM\000"
9897 /* 14201 */ "G_FMINIMUM\000"
9898 /* 14212 */ "G_ATOMICRMW_FMINIMUM\000"
9899 /* 14233 */ "G_VECREDUCE_FMAXIMUM\000"
9900 /* 14254 */ "G_FMAXIMUM\000"
9901 /* 14265 */ "G_ATOMICRMW_FMAXIMUM\000"
9902 /* 14286 */ "G_FMINIMUMNUM\000"
9903 /* 14300 */ "G_FMAXIMUMNUM\000"
9904 /* 14314 */ "G_FMINNUM\000"
9905 /* 14324 */ "G_FMAXNUM\000"
9906 /* 14334 */ "VSUM\000"
9907 /* 14339 */ "BAsmM\000"
9908 /* 14345 */ "LOCAsmM\000"
9909 /* 14353 */ "STOCAsmM\000"
9910 /* 14362 */ "LOCGAsmM\000"
9911 /* 14371 */ "STOCGAsmM\000"
9912 /* 14381 */ "JGAsmM\000"
9913 /* 14388 */ "LOCFHAsmM\000"
9914 /* 14398 */ "STOCFHAsmM\000"
9915 /* 14409 */ "BIAsmM\000"
9916 /* 14416 */ "LOCHIAsmM\000"
9917 /* 14426 */ "LOCGHIAsmM\000"
9918 /* 14437 */ "LOCHHIAsmM\000"
9919 /* 14448 */ "JAsmM\000"
9920 /* 14454 */ "BRAsmM\000"
9921 /* 14461 */ "LOCRAsmM\000"
9922 /* 14470 */ "LOCGRAsmM\000"
9923 /* 14480 */ "SELGRAsmM\000"
9924 /* 14490 */ "LOCFHRAsmM\000"
9925 /* 14501 */ "SELFHRAsmM\000"
9926 /* 14512 */ "SELRAsmM\000"
9927 /* 14521 */ "LAN\000"
9928 /* 14525 */ "G_FATAN\000"
9929 /* 14533 */ "G_FTAN\000"
9930 /* 14540 */ "G_INTRINSIC_ROUNDEVEN\000"
9931 /* 14562 */ "VCFN\000"
9932 /* 14567 */ "RISBGN\000"
9933 /* 14574 */ "G_ASSERT_ALIGN\000"
9934 /* 14589 */ "G_FCOPYSIGN\000"
9935 /* 14601 */ "ALSIHN\000"
9936 /* 14608 */ "MVCIN\000"
9937 /* 14614 */ "TBEGIN\000"
9938 /* 14621 */ "PGIN\000"
9939 /* 14626 */ "VFMIN\000"
9940 /* 14632 */ "G_VECREDUCE_FMIN\000"
9941 /* 14649 */ "G_ATOMICRMW_FMIN\000"
9942 /* 14666 */ "G_VECREDUCE_SMIN\000"
9943 /* 14683 */ "G_SMIN\000"
9944 /* 14690 */ "G_VECREDUCE_UMIN\000"
9945 /* 14707 */ "G_UMIN\000"
9946 /* 14714 */ "ATOMIC_LOADW_UMIN\000"
9947 /* 14732 */ "G_ATOMICRMW_UMIN\000"
9948 /* 14749 */ "ATOMIC_LOADW_MIN\000"
9949 /* 14766 */ "G_ATOMICRMW_MIN\000"
9950 /* 14782 */ "G_FASIN\000"
9951 /* 14790 */ "G_FSIN\000"
9952 /* 14797 */ "VMN\000"
9953 /* 14801 */ "VNN\000"
9954 /* 14805 */ "CFI_INSTRUCTION\000"
9955 /* 14821 */ "MVN\000"
9956 /* 14825 */ "ADJCALLSTACKDOWN\000"
9957 /* 14842 */ "LAO\000"
9958 /* 14846 */ "VMAO\000"
9959 /* 14851 */ "G_SSUBO\000"
9960 /* 14859 */ "G_USUBO\000"
9961 /* 14867 */ "G_SADDO\000"
9962 /* 14875 */ "G_UADDO\000"
9963 /* 14883 */ "JUMP_TABLE_DEBUG_INFO\000"
9964 /* 14905 */ "VMALO\000"
9965 /* 14911 */ "VMLO\000"
9966 /* 14916 */ "PLO\000"
9967 /* 14920 */ "G_SMULO\000"
9968 /* 14928 */ "G_UMULO\000"
9969 /* 14936 */ "PCKMO\000"
9970 /* 14942 */ "VMO\000"
9971 /* 14946 */ "PPNO\000"
9972 /* 14951 */ "PRNO\000"
9973 /* 14956 */ "VNO\000"
9974 /* 14960 */ "BAsmNO\000"
9975 /* 14967 */ "LOCAsmNO\000"
9976 /* 14976 */ "STOCAsmNO\000"
9977 /* 14986 */ "LOCGAsmNO\000"
9978 /* 14996 */ "STOCGAsmNO\000"
9979 /* 15007 */ "JGAsmNO\000"
9980 /* 15015 */ "LOCFHAsmNO\000"
9981 /* 15026 */ "STOCFHAsmNO\000"
9982 /* 15038 */ "BIAsmNO\000"
9983 /* 15046 */ "LOCHIAsmNO\000"
9984 /* 15057 */ "LOCGHIAsmNO\000"
9985 /* 15069 */ "LOCHHIAsmNO\000"
9986 /* 15081 */ "JAsmNO\000"
9987 /* 15088 */ "BRAsmNO\000"
9988 /* 15096 */ "LOCRAsmNO\000"
9989 /* 15106 */ "LOCGRAsmNO\000"
9990 /* 15117 */ "SELGRAsmNO\000"
9991 /* 15128 */ "LOCFHRAsmNO\000"
9992 /* 15140 */ "SELFHRAsmNO\000"
9993 /* 15152 */ "SELRAsmNO\000"
9994 /* 15162 */ "TROO\000"
9995 /* 15167 */ "PFPO\000"
9996 /* 15172 */ "G_BZERO\000"
9997 /* 15180 */ "VZERO\000"
9998 /* 15186 */ "VFPSO\000"
9999 /* 15192 */ "TRTO\000"
10000 /* 15197 */ "MVO\000"
10001 /* 15201 */ "BAsmO\000"
10002 /* 15207 */ "LOCAsmO\000"
10003 /* 15215 */ "STOCAsmO\000"
10004 /* 15224 */ "LOCGAsmO\000"
10005 /* 15233 */ "STOCGAsmO\000"
10006 /* 15243 */ "JGAsmO\000"
10007 /* 15250 */ "LOCFHAsmO\000"
10008 /* 15260 */ "STOCFHAsmO\000"
10009 /* 15271 */ "BIAsmO\000"
10010 /* 15278 */ "LOCHIAsmO\000"
10011 /* 15288 */ "LOCGHIAsmO\000"
10012 /* 15299 */ "LOCHHIAsmO\000"
10013 /* 15310 */ "JAsmO\000"
10014 /* 15316 */ "BRAsmO\000"
10015 /* 15323 */ "LOCRAsmO\000"
10016 /* 15332 */ "LOCGRAsmO\000"
10017 /* 15342 */ "SELGRAsmO\000"
10018 /* 15352 */ "LOCFHRAsmO\000"
10019 /* 15363 */ "SELFHRAsmO\000"
10020 /* 15374 */ "SELRAsmO\000"
10021 /* 15383 */ "STACKMAP\000"
10022 /* 15392 */ "G_DEBUGTRAP\000"
10023 /* 15404 */ "G_UBSANTRAP\000"
10024 /* 15416 */ "G_TRAP\000"
10025 /* 15423 */ "G_ATOMICRMW_UDEC_WRAP\000"
10026 /* 15445 */ "G_ATOMICRMW_UINC_WRAP\000"
10027 /* 15467 */ "STAP\000"
10028 /* 15472 */ "VAP\000"
10029 /* 15476 */ "G_BSWAP\000"
10030 /* 15484 */ "ZAP\000"
10031 /* 15488 */ "MVCP\000"
10032 /* 15493 */ "VSCHDP\000"
10033 /* 15500 */ "STIDP\000"
10034 /* 15506 */ "RDP\000"
10035 /* 15510 */ "VSDP\000"
10036 /* 15515 */ "VDP\000"
10037 /* 15519 */ "VCLZDP\000"
10038 /* 15526 */ "VLREP\000"
10039 /* 15532 */ "VLBRREP\000"
10040 /* 15540 */ "VREP\000"
10041 /* 15545 */ "VCLFP\000"
10042 /* 15551 */ "G_SITOFP\000"
10043 /* 15560 */ "G_UITOFP\000"
10044 /* 15569 */ "VCSFP\000"
10045 /* 15575 */ "SIGP\000"
10046 /* 15580 */ "VLVGP\000"
10047 /* 15586 */ "RCHP\000"
10048 /* 15591 */ "VSCHP\000"
10049 /* 15597 */ "VSCSHP\000"
10050 /* 15604 */ "VLIP\000"
10051 /* 15609 */ "VLP\000"
10052 /* 15613 */ "G_FCMP\000"
10053 /* 15620 */ "G_ICMP\000"
10054 /* 15627 */ "G_SCMP\000"
10055 /* 15634 */ "G_UCMP\000"
10056 /* 15641 */ "VMP\000"
10057 /* 15645 */ "BAsmNP\000"
10058 /* 15652 */ "LOCAsmNP\000"
10059 /* 15661 */ "STOCAsmNP\000"
10060 /* 15671 */ "LOCGAsmNP\000"
10061 /* 15681 */ "STOCGAsmNP\000"
10062 /* 15692 */ "JGAsmNP\000"
10063 /* 15700 */ "LOCFHAsmNP\000"
10064 /* 15711 */ "STOCFHAsmNP\000"
10065 /* 15723 */ "BIAsmNP\000"
10066 /* 15731 */ "LOCHIAsmNP\000"
10067 /* 15742 */ "LOCGHIAsmNP\000"
10068 /* 15754 */ "LOCHHIAsmNP\000"
10069 /* 15766 */ "JAsmNP\000"
10070 /* 15773 */ "BRAsmNP\000"
10071 /* 15781 */ "LOCRAsmNP\000"
10072 /* 15791 */ "LOCGRAsmNP\000"
10073 /* 15802 */ "SELGRAsmNP\000"
10074 /* 15813 */ "LOCFHRAsmNP\000"
10075 /* 15825 */ "SELFHRAsmNP\000"
10076 /* 15837 */ "SELRAsmNP\000"
10077 /* 15847 */ "JGNOP\000"
10078 /* 15853 */ "JNOP\000"
10079 /* 15858 */ "CONVERGENCECTRL_LOOP\000"
10080 /* 15879 */ "G_CTPOP\000"
10081 /* 15887 */ "VPSOP\000"
10082 /* 15893 */ "PATCHABLE_OP\000"
10083 /* 15906 */ "FAULTING_OP\000"
10084 /* 15918 */ "BPP\000"
10085 /* 15922 */ "LPP\000"
10086 /* 15926 */ "BPRP\000"
10087 /* 15931 */ "VSRP\000"
10088 /* 15936 */ "VRP\000"
10089 /* 15940 */ "LASP\000"
10090 /* 15945 */ "CSP\000"
10091 /* 15949 */ "VSCHSP\000"
10092 /* 15956 */ "VMSP\000"
10093 /* 15961 */ "VSP\000"
10094 /* 15965 */ "VTP\000"
10095 /* 15969 */ "ADJCALLSTACKUP\000"
10096 /* 15984 */ "PREALLOCATED_SETUP\000"
10097 /* 16003 */ "G_FLDEXP\000"
10098 /* 16012 */ "G_STRICT_FLDEXP\000"
10099 /* 16028 */ "G_FEXP\000"
10100 /* 16035 */ "G_FFREXP\000"
10101 /* 16044 */ "VSCHXP\000"
10102 /* 16051 */ "BAsmP\000"
10103 /* 16057 */ "LOCAsmP\000"
10104 /* 16065 */ "STOCAsmP\000"
10105 /* 16074 */ "LOCGAsmP\000"
10106 /* 16083 */ "STOCGAsmP\000"
10107 /* 16093 */ "JGAsmP\000"
10108 /* 16100 */ "LOCFHAsmP\000"
10109 /* 16110 */ "STOCFHAsmP\000"
10110 /* 16121 */ "BIAsmP\000"
10111 /* 16128 */ "LOCHIAsmP\000"
10112 /* 16138 */ "LOCGHIAsmP\000"
10113 /* 16149 */ "LOCHHIAsmP\000"
10114 /* 16160 */ "JAsmP\000"
10115 /* 16166 */ "BRAsmP\000"
10116 /* 16173 */ "LOCRAsmP\000"
10117 /* 16182 */ "LOCGRAsmP\000"
10118 /* 16192 */ "SELGRAsmP\000"
10119 /* 16202 */ "LOCFHRAsmP\000"
10120 /* 16213 */ "SELFHRAsmP\000"
10121 /* 16224 */ "SELRAsmP\000"
10122 /* 16233 */ "VAQ\000"
10123 /* 16237 */ "LLXAQ\000"
10124 /* 16243 */ "VCVBQ\000"
10125 /* 16249 */ "VACQ\000"
10126 /* 16254 */ "VACCQ\000"
10127 /* 16260 */ "VACCCQ\000"
10128 /* 16267 */ "VECQ\000"
10129 /* 16272 */ "VLCQ\000"
10130 /* 16277 */ "VBLENDQ\000"
10131 /* 16285 */ "VCVDQ\000"
10132 /* 16291 */ "VCEQ\000"
10133 /* 16296 */ "VAVGQ\000"
10134 /* 16302 */ "VMAHQ\000"
10135 /* 16308 */ "VCHQ\000"
10136 /* 16313 */ "VMALHQ\000"
10137 /* 16320 */ "VMLHQ\000"
10138 /* 16326 */ "VMHQ\000"
10139 /* 16331 */ "VSBCBIQ\000"
10140 /* 16339 */ "VSCBIQ\000"
10141 /* 16346 */ "VSBIQ\000"
10142 /* 16352 */ "VMALQ\000"
10143 /* 16358 */ "VECLQ\000"
10144 /* 16364 */ "VDLQ\000"
10145 /* 16369 */ "VAVGLQ\000"
10146 /* 16376 */ "VCHLQ\000"
10147 /* 16382 */ "VMLQ\000"
10148 /* 16387 */ "VMNLQ\000"
10149 /* 16393 */ "VRLQ\000"
10150 /* 16398 */ "VMXLQ\000"
10151 /* 16404 */ "VGEMQ\000"
10152 /* 16410 */ "VSUMQ\000"
10153 /* 16416 */ "VMNQ\000"
10154 /* 16421 */ "VLPQ\000"
10155 /* 16426 */ "STPQ\000"
10156 /* 16431 */ "VCEQQ\000"
10157 /* 16437 */ "VLBRQ\000"
10158 /* 16443 */ "VSTBRQ\000"
10159 /* 16450 */ "VRQ\000"
10160 /* 16454 */ "VFSQ\000"
10161 /* 16459 */ "VSQ\000"
10162 /* 16463 */ "VMXQ\000"
10163 /* 16468 */ "VCLZQ\000"
10164 /* 16474 */ "VCTZQ\000"
10165 /* 16480 */ "LBEAR\000"
10166 /* 16486 */ "STBEAR\000"
10167 /* 16493 */ "EPAR\000"
10168 /* 16498 */ "ESAR\000"
10169 /* 16503 */ "SSAR\000"
10170 /* 16508 */ "TAR\000"
10171 /* 16512 */ "ATOMIC_LOADW_AR\000"
10172 /* 16528 */ "MADBR\000"
10173 /* 16534 */ "LCDBR\000"
10174 /* 16540 */ "DDBR\000"
10175 /* 16545 */ "LEDBR\000"
10176 /* 16551 */ "CFDBR\000"
10177 /* 16557 */ "CLFDBR\000"
10178 /* 16564 */ "CGDBR\000"
10179 /* 16570 */ "CLGDBR\000"
10180 /* 16577 */ "DIDBR\000"
10181 /* 16583 */ "FIDBR\000"
10182 /* 16589 */ "KDBR\000"
10183 /* 16594 */ "MDBR\000"
10184 /* 16599 */ "LNDBR\000"
10185 /* 16605 */ "LPDBR\000"
10186 /* 16611 */ "SQDBR\000"
10187 /* 16617 */ "MSDBR\000"
10188 /* 16623 */ "LTDBR\000"
10189 /* 16629 */ "LXDBR\000"
10190 /* 16635 */ "MXDBR\000"
10191 /* 16641 */ "MAEBR\000"
10192 /* 16647 */ "LCEBR\000"
10193 /* 16653 */ "LDEBR\000"
10194 /* 16659 */ "MDEBR\000"
10195 /* 16665 */ "MEEBR\000"
10196 /* 16671 */ "CFEBR\000"
10197 /* 16677 */ "CLFEBR\000"
10198 /* 16684 */ "CGEBR\000"
10199 /* 16690 */ "CLGEBR\000"
10200 /* 16697 */ "DIEBR\000"
10201 /* 16703 */ "FIEBR\000"
10202 /* 16709 */ "KEBR\000"
10203 /* 16714 */ "LNEBR\000"
10204 /* 16720 */ "LPEBR\000"
10205 /* 16726 */ "SQEBR\000"
10206 /* 16732 */ "MSEBR\000"
10207 /* 16738 */ "LTEBR\000"
10208 /* 16744 */ "LXEBR\000"
10209 /* 16750 */ "CDFBR\000"
10210 /* 16756 */ "CEFBR\000"
10211 /* 16762 */ "CDLFBR\000"
10212 /* 16769 */ "CELFBR\000"
10213 /* 16776 */ "CXLFBR\000"
10214 /* 16783 */ "CXFBR\000"
10215 /* 16789 */ "CDGBR\000"
10216 /* 16795 */ "CEGBR\000"
10217 /* 16801 */ "CDLGBR\000"
10218 /* 16808 */ "CELGBR\000"
10219 /* 16815 */ "CXLGBR\000"
10220 /* 16822 */ "CXGBR\000"
10221 /* 16828 */ "SLBR\000"
10222 /* 16833 */ "VLBR\000"
10223 /* 16838 */ "VSTBR\000"
10224 /* 16844 */ "AXBR\000"
10225 /* 16849 */ "LCXBR\000"
10226 /* 16855 */ "LDXBR\000"
10227 /* 16861 */ "LEXBR\000"
10228 /* 16867 */ "CFXBR\000"
10229 /* 16873 */ "CLFXBR\000"
10230 /* 16880 */ "CGXBR\000"
10231 /* 16886 */ "CLGXBR\000"
10232 /* 16893 */ "FIXBR\000"
10233 /* 16899 */ "KXBR\000"
10234 /* 16904 */ "MXBR\000"
10235 /* 16909 */ "LNXBR\000"
10236 /* 16915 */ "LPXBR\000"
10237 /* 16921 */ "SQXBR\000"
10238 /* 16927 */ "SXBR\000"
10239 /* 16932 */ "LTXBR\000"
10240 /* 16938 */ "G_BR\000"
10241 /* 16943 */ "INLINEASM_BR\000"
10242 /* 16956 */ "CallBR\000"
10243 /* 16963 */ "CallBCR\000"
10244 /* 16971 */ "PFCR\000"
10245 /* 16976 */ "LLGCR\000"
10246 /* 16982 */ "ALCR\000"
10247 /* 16987 */ "LLCR\000"
10248 /* 16992 */ "LOCR\000"
10249 /* 16997 */ "MADR\000"
10250 /* 17002 */ "TBDR\000"
10251 /* 17007 */ "LCDR\000"
10252 /* 17012 */ "G_BLOCK_ADDR\000"
10253 /* 17025 */ "TBEDR\000"
10254 /* 17031 */ "LEDR\000"
10255 /* 17036 */ "CFDR\000"
10256 /* 17041 */ "CGDR\000"
10257 /* 17046 */ "LGDR\000"
10258 /* 17051 */ "THDR\000"
10259 /* 17056 */ "FIDR\000"
10260 /* 17061 */ "LDR\000"
10261 /* 17065 */ "MDR\000"
10262 /* 17069 */ "LNDR\000"
10263 /* 17074 */ "LPDR\000"
10264 /* 17079 */ "SQDR\000"
10265 /* 17084 */ "LRDR\000"
10266 /* 17089 */ "MSDR\000"
10267 /* 17094 */ "LTDR\000"
10268 /* 17099 */ "LXDR\000"
10269 /* 17104 */ "MXDR\000"
10270 /* 17109 */ "LZDR\000"
10271 /* 17114 */ "MAER\000"
10272 /* 17119 */ "LCER\000"
10273 /* 17124 */ "THDER\000"
10274 /* 17130 */ "LDER\000"
10275 /* 17135 */ "MDER\000"
10276 /* 17140 */ "MEER\000"
10277 /* 17145 */ "CFER\000"
10278 /* 17150 */ "LFER\000"
10279 /* 17155 */ "CGER\000"
10280 /* 17160 */ "HER\000"
10281 /* 17164 */ "FIER\000"
10282 /* 17169 */ "MEMBARRIER\000"
10283 /* 17180 */ "G_CONSTANT_FOLD_BARRIER\000"
10284 /* 17204 */ "VLER\000"
10285 /* 17209 */ "MER\000"
10286 /* 17213 */ "LNER\000"
10287 /* 17218 */ "LPER\000"
10288 /* 17223 */ "SQER\000"
10289 /* 17228 */ "LRER\000"
10290 /* 17233 */ "MSER\000"
10291 /* 17238 */ "LTER\000"
10292 /* 17243 */ "PATCHABLE_FUNCTION_ENTER\000"
10293 /* 17268 */ "G_READCYCLECOUNTER\000"
10294 /* 17287 */ "G_READSTEADYCOUNTER\000"
10295 /* 17307 */ "G_READ_REGISTER\000"
10296 /* 17323 */ "G_WRITE_REGISTER\000"
10297 /* 17340 */ "VSTER\000"
10298 /* 17346 */ "LXER\000"
10299 /* 17351 */ "LZER\000"
10300 /* 17356 */ "LCDFR\000"
10301 /* 17362 */ "LNDFR\000"
10302 /* 17368 */ "LPDFR\000"
10303 /* 17374 */ "CEFR\000"
10304 /* 17379 */ "LEFR\000"
10305 /* 17384 */ "AGFR\000"
10306 /* 17389 */ "LCGFR\000"
10307 /* 17395 */ "ALGFR\000"
10308 /* 17401 */ "CLGFR\000"
10309 /* 17407 */ "LLGFR\000"
10310 /* 17413 */ "SLGFR\000"
10311 /* 17419 */ "LNGFR\000"
10312 /* 17425 */ "LPGFR\000"
10313 /* 17431 */ "DSGFR\000"
10314 /* 17437 */ "MSGFR\000"
10315 /* 17443 */ "LTGFR\000"
10316 /* 17449 */ "CXFR\000"
10317 /* 17454 */ "AGR\000"
10318 /* 17458 */ "SLBGR\000"
10319 /* 17464 */ "ALCGR\000"
10320 /* 17470 */ "LOCGR\000"
10321 /* 17476 */ "CDGR\000"
10322 /* 17481 */ "LDGR\000"
10323 /* 17486 */ "CEGR\000"
10324 /* 17491 */ "ALGR\000"
10325 /* 17496 */ "CLGR\000"
10326 /* 17501 */ "DLGR\000"
10327 /* 17506 */ "SELGR\000"
10328 /* 17512 */ "MLGR\000"
10329 /* 17517 */ "SLGR\000"
10330 /* 17522 */ "LNGR\000"
10331 /* 17527 */ "FLOGR\000"
10332 /* 17533 */ "LPGR\000"
10333 /* 17538 */ "DSGR\000"
10334 /* 17543 */ "MSGR\000"
10335 /* 17548 */ "BCTGR\000"
10336 /* 17554 */ "LTGR\000"
10337 /* 17559 */ "NOTGR\000"
10338 /* 17565 */ "LRVGR\000"
10339 /* 17571 */ "CXGR\000"
10340 /* 17576 */ "LOCFHR\000"
10341 /* 17583 */ "SELFHR\000"
10342 /* 17590 */ "LLGHR\000"
10343 /* 17596 */ "CHHR\000"
10344 /* 17601 */ "AHHHR\000"
10345 /* 17607 */ "ALHHHR\000"
10346 /* 17614 */ "SLHHHR\000"
10347 /* 17621 */ "SHHHR\000"
10348 /* 17627 */ "CLHHR\000"
10349 /* 17633 */ "LLHR\000"
10350 /* 17638 */ "G_ASHR\000"
10351 /* 17645 */ "G_FSHR\000"
10352 /* 17652 */ "G_LSHR\000"
10353 /* 17659 */ "MAYHR\000"
10354 /* 17665 */ "MYHR\000"
10355 /* 17670 */ "EPAIR\000"
10356 /* 17676 */ "ESAIR\000"
10357 /* 17682 */ "SSAIR\000"
10358 /* 17688 */ "BAKR\000"
10359 /* 17693 */ "BALR\000"
10360 /* 17698 */ "CLR\000"
10361 /* 17702 */ "DLR\000"
10362 /* 17706 */ "SELR\000"
10363 /* 17711 */ "VFLR\000"
10364 /* 17716 */ "CHLR\000"
10365 /* 17721 */ "AHHLR\000"
10366 /* 17727 */ "ALHHLR\000"
10367 /* 17734 */ "SLHHLR\000"
10368 /* 17741 */ "SHHLR\000"
10369 /* 17747 */ "CLHLR\000"
10370 /* 17753 */ "MLR\000"
10371 /* 17757 */ "VLRLR\000"
10372 /* 17763 */ "VSTRLR\000"
10373 /* 17770 */ "SLR\000"
10374 /* 17774 */ "VLR\000"
10375 /* 17778 */ "MAYLR\000"
10376 /* 17784 */ "MYLR\000"
10377 /* 17789 */ "MR\000"
10378 /* 17792 */ "LNR\000"
10379 /* 17796 */ "ATOMIC_LOADW_NR\000"
10380 /* 17812 */ "CONVERGENCECTRL_ANCHOR\000"
10381 /* 17835 */ "G_FFLOOR\000"
10382 /* 17844 */ "G_EXTRACT_SUBVECTOR\000"
10383 /* 17864 */ "G_INSERT_SUBVECTOR\000"
10384 /* 17883 */ "G_BUILD_VECTOR\000"
10385 /* 17898 */ "G_SHUFFLE_VECTOR\000"
10386 /* 17915 */ "G_STEP_VECTOR\000"
10387 /* 17929 */ "G_SPLAT_VECTOR\000"
10388 /* 17944 */ "G_VECREDUCE_XOR\000"
10389 /* 17960 */ "G_XOR\000"
10390 /* 17966 */ "G_ATOMICRMW_XOR\000"
10391 /* 17982 */ "G_VECREDUCE_OR\000"
10392 /* 17997 */ "G_OR\000"
10393 /* 18002 */ "ATOMIC_LOADW_OR\000"
10394 /* 18018 */ "G_ATOMICRMW_OR\000"
10395 /* 18033 */ "LPR\000"
10396 /* 18037 */ "NOPR\000"
10397 /* 18042 */ "VSRPR\000"
10398 /* 18048 */ "InsnVRR\000"
10399 /* 18056 */ "InsnRR\000"
10400 /* 18063 */ "CallBASR\000"
10401 /* 18072 */ "SFASR\000"
10402 /* 18078 */ "MSR\000"
10403 /* 18082 */ "ATOMIC_LOADW_SR\000"
10404 /* 18098 */ "BCTR\000"
10405 /* 18103 */ "ECCTR\000"
10406 /* 18109 */ "SCCTR\000"
10407 /* 18115 */ "KMCTR\000"
10408 /* 18121 */ "EPCTR\000"
10409 /* 18127 */ "SPCTR\000"
10410 /* 18133 */ "QADTR\000"
10411 /* 18139 */ "CDTR\000"
10412 /* 18144 */ "DDTR\000"
10413 /* 18149 */ "CEDTR\000"
10414 /* 18155 */ "EEDTR\000"
10415 /* 18161 */ "IEDTR\000"
10416 /* 18167 */ "LEDTR\000"
10417 /* 18173 */ "CFDTR\000"
10418 /* 18179 */ "CLFDTR\000"
10419 /* 18186 */ "CGDTR\000"
10420 /* 18192 */ "CLGDTR\000"
10421 /* 18199 */ "FIDTR\000"
10422 /* 18205 */ "KDTR\000"
10423 /* 18210 */ "MDTR\000"
10424 /* 18215 */ "RRDTR\000"
10425 /* 18221 */ "CSDTR\000"
10426 /* 18227 */ "ESDTR\000"
10427 /* 18233 */ "LTDTR\000"
10428 /* 18239 */ "CUDTR\000"
10429 /* 18245 */ "LXDTR\000"
10430 /* 18251 */ "LDETR\000"
10431 /* 18257 */ "CDFTR\000"
10432 /* 18263 */ "CDLFTR\000"
10433 /* 18270 */ "CXLFTR\000"
10434 /* 18277 */ "CXFTR\000"
10435 /* 18283 */ "CDGTR\000"
10436 /* 18289 */ "CDLGTR\000"
10437 /* 18296 */ "LLGTR\000"
10438 /* 18302 */ "CXLGTR\000"
10439 /* 18309 */ "CXGTR\000"
10440 /* 18315 */ "LTR\000"
10441 /* 18319 */ "NOTR\000"
10442 /* 18324 */ "G_ROTR\000"
10443 /* 18331 */ "G_INTTOPTR\000"
10444 /* 18342 */ "TRTR\000"
10445 /* 18347 */ "CDSTR\000"
10446 /* 18353 */ "VISTR\000"
10447 /* 18359 */ "CXSTR\000"
10448 /* 18365 */ "CDUTR\000"
10449 /* 18371 */ "CXUTR\000"
10450 /* 18377 */ "QAXTR\000"
10451 /* 18383 */ "CXTR\000"
10452 /* 18388 */ "LDXTR\000"
10453 /* 18394 */ "CEXTR\000"
10454 /* 18400 */ "EEXTR\000"
10455 /* 18406 */ "IEXTR\000"
10456 /* 18412 */ "CFXTR\000"
10457 /* 18418 */ "CLFXTR\000"
10458 /* 18425 */ "CGXTR\000"
10459 /* 18431 */ "CLGXTR\000"
10460 /* 18438 */ "FIXTR\000"
10461 /* 18444 */ "KXTR\000"
10462 /* 18449 */ "MXTR\000"
10463 /* 18454 */ "RRXTR\000"
10464 /* 18460 */ "CSXTR\000"
10465 /* 18466 */ "ESXTR\000"
10466 /* 18472 */ "LTXTR\000"
10467 /* 18478 */ "CUXTR\000"
10468 /* 18484 */ "AUR\000"
10469 /* 18488 */ "SUR\000"
10470 /* 18492 */ "LRVR\000"
10471 /* 18497 */ "AWR\000"
10472 /* 18501 */ "SWR\000"
10473 /* 18505 */ "AXR\000"
10474 /* 18509 */ "LCXR\000"
10475 /* 18514 */ "LDXR\000"
10476 /* 18519 */ "LEXR\000"
10477 /* 18524 */ "CFXR\000"
10478 /* 18529 */ "CGXR\000"
10479 /* 18534 */ "FIXR\000"
10480 /* 18539 */ "LXR\000"
10481 /* 18543 */ "MXR\000"
10482 /* 18547 */ "LNXR\000"
10483 /* 18552 */ "LPXR\000"
10484 /* 18557 */ "SQXR\000"
10485 /* 18562 */ "SXR\000"
10486 /* 18566 */ "LTXR\000"
10487 /* 18571 */ "LZXR\000"
10488 /* 18576 */ "ATOMIC_LOADW_XR\000"
10489 /* 18592 */ "MAYR\000"
10490 /* 18597 */ "MYR\000"
10491 /* 18601 */ "VPKZR\000"
10492 /* 18607 */ "BAS\000"
10493 /* 18611 */ "LFAS\000"
10494 /* 18616 */ "BRAS\000"
10495 /* 18621 */ "G_FABS\000"
10496 /* 18628 */ "G_ABS\000"
10497 /* 18634 */ "VSTRCBS\000"
10498 /* 18642 */ "VFCEDBS\000"
10499 /* 18650 */ "WFCEDBS\000"
10500 /* 18658 */ "VFCHEDBS\000"
10501 /* 18667 */ "WFCHEDBS\000"
10502 /* 18676 */ "VFKHEDBS\000"
10503 /* 18685 */ "WFKHEDBS\000"
10504 /* 18694 */ "VFKEDBS\000"
10505 /* 18702 */ "WFKEDBS\000"
10506 /* 18710 */ "VFCHDBS\000"
10507 /* 18718 */ "WFCHDBS\000"
10508 /* 18726 */ "VFKHDBS\000"
10509 /* 18734 */ "WFKHDBS\000"
10510 /* 18742 */ "VFAEBS\000"
10511 /* 18749 */ "VFEEBS\000"
10512 /* 18756 */ "VFENEBS\000"
10513 /* 18764 */ "VCHBS\000"
10514 /* 18770 */ "VCHLBS\000"
10515 /* 18777 */ "VCEQBS\000"
10516 /* 18784 */ "VISTRBS\000"
10517 /* 18792 */ "VFCESBS\000"
10518 /* 18800 */ "WFCESBS\000"
10519 /* 18808 */ "VFCHESBS\000"
10520 /* 18817 */ "WFCHESBS\000"
10521 /* 18826 */ "VFKHESBS\000"
10522 /* 18835 */ "WFKHESBS\000"
10523 /* 18844 */ "VFKESBS\000"
10524 /* 18852 */ "WFKESBS\000"
10525 /* 18860 */ "VFCHSBS\000"
10526 /* 18868 */ "WFCHSBS\000"
10527 /* 18876 */ "VFKHSBS\000"
10528 /* 18884 */ "WFKHSBS\000"
10529 /* 18892 */ "WFCEXBS\000"
10530 /* 18900 */ "WFCHEXBS\000"
10531 /* 18909 */ "WFKHEXBS\000"
10532 /* 18918 */ "WFKEXBS\000"
10533 /* 18926 */ "WFCHXBS\000"
10534 /* 18934 */ "WFKHXBS\000"
10535 /* 18942 */ "VSTRCZBS\000"
10536 /* 18951 */ "VFAEZBS\000"
10537 /* 18959 */ "VFEEZBS\000"
10538 /* 18967 */ "VFENEZBS\000"
10539 /* 18976 */ "MVCS\000"
10540 /* 18981 */ "G_ABDS\000"
10541 /* 18988 */ "CDS\000"
10542 /* 18992 */ "G_UNMERGE_VALUES\000"
10543 /* 19009 */ "G_MERGE_VALUES\000"
10544 /* 19024 */ "VSTRCFS\000"
10545 /* 19032 */ "VFAEFS\000"
10546 /* 19039 */ "VFEEFS\000"
10547 /* 19046 */ "VFENEFS\000"
10548 /* 19054 */ "VCHFS\000"
10549 /* 19060 */ "VCHLFS\000"
10550 /* 19067 */ "VCEQFS\000"
10551 /* 19074 */ "VISTRFS\000"
10552 /* 19082 */ "VPKSFS\000"
10553 /* 19089 */ "VPKLSFS\000"
10554 /* 19097 */ "VFS\000"
10555 /* 19101 */ "VSTRCZFS\000"
10556 /* 19110 */ "VFAEZFS\000"
10557 /* 19118 */ "VFEEZFS\000"
10558 /* 19126 */ "VFENEZFS\000"
10559 /* 19135 */ "VCHGS\000"
10560 /* 19141 */ "VCHLGS\000"
10561 /* 19148 */ "VCEQGS\000"
10562 /* 19155 */ "VPKSGS\000"
10563 /* 19162 */ "VPKLSGS\000"
10564 /* 19170 */ "VSTRCHS\000"
10565 /* 19178 */ "VFAEHS\000"
10566 /* 19185 */ "VFEEHS\000"
10567 /* 19192 */ "VFENEHS\000"
10568 /* 19200 */ "VCHHS\000"
10569 /* 19206 */ "VCHLHS\000"
10570 /* 19213 */ "VCEQHS\000"
10571 /* 19220 */ "VISTRHS\000"
10572 /* 19228 */ "VPKSHS\000"
10573 /* 19235 */ "VPKLSHS\000"
10574 /* 19243 */ "VSTRCZHS\000"
10575 /* 19252 */ "VFAEZHS\000"
10576 /* 19260 */ "VFEEZHS\000"
10577 /* 19268 */ "VFENEZHS\000"
10578 /* 19277 */ "InsnRIS\000"
10579 /* 19285 */ "VPKS\000"
10580 /* 19290 */ "VPKLS\000"
10581 /* 19296 */ "VFLLS\000"
10582 /* 19302 */ "WFLLS\000"
10583 /* 19308 */ "VFMS\000"
10584 /* 19313 */ "VFNMS\000"
10585 /* 19319 */ "G_FACOS\000"
10586 /* 19327 */ "G_FCOS\000"
10587 /* 19334 */ "G_FSINCOS\000"
10588 /* 19344 */ "MVCOS\000"
10589 /* 19350 */ "STCPS\000"
10590 /* 19356 */ "VCFPS\000"
10591 /* 19362 */ "VCHQS\000"
10592 /* 19368 */ "VCHLQS\000"
10593 /* 19375 */ "VCEQQS\000"
10594 /* 19382 */ "G_CONCAT_VECTORS\000"
10595 /* 19399 */ "InsnRRS\000"
10596 /* 19407 */ "VSTRS\000"
10597 /* 19413 */ "InsnVRS\000"
10598 /* 19421 */ "InsnRS\000"
10599 /* 19428 */ "COPY_TO_REGCLASS\000"
10600 /* 19445 */ "G_IS_FPCLASS\000"
10601 /* 19458 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\000"
10602 /* 19488 */ "G_VECTOR_COMPRESS\000"
10603 /* 19506 */ "InsnSS\000"
10604 /* 19513 */ "G_INTRINSIC_W_SIDE_EFFECTS\000"
10605 /* 19540 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\000"
10606 /* 19578 */ "VS\000"
10607 /* 19581 */ "InsnS\000"
10608 /* 19587 */ "LLGFAT\000"
10609 /* 19594 */ "LGAT\000"
10610 /* 19599 */ "LFHAT\000"
10611 /* 19605 */ "LAT\000"
10612 /* 19609 */ "G_SSUBSAT\000"
10613 /* 19619 */ "G_USUBSAT\000"
10614 /* 19629 */ "G_SADDSAT\000"
10615 /* 19639 */ "G_UADDSAT\000"
10616 /* 19649 */ "G_SSHLSAT\000"
10617 /* 19659 */ "G_USHLSAT\000"
10618 /* 19669 */ "G_SMULFIXSAT\000"
10619 /* 19682 */ "G_UMULFIXSAT\000"
10620 /* 19695 */ "G_SDIVFIXSAT\000"
10621 /* 19708 */ "G_UDIVFIXSAT\000"
10622 /* 19721 */ "G_ATOMICRMW_USUB_SAT\000"
10623 /* 19742 */ "G_FPTOSI_SAT\000"
10624 /* 19755 */ "G_FPTOUI_SAT\000"
10625 /* 19768 */ "LLGTAT\000"
10626 /* 19775 */ "G_EXTRACT\000"
10627 /* 19785 */ "BCT\000"
10628 /* 19789 */ "G_SELECT\000"
10629 /* 19798 */ "G_BRINDIRECT\000"
10630 /* 19811 */ "VPOPCT\000"
10631 /* 19818 */ "BRCT\000"
10632 /* 19823 */ "TDCDT\000"
10633 /* 19829 */ "TDGDT\000"
10634 /* 19835 */ "SLDT\000"
10635 /* 19840 */ "CPDT\000"
10636 /* 19845 */ "SRDT\000"
10637 /* 19850 */ "CZDT\000"
10638 /* 19855 */ "TDCET\000"
10639 /* 19861 */ "TDGET\000"
10640 /* 19867 */ "PATCHABLE_RET\000"
10641 /* 19881 */ "G_MEMSET\000"
10642 /* 19890 */ "CLGT\000"
10643 /* 19895 */ "LLGT\000"
10644 /* 19900 */ "CIT\000"
10645 /* 19904 */ "CLFIT\000"
10646 /* 19910 */ "CGIT\000"
10647 /* 19915 */ "CLGIT\000"
10648 /* 19921 */ "PATCHABLE_FUNCTION_EXIT\000"
10649 /* 19945 */ "G_BRJT\000"
10650 /* 19952 */ "CLT\000"
10651 /* 19956 */ "G_EXTRACT_VECTOR_ELT\000"
10652 /* 19977 */ "G_INSERT_VECTOR_ELT\000"
10653 /* 19997 */ "SRNMT\000"
10654 /* 20003 */ "G_FCONSTANT\000"
10655 /* 20015 */ "G_CONSTANT\000"
10656 /* 20026 */ "POPCNT\000"
10657 /* 20033 */ "G_INTRINSIC_CONVERGENT\000"
10658 /* 20056 */ "STATEPOINT\000"
10659 /* 20067 */ "PATCHPOINT\000"
10660 /* 20078 */ "G_PTRTOINT\000"
10661 /* 20089 */ "G_FRINT\000"
10662 /* 20097 */ "G_INTRINSIC_LLRINT\000"
10663 /* 20116 */ "G_INTRINSIC_LRINT\000"
10664 /* 20134 */ "G_FNEARBYINT\000"
10665 /* 20147 */ "GOT\000"
10666 /* 20151 */ "TPROT\000"
10667 /* 20157 */ "TROT\000"
10668 /* 20162 */ "CDPT\000"
10669 /* 20167 */ "SPT\000"
10670 /* 20171 */ "STPT\000"
10671 /* 20176 */ "UPT\000"
10672 /* 20180 */ "CXPT\000"
10673 /* 20185 */ "G_VASTART\000"
10674 /* 20195 */ "LIFETIME_START\000"
10675 /* 20210 */ "G_INVOKE_REGION_START\000"
10676 /* 20232 */ "CRT\000"
10677 /* 20236 */ "G_INSERT\000"
10678 /* 20245 */ "CGRT\000"
10679 /* 20250 */ "CLGRT\000"
10680 /* 20256 */ "CLRT\000"
10681 /* 20261 */ "TABORT\000"
10682 /* 20268 */ "G_FSQRT\000"
10683 /* 20276 */ "G_STRICT_FSQRT\000"
10684 /* 20291 */ "TRT\000"
10685 /* 20295 */ "G_BITCAST\000"
10686 /* 20305 */ "G_ADDRSPACE_CAST\000"
10687 /* 20322 */ "DBG_VALUE_LIST\000"
10688 /* 20337 */ "CLST\000"
10689 /* 20342 */ "SRST\000"
10690 /* 20347 */ "CSST\000"
10691 /* 20352 */ "MVST\000"
10692 /* 20357 */ "TRTT\000"
10693 /* 20362 */ "PGOUT\000"
10694 /* 20368 */ "TDCXT\000"
10695 /* 20374 */ "CallBASR_STACKEXT\000"
10696 /* 20392 */ "G_FPEXT\000"
10697 /* 20400 */ "G_SEXT\000"
10698 /* 20407 */ "G_ASSERT_SEXT\000"
10699 /* 20421 */ "G_ANYEXT\000"
10700 /* 20430 */ "G_ZEXT\000"
10701 /* 20437 */ "G_ASSERT_ZEXT\000"
10702 /* 20451 */ "TDGXT\000"
10703 /* 20457 */ "SLXT\000"
10704 /* 20462 */ "CPXT\000"
10705 /* 20467 */ "SRXT\000"
10706 /* 20472 */ "CZXT\000"
10707 /* 20477 */ "CDZT\000"
10708 /* 20482 */ "CXZT\000"
10709 /* 20487 */ "AU\000"
10710 /* 20490 */ "G_ABDU\000"
10711 /* 20497 */ "CUTFU\000"
10712 /* 20503 */ "UNPKU\000"
10713 /* 20509 */ "CLCLU\000"
10714 /* 20515 */ "MVCLU\000"
10715 /* 20521 */ "InsnRILU\000"
10716 /* 20530 */ "SU\000"
10717 /* 20533 */ "SRSTU\000"
10718 /* 20539 */ "VESRAV\000"
10719 /* 20546 */ "VLGV\000"
10720 /* 20551 */ "G_FDIV\000"
10721 /* 20558 */ "G_STRICT_FDIV\000"
10722 /* 20572 */ "G_SDIV\000"
10723 /* 20579 */ "G_UDIV\000"
10724 /* 20586 */ "VERLLV\000"
10725 /* 20593 */ "VESRLV\000"
10726 /* 20600 */ "VESLV\000"
10727 /* 20606 */ "G_GET_FPENV\000"
10728 /* 20618 */ "G_RESET_FPENV\000"
10729 /* 20632 */ "G_SET_FPENV\000"
10730 /* 20644 */ "LRV\000"
10731 /* 20648 */ "STRV\000"
10732 /* 20653 */ "InsnVRV\000"
10733 /* 20661 */ "AW\000"
10734 /* 20664 */ "VMALHW\000"
10735 /* 20671 */ "VMLHW\000"
10736 /* 20677 */ "VUPLHW\000"
10737 /* 20684 */ "G_FPOW\000"
10738 /* 20691 */ "ATOMIC_SWAPW\000"
10739 /* 20704 */ "ATOMIC_CMP_SWAPW\000"
10740 /* 20721 */ "STCRW\000"
10741 /* 20727 */ "EPSW\000"
10742 /* 20732 */ "LPSW\000"
10743 /* 20737 */ "LAX\000"
10744 /* 20741 */ "VFMAX\000"
10745 /* 20747 */ "G_VECREDUCE_FMAX\000"
10746 /* 20764 */ "G_ATOMICRMW_FMAX\000"
10747 /* 20781 */ "G_VECREDUCE_SMAX\000"
10748 /* 20798 */ "G_SMAX\000"
10749 /* 20805 */ "G_VECREDUCE_UMAX\000"
10750 /* 20822 */ "G_UMAX\000"
10751 /* 20829 */ "ATOMIC_LOADW_UMAX\000"
10752 /* 20847 */ "G_ATOMICRMW_UMAX\000"
10753 /* 20864 */ "ATOMIC_LOADW_MAX\000"
10754 /* 20881 */ "G_ATOMICRMW_MAX\000"
10755 /* 20897 */ "G_FRAME_INDEX\000"
10756 /* 20911 */ "G_SBFX\000"
10757 /* 20918 */ "G_UBFX\000"
10758 /* 20925 */ "G_SMULFIX\000"
10759 /* 20935 */ "G_UMULFIX\000"
10760 /* 20945 */ "G_SDIVFIX\000"
10761 /* 20955 */ "G_UDIVFIX\000"
10762 /* 20965 */ "LX\000"
10763 /* 20968 */ "VMX\000"
10764 /* 20972 */ "VNX\000"
10765 /* 20976 */ "SPX\000"
10766 /* 20980 */ "STPX\000"
10767 /* 20985 */ "WFLRX\000"
10768 /* 20991 */ "InsnVRX\000"
10769 /* 20999 */ "InsnRX\000"
10770 /* 21006 */ "STX\000"
10771 /* 21010 */ "VX\000"
10772 /* 21013 */ "IC32Y\000"
10773 /* 21019 */ "LE16Y\000"
10774 /* 21025 */ "STE16Y\000"
10775 /* 21032 */ "LAY\000"
10776 /* 21036 */ "MAY\000"
10777 /* 21040 */ "LRAY\000"
10778 /* 21045 */ "CVBY\000"
10779 /* 21050 */ "ICY\000"
10780 /* 21054 */ "STCY\000"
10781 /* 21059 */ "LDY\000"
10782 /* 21063 */ "STDY\000"
10783 /* 21068 */ "CVDY\000"
10784 /* 21073 */ "LAEY\000"
10785 /* 21078 */ "LEY\000"
10786 /* 21082 */ "STEY\000"
10787 /* 21087 */ "LPSWEY\000"
10788 /* 21094 */ "MFY\000"
10789 /* 21098 */ "AHY\000"
10790 /* 21102 */ "CHY\000"
10791 /* 21106 */ "LHY\000"
10792 /* 21110 */ "MHY\000"
10793 /* 21114 */ "SHY\000"
10794 /* 21118 */ "STHY\000"
10795 /* 21123 */ "CLIY\000"
10796 /* 21128 */ "NIY\000"
10797 /* 21132 */ "OIY\000"
10798 /* 21136 */ "InsnSIY\000"
10799 /* 21144 */ "MVIY\000"
10800 /* 21149 */ "XIY\000"
10801 /* 21153 */ "ALY\000"
10802 /* 21157 */ "CLY\000"
10803 /* 21161 */ "SLY\000"
10804 /* 21165 */ "LAMY\000"
10805 /* 21170 */ "STAMY\000"
10806 /* 21176 */ "ICMY\000"
10807 /* 21181 */ "STCMY\000"
10808 /* 21187 */ "CLMY\000"
10809 /* 21192 */ "STMY\000"
10810 /* 21197 */ "NY\000"
10811 /* 21200 */ "OY\000"
10812 /* 21203 */ "G_MEMCPY\000"
10813 /* 21212 */ "COPY\000"
10814 /* 21217 */ "ADA_ENTRY\000"
10815 /* 21227 */ "CONVERGENCECTRL_ENTRY\000"
10816 /* 21249 */ "CSY\000"
10817 /* 21253 */ "CDSY\000"
10818 /* 21258 */ "MSY\000"
10819 /* 21262 */ "InsnRSY\000"
10820 /* 21270 */ "STY\000"
10821 /* 21274 */ "InsnRXY\000"
10822 /* 21282 */ "VLLEZ\000"
10823 /* 21288 */ "RISBGZ\000"
10824 /* 21295 */ "VUPKZ\000"
10825 /* 21301 */ "VPKZ\000"
10826 /* 21306 */ "VCLZ\000"
10827 /* 21311 */ "G_CTLZ\000"
10828 /* 21318 */ "RISBGNZ\000"
10829 /* 21326 */ "BAsmNZ\000"
10830 /* 21333 */ "LOCAsmNZ\000"
10831 /* 21342 */ "STOCAsmNZ\000"
10832 /* 21352 */ "LOCGAsmNZ\000"
10833 /* 21362 */ "STOCGAsmNZ\000"
10834 /* 21373 */ "JGAsmNZ\000"
10835 /* 21381 */ "LOCFHAsmNZ\000"
10836 /* 21392 */ "STOCFHAsmNZ\000"
10837 /* 21404 */ "BIAsmNZ\000"
10838 /* 21412 */ "LOCHIAsmNZ\000"
10839 /* 21423 */ "LOCGHIAsmNZ\000"
10840 /* 21435 */ "LOCHHIAsmNZ\000"
10841 /* 21447 */ "JAsmNZ\000"
10842 /* 21454 */ "BRAsmNZ\000"
10843 /* 21462 */ "LOCRAsmNZ\000"
10844 /* 21472 */ "LOCGRAsmNZ\000"
10845 /* 21483 */ "SELGRAsmNZ\000"
10846 /* 21494 */ "LOCFHRAsmNZ\000"
10847 /* 21506 */ "SELFHRAsmNZ\000"
10848 /* 21518 */ "SELRAsmNZ\000"
10849 /* 21528 */ "VLLEBRZ\000"
10850 /* 21536 */ "VCTZ\000"
10851 /* 21541 */ "G_CTTZ\000"
10852 /* 21548 */ "VTZ\000"
10853 /* 21552 */ "MVZ\000"
10854 /* 21556 */ "BAsmZ\000"
10855 /* 21562 */ "LOCAsmZ\000"
10856 /* 21570 */ "STOCAsmZ\000"
10857 /* 21579 */ "LOCGAsmZ\000"
10858 /* 21588 */ "STOCGAsmZ\000"
10859 /* 21598 */ "JGAsmZ\000"
10860 /* 21605 */ "LOCFHAsmZ\000"
10861 /* 21615 */ "STOCFHAsmZ\000"
10862 /* 21626 */ "BIAsmZ\000"
10863 /* 21633 */ "LOCHIAsmZ\000"
10864 /* 21643 */ "LOCGHIAsmZ\000"
10865 /* 21654 */ "LOCHHIAsmZ\000"
10866 /* 21665 */ "JAsmZ\000"
10867 /* 21671 */ "BRAsmZ\000"
10868 /* 21678 */ "LOCRAsmZ\000"
10869 /* 21687 */ "LOCGRAsmZ\000"
10870 /* 21697 */ "SELGRAsmZ\000"
10871 /* 21707 */ "LOCFHRAsmZ\000"
10872 /* 21718 */ "SELFHRAsmZ\000"
10873 /* 21729 */ "SELRAsmZ\000"
10874 /* 21738 */ "CPSDRdd\000"
10875 /* 21746 */ "CPSDRhd\000"
10876 /* 21754 */ "CPSDRsd\000"
10877 /* 21762 */ "Serialize\000"
10878 /* 21772 */ "CLCReg\000"
10879 /* 21779 */ "NCReg\000"
10880 /* 21785 */ "OCReg\000"
10881 /* 21791 */ "MVCReg\000"
10882 /* 21798 */ "XCReg\000"
10883 /* 21804 */ "MemsetRegReg\000"
10884 /* 21817 */ "MemsetImmReg\000"
10885 /* 21830 */ "CPSDRdh\000"
10886 /* 21838 */ "CPSDRhh\000"
10887 /* 21846 */ "CPSDRsh\000"
10888 /* 21854 */ "SCmp128Hi\000"
10889 /* 21864 */ "UCmp128Hi\000"
10890 /* 21874 */ "ATOMIC_LOADW_NILHi\000"
10891 /* 21893 */ "ATOMIC_LOADW_NRi\000"
10892 /* 21910 */ "CIBCall\000"
10893 /* 21918 */ "CGIBCall\000"
10894 /* 21927 */ "CLGIBCall\000"
10895 /* 21937 */ "CLIBCall\000"
10896 /* 21946 */ "CRBCall\000"
10897 /* 21954 */ "CGRBCall\000"
10898 /* 21963 */ "CLGRBCall\000"
10899 /* 21973 */ "CLRBCall\000"
10900 /* 21982 */ "CLCImm\000"
10901 /* 21989 */ "NCImm\000"
10902 /* 21995 */ "OCImm\000"
10903 /* 22001 */ "MVCImm\000"
10904 /* 22008 */ "XCImm\000"
10905 /* 22014 */ "MemsetRegImm\000"
10906 /* 22027 */ "MemsetImmImm\000"
10907 /* 22040 */ "CIBAsm\000"
10908 /* 22047 */ "CGIBAsm\000"
10909 /* 22055 */ "CLGIBAsm\000"
10910 /* 22064 */ "CLIBAsm\000"
10911 /* 22072 */ "CRBAsm\000"
10912 /* 22079 */ "CGRBAsm\000"
10913 /* 22087 */ "CLGRBAsm\000"
10914 /* 22096 */ "CLRBAsm\000"
10915 /* 22104 */ "BCAsm\000"
10916 /* 22110 */ "BICAsm\000"
10917 /* 22117 */ "LOCAsm\000"
10918 /* 22124 */ "STOCAsm\000"
10919 /* 22132 */ "BRCAsm\000"
10920 /* 22139 */ "LOCGAsm\000"
10921 /* 22147 */ "STOCGAsm\000"
10922 /* 22156 */ "LOCFHAsm\000"
10923 /* 22165 */ "STOCFHAsm\000"
10924 /* 22175 */ "LOCHIAsm\000"
10925 /* 22184 */ "LOCGHIAsm\000"
10926 /* 22194 */ "LOCHHIAsm\000"
10927 /* 22204 */ "CIJAsm\000"
10928 /* 22211 */ "CGIJAsm\000"
10929 /* 22219 */ "CLGIJAsm\000"
10930 /* 22228 */ "CLIJAsm\000"
10931 /* 22236 */ "CRJAsm\000"
10932 /* 22243 */ "CGRJAsm\000"
10933 /* 22251 */ "CLGRJAsm\000"
10934 /* 22260 */ "CLRJAsm\000"
10935 /* 22268 */ "BRCLAsm\000"
10936 /* 22276 */ "BCRAsm\000"
10937 /* 22283 */ "LOCRAsm\000"
10938 /* 22291 */ "LOCGRAsm\000"
10939 /* 22300 */ "SELGRAsm\000"
10940 /* 22309 */ "LOCFHRAsm\000"
10941 /* 22319 */ "SELFHRAsm\000"
10942 /* 22329 */ "SELRAsm\000"
10943 /* 22337 */ "CLGTAsm\000"
10944 /* 22345 */ "CITAsm\000"
10945 /* 22352 */ "CLFITAsm\000"
10946 /* 22361 */ "CGITAsm\000"
10947 /* 22369 */ "CLGITAsm\000"
10948 /* 22378 */ "CLTAsm\000"
10949 /* 22385 */ "CRTAsm\000"
10950 /* 22392 */ "CGRTAsm\000"
10951 /* 22400 */ "CLGRTAsm\000"
10952 /* 22409 */ "CLRTAsm\000"
10953 /* 22417 */ "VLAlign\000"
10954 /* 22425 */ "VLMAlign\000"
10955 /* 22434 */ "VSTMAlign\000"
10956 /* 22444 */ "VSTAlign\000"
10957 /* 22453 */ "CIBReturn\000"
10958 /* 22463 */ "CGIBReturn\000"
10959 /* 22474 */ "CLGIBReturn\000"
10960 /* 22486 */ "CLIBReturn\000"
10961 /* 22497 */ "CRBReturn\000"
10962 /* 22507 */ "CGRBReturn\000"
10963 /* 22518 */ "CLGRBReturn\000"
10964 /* 22530 */ "CLRBReturn\000"
10965 /* 22541 */ "CondReturn\000"
10966 /* 22552 */ "EXRL_Pseudo\000"
10967 /* 22564 */ "LTDBRCompare_Pseudo\000"
10968 /* 22584 */ "LTEBRCompare_Pseudo\000"
10969 /* 22604 */ "LTXBRCompare_Pseudo\000"
10970 /* 22624 */ "A_MemFoldPseudo\000"
10971 /* 22640 */ "MADB_MemFoldPseudo\000"
10972 /* 22659 */ "DDB_MemFoldPseudo\000"
10973 /* 22677 */ "MDB_MemFoldPseudo\000"
10974 /* 22695 */ "MSDB_MemFoldPseudo\000"
10975 /* 22714 */ "MAEB_MemFoldPseudo\000"
10976 /* 22733 */ "DEB_MemFoldPseudo\000"
10977 /* 22751 */ "MEEB_MemFoldPseudo\000"
10978 /* 22770 */ "MSEB_MemFoldPseudo\000"
10979 /* 22789 */ "MSGC_MemFoldPseudo\000"
10980 /* 22808 */ "MSC_MemFoldPseudo\000"
10981 /* 22826 */ "AG_MemFoldPseudo\000"
10982 /* 22843 */ "LOCG_MemFoldPseudo\000"
10983 /* 22862 */ "ALG_MemFoldPseudo\000"
10984 /* 22880 */ "SLG_MemFoldPseudo\000"
10985 /* 22898 */ "NG_MemFoldPseudo\000"
10986 /* 22915 */ "OG_MemFoldPseudo\000"
10987 /* 22932 */ "SG_MemFoldPseudo\000"
10988 /* 22949 */ "XG_MemFoldPseudo\000"
10989 /* 22966 */ "AL_MemFoldPseudo\000"
10990 /* 22983 */ "SL_MemFoldPseudo\000"
10991 /* 23000 */ "N_MemFoldPseudo\000"
10992 /* 23016 */ "O_MemFoldPseudo\000"
10993 /* 23032 */ "S_MemFoldPseudo\000"
10994 /* 23048 */ "X_MemFoldPseudo\000"
10995 /* 23064 */ "LOCMux_MemFoldPseudo\000"
10996 /* 23085 */ "CondTrap\000"
10997 /* 23094 */ "EH_SjLj_LongJmp\000"
10998 /* 23110 */ "EH_SjLj_SetJmp\000"
10999 /* 23125 */ "CLSTLoop\000"
11000 /* 23134 */ "SRSTLoop\000"
11001 /* 23143 */ "MVSTLoop\000"
11002 /* 23152 */ "EH_SjLj_Setup\000"
11003 /* 23166 */ "CPSDRds\000"
11004 /* 23174 */ "CPSDRhs\000"
11005 /* 23182 */ "CPSDRss\000"
11006 /* 23190 */ "TBEGIN_nofloat\000"
11007 /* 23205 */ "CU21Opt\000"
11008 /* 23213 */ "CU12Opt\000"
11009 /* 23221 */ "RISBG32Opt\000"
11010 /* 23232 */ "CU14Opt\000"
11011 /* 23240 */ "CU24Opt\000"
11012 /* 23248 */ "VCVBOpt\000"
11013 /* 23256 */ "KIMDOpt\000"
11014 /* 23264 */ "KLMDOpt\000"
11015 /* 23272 */ "SSKEOpt\000"
11016 /* 23280 */ "TRTREOpt\000"
11017 /* 23289 */ "IDTEOpt\000"
11018 /* 23297 */ "CRDTEOpt\000"
11019 /* 23306 */ "IPTEOpt\000"
11020 /* 23314 */ "TRTEOpt\000"
11021 /* 23322 */ "CUUTFOpt\000"
11022 /* 23331 */ "RISBGOpt\000"
11023 /* 23340 */ "RNSBGOpt\000"
11024 /* 23349 */ "ROSBGOpt\000"
11025 /* 23358 */ "RXSBGOpt\000"
11026 /* 23367 */ "VCVBGOpt\000"
11027 /* 23376 */ "RISBHGOpt\000"
11028 /* 23386 */ "RISBLGOpt\000"
11029 /* 23396 */ "RISBHHOpt\000"
11030 /* 23406 */ "RISBLHOpt\000"
11031 /* 23416 */ "RISBHLOpt\000"
11032 /* 23426 */ "RISBLLOpt\000"
11033 /* 23436 */ "RISBGNOpt\000"
11034 /* 23446 */ "TROOOpt\000"
11035 /* 23454 */ "TRTOOpt\000"
11036 /* 23462 */ "RDPOpt\000"
11037 /* 23469 */ "NOPOpt\000"
11038 /* 23476 */ "VTPOpt\000"
11039 /* 23483 */ "NOPROpt\000"
11040 /* 23491 */ "POPCNTOpt\000"
11041 /* 23501 */ "TROTOpt\000"
11042 /* 23509 */ "TRTTOpt\000"
11043 /* 23517 */ "CUTFUOpt\000"
11044 /* 23526 */ "RISBGZOpt\000"
11045 /* 23536 */ "RISBGNZOpt\000"
11046 /* 23547 */ "IPTEOptOpt\000"
11047 /* 23558 */ "CondStoreF32Inv\000"
11048 /* 23574 */ "CondStore32Inv\000"
11049 /* 23589 */ "CondStoreF64Inv\000"
11050 /* 23605 */ "CondStore64Inv\000"
11051 /* 23620 */ "CondStore16Inv\000"
11052 /* 23635 */ "CondStore8Inv\000"
11053 /* 23649 */ "CondStore32MuxInv\000"
11054 /* 23667 */ "CondStore16MuxInv\000"
11055 /* 23685 */ "CondStore8MuxInv\000"
11056 /* 23702 */ "CondStore32Mux\000"
11057 /* 23717 */ "CondStore16Mux\000"
11058 /* 23732 */ "CondStore8Mux\000"
11059 /* 23746 */ "LBMux\000"
11060 /* 23752 */ "RISBMux\000"
11061 /* 23760 */ "LLCMux\000"
11062 /* 23767 */ "LOCMux\000"
11063 /* 23774 */ "STOCMux\000"
11064 /* 23782 */ "STCMux\000"
11065 /* 23789 */ "IIFMux\000"
11066 /* 23796 */ "NIFMux\000"
11067 /* 23803 */ "OIFMux\000"
11068 /* 23810 */ "XIFMux\000"
11069 /* 23817 */ "IIHMux\000"
11070 /* 23824 */ "NIHMux\000"
11071 /* 23831 */ "OIHMux\000"
11072 /* 23838 */ "LLHMux\000"
11073 /* 23845 */ "TMHMux\000"
11074 /* 23852 */ "STHMux\000"
11075 /* 23859 */ "AFIMux\000"
11076 /* 23866 */ "CFIMux\000"
11077 /* 23873 */ "CLFIMux\000"
11078 /* 23881 */ "AHIMux\000"
11079 /* 23888 */ "LOCHIMux\000"
11080 /* 23897 */ "LHIMux\000"
11081 /* 23904 */ "CLMux\000"
11082 /* 23910 */ "IILMux\000"
11083 /* 23917 */ "NILMux\000"
11084 /* 23924 */ "OILMux\000"
11085 /* 23931 */ "TMLMux\000"
11086 /* 23938 */ "LLCRMux\000"
11087 /* 23946 */ "LOCRMux\000"
11088 /* 23954 */ "LLHRMux\000"
11089 /* 23962 */ "SELRMux\000"
11090 /* 23970 */ "STMux\000"
11091};
11092#ifdef __GNUC__
11093#pragma GCC diagnostic pop
11094#endif
11095
11096extern const unsigned SystemZInstrNameIndices[] = {
11097 11724U, 14133U, 16943U, 14805U, 12266U, 12247U, 12275U, 12522U,
11098 8039U, 8054U, 7075U, 7062U, 8086U, 19428U, 6375U, 20322U,
11099 7129U, 11720U, 12256U, 3653U, 21212U, 4785U, 20195U, 3399U,
11100 3588U, 3641U, 15383U, 12493U, 20067U, 3519U, 15984U, 8552U,
11101 20056U, 6233U, 15906U, 15893U, 17243U, 19867U, 19921U, 12425U,
11102 12472U, 12445U, 12292U, 6341U, 17169U, 14883U, 21227U, 17812U,
11103 15858U, 6439U, 20407U, 20437U, 14574U, 3255U, 2430U, 13343U,
11104 20572U, 20579U, 13836U, 13843U, 13850U, 13860U, 3365U, 17997U,
11105 17960U, 18981U, 20490U, 7073U, 11722U, 20897U, 6385U, 6400U,
11106 13032U, 19775U, 18992U, 20236U, 19009U, 17883U, 2905U, 19382U,
11107 20078U, 18331U, 20295U, 6500U, 17180U, 3485U, 2879U, 3467U,
11108 20116U, 20097U, 14540U, 17268U, 17287U, 3153U, 3097U, 3127U,
11109 3138U, 3078U, 3108U, 6281U, 6265U, 19458U, 8151U, 8168U,
11110 3271U, 2436U, 3371U, 3332U, 18018U, 17966U, 20881U, 14766U,
11111 20847U, 14732U, 3222U, 2413U, 20764U, 14649U, 14265U, 14212U,
11112 15445U, 15423U, 3421U, 19721U, 3633U, 8910U, 3412U, 19798U,
11113 20210U, 2805U, 19513U, 20033U, 19540U, 20421U, 2897U, 20015U,
11114 20003U, 20185U, 8544U, 20400U, 8073U, 20430U, 12373U, 17652U,
11115 17638U, 12366U, 17645U, 18324U, 13250U, 15620U, 15613U, 15627U,
11116 15634U, 19789U, 14875U, 3674U, 14859U, 3614U, 14867U, 3666U,
11117 14851U, 3606U, 14928U, 14920U, 9825U, 9817U, 19639U, 19629U,
11118 19619U, 19609U, 19659U, 19649U, 20925U, 20935U, 19669U, 19682U,
11119 20945U, 20955U, 19695U, 19708U, 3180U, 2392U, 13285U, 768U,
11120 3071U, 20551U, 13815U, 20684U, 11890U, 16028U, 199U, 9U,
11121 8470U, 176U, 0U, 16003U, 16035U, 8032U, 20392U, 2869U,
11122 11832U, 11877U, 15551U, 15560U, 19742U, 19755U, 18621U, 14589U,
11123 19445U, 6509U, 14314U, 14324U, 3732U, 3747U, 14201U, 14254U,
11124 14286U, 14300U, 20606U, 20632U, 20618U, 3691U, 3719U, 3704U,
11125 3261U, 12152U, 14683U, 20798U, 14707U, 20822U, 18628U, 3458U,
11126 3448U, 16938U, 19945U, 4745U, 17864U, 17844U, 19977U, 19956U,
11127 17898U, 17929U, 17915U, 19488U, 21541U, 7044U, 21311U, 7026U,
11128 15879U, 15476U, 6307U, 12379U, 19327U, 14790U, 19334U, 14533U,
11129 19319U, 14782U, 14525U, 184U, 10952U, 10357U, 10342U, 20268U,
11130 17835U, 20089U, 20134U, 20305U, 17012U, 4760U, 2966U, 6460U,
11131 6250U, 3208U, 2399U, 13313U, 20558U, 13822U, 774U, 20276U,
11132 16012U, 17307U, 17323U, 21203U, 5764U, 6472U, 19881U, 15172U,
11133 15416U, 15392U, 15404U, 3187U, 13292U, 3163U, 13268U, 20747U,
11134 14632U, 14233U, 14180U, 3239U, 13327U, 3349U, 17982U, 17944U,
11135 20781U, 14666U, 20805U, 14690U, 20911U, 20918U, 21217U, 6423U,
11136 22641U, 14825U, 15969U, 2983U, 22715U, 651U, 23859U, 22826U,
11137 23881U, 12173U, 22862U, 22966U, 20704U, 11582U, 16512U, 20864U,
11138 14749U, 9234U, 21874U, 17796U, 21893U, 9252U, 18002U, 18082U,
11139 20829U, 14714U, 7391U, 18576U, 20691U, 22624U, 23866U, 21918U,
11140 22463U, 21954U, 22507U, 23890U, 21910U, 22453U, 21982U, 21772U,
11141 23873U, 21927U, 22474U, 21963U, 22518U, 21937U, 22486U, 23904U,
11142 21973U, 22530U, 23125U, 23762U, 21946U, 22497U, 18063U, 20374U,
11143 377U, 16963U, 16956U, 13197U, 358U, 12219U, 8253U, 22541U,
11144 12021U, 597U, 23620U, 23717U, 23667U, 150U, 23574U, 23702U,
11145 23649U, 485U, 23605U, 677U, 23635U, 23732U, 23685U, 50U,
11146 23558U, 279U, 23589U, 23085U, 22659U, 22733U, 23094U, 23110U,
11147 23152U, 22552U, 20147U, 23789U, 223U, 302U, 395U, 23817U,
11148 251U, 330U, 423U, 23910U, 620U, 23746U, 17379U, 589U,
11149 17150U, 546U, 23897U, 23839U, 23760U, 23938U, 23838U, 23954U,
11150 23905U, 22843U, 23888U, 23767U, 23064U, 23946U, 22564U, 22584U,
11151 22604U, 20965U, 22640U, 22714U, 22677U, 22751U, 22808U, 22695U,
11152 22770U, 22789U, 22001U, 21791U, 23143U, 22027U, 21817U, 22014U,
11153 21804U, 21989U, 21779U, 22898U, 23796U, 230U, 309U, 402U,
11154 23824U, 258U, 337U, 430U, 23917U, 23000U, 21995U, 21785U,
11155 22915U, 23803U, 237U, 316U, 409U, 23831U, 265U, 344U,
11156 437U, 23924U, 23016U, 625U, 692U, 2930U, 9062U, 23396U,
11157 12328U, 23416U, 9197U, 23406U, 12505U, 23426U, 23752U, 22456U,
11158 12025U, 21854U, 22696U, 22771U, 23962U, 22932U, 22880U, 22983U,
11159 23134U, 645U, 23782U, 23852U, 23970U, 23774U, 21006U, 23032U,
11160 667U, 162U, 497U, 609U, 63U, 292U, 633U, 106U,
11161 468U, 21762U, 23190U, 12403U, 12414U, 323U, 416U, 23845U,
11162 351U, 444U, 23931U, 23089U, 21864U, 523U, 81U, 451U,
11163 100U, 462U, 86U, 540U, 117U, 479U, 22008U, 21798U,
11164 22949U, 23810U, 244U, 272U, 2948U, 23048U, 659U, 690U,
11165 3075U, 1126U, 16529U, 16998U, 18134U, 947U, 3576U, 1533U,
11166 16642U, 17115U, 11595U, 7830U, 7154U, 11603U, 17384U, 9014U,
11167 11671U, 11985U, 17454U, 12066U, 11778U, 8812U, 17601U, 17721U,
11168 11661U, 11980U, 21098U, 9147U, 12183U, 2841U, 7941U, 17464U,
11169 16982U, 11637U, 8267U, 7169U, 11613U, 17395U, 11991U, 17491U,
11170 12083U, 11783U, 17607U, 17727U, 11999U, 17694U, 12123U, 11827U,
11171 9180U, 14601U, 21153U, 15389U, 16483U, 12052U, 11774U, 20487U,
11172 18484U, 20661U, 18497U, 16844U, 18505U, 18378U, 992U, 21033U,
11173 1066U, 17688U, 12186U, 17693U, 18607U, 18067U, 14165U, 6536U,
11174 11135U, 4271U, 13375U, 5308U, 9841U, 14339U, 5787U, 10372U,
11175 3779U, 12586U, 4805U, 9302U, 13910U, 14960U, 15645U, 21326U,
11176 15201U, 16051U, 21556U, 2754U, 22104U, 16967U, 22276U, 19785U,
11177 8666U, 17548U, 18098U, 8488U, 8706U, 11546U, 6670U, 11269U,
11178 4420U, 13509U, 5457U, 9990U, 14409U, 5936U, 10521U, 3943U,
11179 12735U, 4969U, 9466U, 13988U, 15038U, 15723U, 21404U, 15271U,
11180 16121U, 21626U, 2801U, 22110U, 15918U, 15926U, 16531U, 18616U,
11181 13201U, 6781U, 11380U, 4543U, 13620U, 5580U, 10113U, 14454U,
11182 6059U, 10644U, 4078U, 12858U, 5104U, 9601U, 14038U, 15088U,
11183 15773U, 21454U, 15316U, 16166U, 21671U, 3025U, 22132U, 12223U,
11184 22268U, 19818U, 8684U, 10979U, 11046U, 8227U, 5300U, 8397U,
11185 1034U, 8625U, 14143U, 11037U, 8222U, 5295U, 8021U, 2739U,
11186 12190U, 8271U, 7168U, 3160U, 1168U, 16535U, 16750U, 855U,
11187 17357U, 18257U, 16789U, 876U, 17476U, 18283U, 978U, 16762U,
11188 18263U, 16801U, 18289U, 20162U, 17008U, 18988U, 8633U, 18347U,
11189 21253U, 18139U, 18365U, 20477U, 3625U, 1544U, 16648U, 18149U,
11190 16756U, 862U, 17374U, 16795U, 883U, 17486U, 16769U, 16808U,
11191 17120U, 18394U, 2783U, 16551U, 813U, 17036U, 18173U, 16671U,
11192 834U, 17145U, 11599U, 16867U, 911U, 18524U, 18412U, 7927U,
11193 16564U, 820U, 17041U, 18186U, 959U, 16684U, 841U, 17155U,
11194 7158U, 11608U, 17390U, 13076U, 9018U, 11678U, 13118U, 11801U,
11195 1792U, 22047U, 6542U, 11141U, 4278U, 13381U, 5315U, 9848U,
11196 5794U, 10379U, 3787U, 12593U, 4813U, 9310U, 11905U, 22211U,
11197 6717U, 11316U, 4472U, 13556U, 5509U, 10042U, 5988U, 10573U,
11198 4000U, 12787U, 5026U, 9523U, 19910U, 22361U, 6875U, 11474U,
11199 4647U, 13714U, 5684U, 10217U, 6163U, 10748U, 4192U, 12962U,
11200 5218U, 9715U, 17466U, 2010U, 22079U, 6578U, 11177U, 4318U,
11201 13417U, 5355U, 9888U, 5834U, 10419U, 3831U, 12633U, 4857U,
11202 9354U, 11925U, 22243U, 6753U, 11352U, 4512U, 13592U, 5549U,
11203 10082U, 6028U, 10613U, 4044U, 12827U, 5070U, 9567U, 13096U,
11204 20245U, 22392U, 6910U, 11509U, 4686U, 13749U, 5723U, 10256U,
11205 6202U, 10787U, 4235U, 13001U, 5261U, 9758U, 16880U, 918U,
11206 18529U, 18425U, 1004U, 8844U, 7237U, 17596U, 11814U, 11667U,
11207 17716U, 13113U, 11789U, 21102U, 1782U, 22040U, 6534U, 11133U,
11208 4269U, 13373U, 5306U, 9839U, 5785U, 10370U, 3777U, 12584U,
11209 4803U, 9300U, 9158U, 11901U, 22204U, 6709U, 11308U, 4463U,
11210 13548U, 5500U, 10033U, 5979U, 10564U, 3990U, 12778U, 5016U,
11211 9513U, 19900U, 22345U, 6857U, 11456U, 4627U, 13696U, 5664U,
11212 10197U, 6143U, 10728U, 4170U, 12942U, 5196U, 9693U, 14148U,
11213 12211U, 2845U, 12214U, 4773U, 20509U, 16557U, 18179U, 16677U,
11214 11794U, 11642U, 19904U, 22352U, 6865U, 11464U, 4636U, 13704U,
11215 5673U, 10206U, 6152U, 10737U, 4180U, 12951U, 5206U, 9703U,
11216 16873U, 18418U, 8291U, 16570U, 18192U, 16690U, 7174U, 11619U,
11217 17401U, 13082U, 13124U, 11807U, 1797U, 22055U, 6551U, 11150U,
11218 4288U, 13390U, 5325U, 9858U, 5804U, 10389U, 3798U, 12603U,
11219 4824U, 9321U, 11910U, 22219U, 6726U, 11325U, 4482U, 13565U,
11220 5519U, 10052U, 5998U, 10583U, 4011U, 12797U, 5037U, 9534U,
11221 19915U, 22369U, 6884U, 11483U, 4657U, 13723U, 5694U, 10227U,
11222 6173U, 10758U, 4203U, 12972U, 5229U, 9726U, 17496U, 2015U,
11223 22087U, 6587U, 11186U, 4328U, 13426U, 5365U, 9898U, 5844U,
11224 10429U, 3842U, 12643U, 4868U, 9365U, 11930U, 22251U, 6762U,
11225 11361U, 4522U, 13601U, 5559U, 10092U, 6038U, 10623U, 4055U,
11226 12837U, 5081U, 9578U, 13101U, 20250U, 22400U, 6919U, 11518U,
11227 4696U, 13758U, 5733U, 10266U, 6212U, 10797U, 4246U, 13011U,
11228 5272U, 9769U, 19890U, 22337U, 6848U, 11447U, 4617U, 13687U,
11229 5654U, 10187U, 6133U, 10718U, 4159U, 12932U, 5185U, 9682U,
11230 16886U, 18431U, 7274U, 17627U, 11820U, 17747U, 13138U, 11733U,
11231 1803U, 22064U, 6561U, 11160U, 4299U, 13400U, 5336U, 9869U,
11232 5815U, 10400U, 3810U, 12614U, 4836U, 9333U, 9168U, 11916U,
11233 22228U, 6736U, 11335U, 4493U, 13575U, 5530U, 10063U, 6009U,
11234 10594U, 4023U, 12808U, 5049U, 9546U, 21123U, 13897U, 10322U,
11235 21187U, 17698U, 2021U, 22096U, 6597U, 11196U, 4339U, 13436U,
11236 5376U, 9909U, 5855U, 10440U, 3854U, 12654U, 4880U, 9377U,
11237 11936U, 22260U, 6772U, 11371U, 4533U, 13611U, 5570U, 10103U,
11238 6049U, 10634U, 4067U, 12848U, 5093U, 9590U, 13156U, 20256U,
11239 22409U, 6929U, 11528U, 4707U, 13768U, 5744U, 10277U, 6223U,
11240 10808U, 4258U, 13022U, 5284U, 9781U, 20337U, 19952U, 22378U,
11241 6894U, 11493U, 4668U, 13733U, 5705U, 10238U, 6184U, 10769U,
11242 4215U, 12983U, 5241U, 9738U, 21157U, 8788U, 3050U, 15490U,
11243 19840U, 21738U, 21830U, 23166U, 21746U, 21838U, 23174U, 21754U,
11244 21846U, 23182U, 20462U, 1056U, 16968U, 2006U, 22072U, 6570U,
11245 11169U, 4309U, 13409U, 5346U, 9879U, 5825U, 10410U, 3821U,
11246 12624U, 4847U, 9344U, 6355U, 23297U, 11921U, 22236U, 6745U,
11247 11344U, 4503U, 13584U, 5540U, 10073U, 6019U, 10604U, 4034U,
11248 12818U, 5060U, 9557U, 13066U, 20232U, 22385U, 6902U, 11501U,
11249 4677U, 13741U, 5714U, 10247U, 6193U, 10778U, 4225U, 12992U,
11250 5251U, 9748U, 18978U, 8874U, 18221U, 8629U, 15945U, 8521U,
11251 20347U, 18460U, 21249U, 8803U, 34U, 23213U, 207U, 23232U,
11252 18U, 23205U, 218U, 23240U, 29U, 171U, 18239U, 6336U,
11253 20497U, 23517U, 7706U, 23322U, 18478U, 2461U, 7919U, 21045U,
11254 3562U, 7981U, 21068U, 16850U, 16783U, 869U, 17449U, 18277U,
11255 16822U, 890U, 17571U, 18309U, 985U, 16776U, 18270U, 16815U,
11256 18302U, 20180U, 18510U, 18359U, 18383U, 18371U, 20482U, 21051U,
11257 19850U, 20472U, 3076U, 3177U, 1193U, 16540U, 17021U, 18144U,
11258 953U, 3671U, 1550U, 16654U, 17126U, 2772U, 7838U, 16577U,
11259 16697U, 12235U, 8297U, 17501U, 17702U, 15497U, 16999U, 8634U,
11260 7203U, 17431U, 17538U, 16856U, 18515U, 18389U, 998U, 16482U,
11261 7833U, 18103U, 736U, 8671U, 3289U, 12016U, 18155U, 18400U,
11262 3004U, 17670U, 16493U, 18121U, 20727U, 8068U, 8111U, 17676U,
11263 16498U, 18227U, 716U, 1043U, 18466U, 3443U, 20908U, 13192U,
11264 16583U, 827U, 17056U, 18199U, 16703U, 848U, 17164U, 16893U,
11265 925U, 18534U, 18438U, 17527U, 17052U, 17160U, 8879U, 2737U,
11266 2802U, 39U, 21013U, 13801U, 10287U, 21176U, 21050U, 6350U,
11267 23289U, 18161U, 18406U, 7241U, 9074U, 12340U, 7370U, 9223U,
11268 12517U, 12039U, 14112U, 6361U, 23306U, 23547U, 13791U, 4735U,
11269 12168U, 6938U, 11767U, 4717U, 12387U, 20521U, 19277U, 18056U,
11270 6289U, 7638U, 19399U, 19421U, 6320U, 11845U, 21262U, 20999U,
11271 6492U, 7754U, 21274U, 19581U, 11866U, 12395U, 21136U, 19506U,
11272 6328U, 7682U, 11759U, 18048U, 19413U, 20653U, 20991U, 11858U,
11273 11903U, 6711U, 11310U, 4465U, 13550U, 5502U, 10035U, 14448U,
11274 5981U, 10566U, 3992U, 12780U, 5018U, 9515U, 14031U, 15081U,
11275 15766U, 21447U, 15310U, 16160U, 21665U, 8257U, 6642U, 11241U,
11276 4389U, 13481U, 5426U, 9959U, 14381U, 5905U, 10490U, 3909U,
11277 12704U, 4935U, 9432U, 13957U, 15007U, 15692U, 21373U, 15243U,
11278 16093U, 21598U, 15847U, 15853U, 1359U, 16589U, 1038U, 18205U,
11279 1602U, 16709U, 3322U, 23256U, 3327U, 23264U, 13894U, 787U,
11280 2741U, 2857U, 18115U, 7507U, 14938U, 16899U, 18444U, 12184U,
11281 754U, 688U, 7828U, 12181U, 8265U, 3579U, 21073U, 13777U,
11282 21165U, 14521U, 8442U, 14842U, 8452U, 13059U, 15940U, 19605U,
11283 20737U, 8770U, 21032U, 1818U, 16480U, 8837U, 16829U, 1091U,
11284 13221U, 16534U, 17356U, 562U, 123U, 17007U, 16647U, 17119U,
11285 17389U, 17465U, 16983U, 13227U, 8385U, 16849U, 18509U, 3314U,
11286 3683U, 44U, 1549U, 16653U, 17130U, 18251U, 17481U, 17061U,
11287 528U, 94U, 16855U, 897U, 18514U, 18388U, 21059U, 4751U,
11288 512U, 21019U, 16545U, 806U, 17031U, 18167U, 17205U, 534U,
11289 16861U, 904U, 18519U, 21078U, 18611U, 9005U, 19599U, 3009U,
11290 8268U, 19594U, 1704U, 16803U, 17046U, 7170U, 11614U, 17396U,
11291 13083U, 8117U, 9029U, 11683U, 17591U, 13125U, 17492U, 13102U,
11292 3035U, 9194U, 9098U, 11712U, 17634U, 13139U, 21106U, 2849U,
11293 8857U, 16987U, 2791U, 16976U, 7179U, 19587U, 17407U, 13089U,
11294 8638U, 9028U, 17590U, 13131U, 19895U, 19768U, 18296U, 9273U,
11295 9102U, 17633U, 13144U, 7246U, 9079U, 12345U, 7375U, 9228U,
11296 12527U, 1085U, 6962U, 7883U, 8831U, 16237U, 7196U, 13898U,
11297 3328U, 8427U, 10323U, 21188U, 16599U, 17362U, 571U, 132U,
11298 17069U, 16714U, 17213U, 17419U, 17522U, 17792U, 16909U, 18547U,
11299 2944U, 22117U, 6606U, 11205U, 4349U, 13445U, 5386U, 9919U,
11300 14345U, 5865U, 10450U, 3865U, 12664U, 4891U, 9388U, 13917U,
11301 14967U, 15652U, 21333U, 15207U, 16057U, 21562U, 8992U, 22156U,
11302 6649U, 11248U, 4397U, 13488U, 5434U, 9967U, 14388U, 5913U,
11303 10498U, 3918U, 12712U, 4944U, 9441U, 13965U, 15015U, 15700U,
11304 21381U, 15250U, 16100U, 21605U, 17576U, 22309U, 6817U, 11416U,
11305 4583U, 13656U, 5620U, 10153U, 14490U, 6099U, 10684U, 4122U,
11306 12898U, 5148U, 9645U, 14078U, 15128U, 15813U, 21494U, 15352U,
11307 16202U, 21707U, 7951U, 22139U, 6623U, 11222U, 4368U, 13462U,
11308 5405U, 9938U, 14362U, 5884U, 10469U, 3886U, 12683U, 4912U,
11309 9409U, 13936U, 14986U, 15671U, 21352U, 15224U, 16074U, 21579U,
11310 11676U, 22184U, 6687U, 11286U, 4439U, 13526U, 5476U, 10009U,
11311 14426U, 5955U, 10540U, 3964U, 12754U, 4990U, 9487U, 14007U,
11312 15057U, 15742U, 21423U, 15288U, 16138U, 21643U, 17470U, 22291U,
11313 6797U, 11396U, 4561U, 13636U, 5598U, 10131U, 14470U, 6077U,
11314 10662U, 4098U, 12876U, 5124U, 9621U, 14056U, 15106U, 15791U,
11315 21472U, 15332U, 16182U, 21687U, 11699U, 22194U, 6698U, 11297U,
11316 4451U, 13537U, 5488U, 10021U, 14437U, 5967U, 10552U, 3977U,
11317 12766U, 5003U, 9500U, 14019U, 15069U, 15754U, 21435U, 15299U,
11318 16149U, 21654U, 11665U, 22175U, 6677U, 11276U, 4428U, 13516U,
11319 5465U, 9998U, 14416U, 5944U, 10529U, 3952U, 12743U, 4978U,
11320 9475U, 13996U, 15046U, 15731U, 21412U, 15278U, 16128U, 21633U,
11321 16992U, 22283U, 6788U, 11387U, 4551U, 13627U, 5588U, 10121U,
11322 14461U, 6067U, 10652U, 4087U, 12866U, 5113U, 9610U, 14046U,
11323 15096U, 15781U, 21462U, 15323U, 16173U, 21678U, 13232U, 3511U,
11324 16605U, 17368U, 580U, 141U, 7975U, 17074U, 16720U, 17218U,
11325 17425U, 17533U, 15922U, 16422U, 18033U, 20732U, 6482U, 21087U,
11326 721U, 16915U, 18552U, 17695U, 932U, 7855U, 21040U, 17084U,
11327 17228U, 13157U, 20644U, 8759U, 17565U, 11026U, 18492U, 13238U,
11328 19953U, 16623U, 17094U, 18233U, 16738U, 17238U, 8696U, 7213U,
11329 17443U, 17554U, 18315U, 16932U, 18566U, 18472U, 1023U, 7873U,
11330 1086U, 6963U, 7884U, 8832U, 16238U, 3566U, 1521U, 16629U,
11331 17099U, 18245U, 6488U, 1652U, 16744U, 17346U, 18539U, 21154U,
11332 17109U, 17351U, 554U, 7657U, 8620U, 18571U, 13779U, 3074U,
11333 1138U, 16528U, 16997U, 3584U, 1538U, 16641U, 17114U, 21036U,
11334 11051U, 17659U, 13357U, 17778U, 18592U, 2858U, 3324U, 1371U,
11335 16594U, 3687U, 1560U, 16659U, 17135U, 17065U, 18210U, 966U,
11336 5755U, 3767U, 1571U, 16665U, 17140U, 17209U, 21094U, 8406U,
11337 9036U, 11688U, 12095U, 10289U, 11716U, 21110U, 12569U, 8339U,
11338 17512U, 17753U, 15617U, 17789U, 19310U, 3046U, 8884U, 3553U,
11339 1477U, 16617U, 17089U, 6303U, 1641U, 16732U, 17233U, 11652U,
11340 8658U, 2796U, 7208U, 11631U, 17437U, 17543U, 2828U, 18078U,
11341 2835U, 1048U, 21258U, 3060U, 11970U, 14608U, 11965U, 12228U,
11342 4779U, 20515U, 19344U, 15488U, 13064U, 18976U, 12162U, 11693U,
11343 11706U, 11728U, 11886U, 21144U, 14821U, 15197U, 8526U, 20352U,
11344 21552U, 16904U, 3570U, 1526U, 16635U, 17104U, 18543U, 18449U,
11345 1011U, 21167U, 11056U, 17665U, 13362U, 17784U, 18597U, 14523U,
11346 2866U, 12071U, 12056U, 8444U, 17523U, 12101U, 11737U, 11537U,
11347 7252U, 9085U, 12351U, 7381U, 9247U, 12533U, 21128U, 12100U,
11348 797U, 12133U, 12106U, 15849U, 23469U, 18037U, 23483U, 12138U,
11349 17559U, 18319U, 17793U, 12134U, 8700U, 12117U, 12147U, 21197U,
11350 14844U, 2945U, 12077U, 12061U, 8454U, 17529U, 12107U, 11740U,
11351 7257U, 9090U, 12356U, 7386U, 9265U, 12538U, 21132U, 17832U,
11352 12139U, 21200U, 11951U, 1821U, 3006U, 2768U, 14936U, 16971U,
11353 3292U, 13070U, 7490U, 15167U, 14621U, 20362U, 744U, 20505U,
11354 14916U, 20026U, 23491U, 802U, 14946U, 18034U, 14951U, 20164U,
11355 7702U, 7149U, 11873U, 1906U, 18133U, 18377U, 11753U, 11560U,
11356 11841U, 15586U, 15506U, 23462U, 7894U, 73U, 23221U, 14567U,
11357 23436U, 21318U, 23536U, 23331U, 21288U, 23526U, 8139U, 23376U,
11358 8282U, 23386U, 12556U, 8328U, 7900U, 23340U, 7906U, 23349U,
11359 15928U, 3601U, 13796U, 18215U, 18454U, 8889U, 7912U, 23358U,
11360 18609U, 2746U, 6968U, 12199U, 212U, 23U, 456U, 16499U,
11361 18109U, 13883U, 11956U, 2817U, 7573U, 3554U, 1465U, 16618U,
11362 17090U, 18222U, 972U, 6304U, 1642U, 16733U, 17583U, 22319U,
11363 6828U, 11427U, 4595U, 13667U, 5632U, 10165U, 14501U, 6111U,
11364 10696U, 4135U, 12910U, 5161U, 9658U, 14090U, 15140U, 15825U,
11365 21506U, 15363U, 16213U, 21718U, 17506U, 22300U, 6807U, 11406U,
11366 4572U, 13646U, 5609U, 10142U, 14480U, 6088U, 10673U, 4110U,
11367 12887U, 5136U, 9633U, 14067U, 15117U, 15802U, 21483U, 15342U,
11368 16192U, 21697U, 17706U, 22329U, 6839U, 11438U, 4607U, 13678U,
11369 5644U, 10177U, 14512U, 6123U, 10708U, 4148U, 12922U, 5174U,
11370 9671U, 14102U, 15152U, 15837U, 21518U, 15374U, 16224U, 21729U,
11371 17234U, 18072U, 3014U, 8626U, 7204U, 17432U, 9040U, 17539U,
11372 12112U, 10942U, 17621U, 17741U, 21114U, 4725U, 731U, 15575U,
11373 13204U, 753U, 7843U, 11941U, 1897U, 7889U, 17458U, 16828U,
11374 706U, 12233U, 19835U, 11647U, 8375U, 7184U, 11625U, 17413U,
11375 17517U, 12089U, 17614U, 17734U, 12560U, 8333U, 12006U, 17770U,
11376 12128U, 20457U, 21161U, 13257U, 15942U, 18127U, 748U, 14116U,
11377 20167U, 20976U, 3515U, 1451U, 16611U, 17079U, 6246U, 1636U,
11378 16726U, 17223U, 16921U, 18557U, 18069U, 938U, 7862U, 11946U,
11379 711U, 12238U, 19845U, 12143U, 13173U, 8363U, 12011U, 13905U,
11380 1941U, 19997U, 15932U, 20342U, 20533U, 20467U, 17682U, 16503U,
11381 8894U, 4740U, 23272U, 14167U, 20302U, 13781U, 21170U, 15467U,
11382 16486U, 3056U, 8921U, 11960U, 2822U, 4729U, 7329U, 13805U,
11383 10292U, 21181U, 19350U, 20721U, 8690U, 13244U, 21054U, 3557U,
11384 21063U, 6371U, 517U, 21025U, 21082U, 9009U, 12317U, 4792U,
11385 3019U, 8702U, 13107U, 3040U, 10985U, 9142U, 13150U, 21118U,
11386 15500U, 14172U, 8431U, 10327U, 21192U, 14153U, 2995U, 22124U,
11387 6614U, 11213U, 4358U, 13453U, 5395U, 9928U, 14353U, 5874U,
11388 10459U, 3875U, 12673U, 4901U, 9398U, 13926U, 14976U, 15661U,
11389 21342U, 15215U, 16065U, 21570U, 8998U, 22165U, 6659U, 11258U,
11390 4408U, 13498U, 5445U, 9978U, 14398U, 5924U, 10509U, 3930U,
11391 12723U, 4956U, 9453U, 13976U, 15026U, 15711U, 21392U, 15260U,
11392 16110U, 21615U, 7956U, 22147U, 6632U, 11231U, 4378U, 13471U,
11393 5415U, 9948U, 14371U, 5894U, 10479U, 3897U, 12693U, 4923U,
11394 9420U, 13946U, 14996U, 15681U, 21362U, 15233U, 16083U, 21588U,
11395 14159U, 16426U, 20171U, 20980U, 7867U, 13183U, 20648U, 8764U,
11396 11031U, 8899U, 11853U, 1028U, 8610U, 21270U, 20530U, 18488U,
11397 3064U, 20729U, 18501U, 16927U, 18562U, 18461U, 1017U, 21250U,
11398 20261U, 13782U, 16508U, 2389U, 17002U, 17025U, 14614U, 2861U,
11399 1186U, 1543U, 2528U, 19823U, 19855U, 20368U, 19829U, 19861U,
11400 20451U, 3394U, 17124U, 17051U, 14173U, 9120U, 12361U, 9284U,
11401 12543U, 21193U, 15966U, 11577U, 11749U, 20151U, 18100U, 3622U,
11402 7924U, 193U, 506U, 6299U, 15162U, 23446U, 20157U, 23501U,
11403 20291U, 6366U, 23314U, 15192U, 23454U, 18342U, 6297U, 23280U,
11404 20357U, 23509U, 19537U, 8900U, 12043U, 742U, 20503U, 20176U,
11405 1053U, 1081U, 2750U, 2757U, 1101U, 2762U, 16260U, 6973U,
11406 7930U, 8841U, 16254U, 16249U, 6958U, 7879U, 8827U, 15472U,
11407 16233U, 8720U, 1715U, 7218U, 8121U, 9044U, 12322U, 1832U,
11408 7357U, 8306U, 9210U, 16369U, 16296U, 3387U, 1381U, 6996U,
11409 7967U, 8930U, 16277U, 14120U, 7962U, 1683U, 8295U, 1701U,
11410 1657U, 1669U, 16291U, 2000U, 18777U, 7584U, 19067U, 8531U,
11411 19148U, 10880U, 19213U, 16431U, 19375U, 1576U, 14562U, 13048U,
11412 19356U, 3300U, 1275U, 8926U, 1733U, 18764U, 7236U, 19054U,
11413 8146U, 19135U, 9069U, 19200U, 12335U, 1839U, 18770U, 7364U,
11414 19060U, 8313U, 19141U, 9217U, 19206U, 16376U, 19368U, 16308U,
11415 19362U, 14147U, 1588U, 10350U, 12572U, 15545U, 3305U, 1287U,
11416 21306U, 2717U, 15519U, 7799U, 8787U, 11104U, 16468U, 7511U,
11417 15489U, 7521U, 15569U, 10869U, 21536U, 2731U, 7822U, 8802U,
11418 11127U, 16474U, 2460U, 7918U, 23367U, 23248U, 16243U, 3561U,
11419 7980U, 16285U, 3563U, 7004U, 7982U, 12243U, 7352U, 8301U,
11420 16364U, 15515U, 16287U, 2779U, 1107U, 6979U, 7936U, 8847U,
11421 12209U, 1826U, 7346U, 8289U, 9204U, 16358U, 16267U, 13888U,
11422 1934U, 7500U, 8420U, 10315U, 12554U, 1852U, 7416U, 8326U,
11423 9277U, 20586U, 2471U, 7726U, 8731U, 11003U, 13207U, 1895U,
11424 7458U, 8373U, 9811U, 20600U, 2487U, 7742U, 8747U, 11019U,
11425 936U, 1068U, 6951U, 7860U, 8820U, 20539U, 2452U, 7712U,
11426 8712U, 10989U, 13171U, 1882U, 7446U, 8361U, 9804U, 20593U,
11427 2479U, 7734U, 8739U, 11011U, 12203U, 727U, 1124U, 3574U,
11428 1531U, 18742U, 7008U, 19032U, 8938U, 19178U, 2688U, 18951U,
11429 7770U, 19110U, 11068U, 19252U, 2033U, 3628U, 1203U, 18642U,
11430 2107U, 18792U, 8852U, 1301U, 18710U, 3771U, 1217U, 18658U,
11431 2121U, 18808U, 2167U, 18860U, 3296U, 1191U, 2095U, 3762U,
11432 1565U, 18749U, 7088U, 19039U, 8950U, 19185U, 2695U, 18959U,
11433 7777U, 19118U, 11075U, 19260U, 5758U, 1629U, 18756U, 7122U,
11434 19046U, 8979U, 19192U, 2709U, 18967U, 7791U, 19126U, 11089U,
11435 19268U, 11657U, 1345U, 2211U, 1249U, 18694U, 2153U, 18844U,
11436 1315U, 18726U, 1233U, 18676U, 2137U, 18826U, 2181U, 18876U,
11437 1172U, 2081U, 12512U, 19296U, 1405U, 2257U, 1435U, 2287U,
11438 17711U, 3536U, 13875U, 763U, 1136U, 2045U, 20741U, 1505U,
11439 2368U, 1369U, 14626U, 1389U, 2241U, 19308U, 2229U, 1475U,
11440 2334U, 791U, 1150U, 2059U, 19313U, 1489U, 2348U, 15186U,
11441 1419U, 2271U, 19097U, 1463U, 16454U, 1449U, 2301U, 2322U,
11442 11566U, 1329U, 2195U, 13786U, 7094U, 7998U, 13810U, 1917U,
11443 7478U, 8403U, 10298U, 16404U, 13870U, 757U, 1061U, 6944U,
11444 7848U, 8808U, 1923U, 7484U, 8409U, 10304U, 13879U, 1929U,
11445 7495U, 8415U, 10310U, 18353U, 2026U, 18784U, 7646U, 19074U,
11446 10932U, 19220U, 13349U, 22417U, 1096U, 16833U, 7612U, 8584U,
11447 10901U, 16437U, 15532U, 7558U, 8501U, 10849U, 2853U, 1112U,
11448 6984U, 7946U, 8862U, 16272U, 3682U, 1548U, 1619U, 7597U,
11449 8569U, 10886U, 3287U, 1263U, 7112U, 8016U, 8969U, 1786U,
11450 7316U, 8240U, 9162U, 17204U, 7625U, 8597U, 10914U, 20546U,
11451 2465U, 7720U, 8725U, 10997U, 15604U, 12564U, 21528U, 6525U,
11452 7805U, 8793U, 11110U, 21282U, 2702U, 7784U, 8780U, 11082U,
11453 7470U, 13901U, 22425U, 15609U, 1995U, 7579U, 8516U, 10864U,
11454 16421U, 17774U, 15526U, 1982U, 7551U, 8494U, 10842U, 13161U,
11455 17757U, 8754U, 1721U, 7224U, 8127U, 9050U, 15580U, 3583U,
11456 1537U, 7014U, 7986U, 8944U, 8815U, 1727U, 7230U, 8133U,
11457 9056U, 16302U, 12194U, 1815U, 4754U, 1606U, 7099U, 8003U,
11458 8956U, 7340U, 8276U, 9191U, 1738U, 7267U, 8185U, 9095U,
11459 16313U, 20664U, 14905U, 1964U, 7533U, 8463U, 10824U, 16352U,
11460 14846U, 1958U, 7527U, 8457U, 10818U, 5754U, 1624U, 7117U,
11461 8027U, 8974U, 10338U, 1758U, 7292U, 8205U, 9125U, 16326U,
11462 12568U, 1859U, 4798U, 1613U, 7106U, 8010U, 8963U, 7423U,
11463 8338U, 9289U, 1745U, 7279U, 8192U, 9107U, 16320U, 20671U,
11464 14911U, 1971U, 7540U, 8477U, 10831U, 16382U, 14797U, 1953U,
11465 7516U, 8447U, 10365U, 12579U, 1864U, 7428U, 8343U, 9294U,
11466 16387U, 16416U, 14942U, 1977U, 7546U, 8483U, 10837U, 15641U,
11467 10927U, 1769U, 7303U, 8216U, 9136U, 13166U, 1876U, 7440U,
11468 8355U, 9798U, 13212U, 8379U, 15956U, 20968U, 2609U, 7749U,
11469 8775U, 11041U, 13352U, 1911U, 7464U, 8391U, 9833U, 16398U,
11470 16463U, 14822U, 2926U, 14801U, 14956U, 20972U, 15198U, 3000U,
11471 5780U, 11572U, 14127U, 12048U, 7335U, 8260U, 9186U, 19290U,
11472 7668U, 19089U, 8651U, 19162U, 10945U, 19235U, 19285U, 7662U,
11473 19082U, 8645U, 19155U, 10939U, 19228U, 21301U, 18601U, 19811U,
11474 2384U, 7694U, 8676U, 10971U, 15887U, 18494U, 15540U, 1989U,
11475 7567U, 8510U, 10858U, 11743U, 1808U, 7322U, 8246U, 9173U,
11476 7653U, 8616U, 13188U, 7453U, 8368U, 16393U, 15936U, 16450U,
11477 19578U, 2364U, 11542U, 16331U, 11555U, 16346U, 11549U, 1775U,
11478 7309U, 8233U, 9151U, 16339U, 7020U, 7992U, 15493U, 15591U,
11479 15949U, 16044U, 15597U, 15510U, 8100U, 1695U, 7162U, 9022U,
11480 12312U, 7690U, 8662U, 10967U, 13217U, 1901U, 3317U, 1363U,
11481 15961U, 16459U, 942U, 1075U, 3548U, 13177U, 1889U, 15931U,
11482 18042U, 20353U, 22444U, 16838U, 7618U, 8590U, 10907U, 16443U,
11483 1646U, 7604U, 8576U, 10893U, 7143U, 8105U, 8986U, 17340U,
11484 7631U, 8603U, 10920U, 13263U, 14171U, 22434U, 3029U, 1117U,
11485 18634U, 6989U, 19024U, 8867U, 19170U, 2680U, 18942U, 7762U,
11486 19101U, 11060U, 19243U, 13182U, 17763U, 19407U, 2315U, 7675U,
11487 10960U, 2723U, 7814U, 11119U, 14334U, 1947U, 8436U, 7189U,
11488 9033U, 10332U, 16410U, 7590U, 8537U, 14176U, 15965U, 23476U,
11489 21548U, 10875U, 1763U, 7297U, 8210U, 9130U, 21295U, 11097U,
11490 13366U, 13054U, 1870U, 7434U, 8349U, 9792U, 1751U, 7285U,
11491 8198U, 9113U, 20677U, 12548U, 1845U, 7409U, 8319U, 9270U,
11492 21010U, 15180U, 1689U, 1708U, 1663U, 1676U, 1582U, 1281U,
11493 1595U, 1294U, 1130U, 2039U, 2494U, 2787U, 1166U, 1210U,
11494 18650U, 2114U, 18800U, 2539U, 18892U, 1308U, 18718U, 1225U,
11495 18667U, 2129U, 18817U, 2546U, 18900U, 2174U, 18868U, 2569U,
11496 18926U, 2075U, 2515U, 1197U, 2101U, 2533U, 1351U, 2217U,
11497 2591U, 11976U, 1357U, 1256U, 18702U, 2160U, 18852U, 2562U,
11498 18918U, 1322U, 18734U, 1241U, 18685U, 2145U, 18835U, 2554U,
11499 18909U, 2188U, 18884U, 2576U, 18934U, 2223U, 2597U, 1179U,
11500 2088U, 2521U, 3311U, 19302U, 1412U, 2264U, 2622U, 1442U,
11501 2294U, 2637U, 3542U, 20985U, 1143U, 2052U, 2500U, 1513U,
11502 2376U, 2672U, 1375U, 1397U, 2249U, 2614U, 2235U, 1482U,
11503 2341U, 2657U, 2603U, 1158U, 2067U, 2507U, 1497U, 2356U,
11504 2664U, 1427U, 2279U, 2629U, 1469U, 1456U, 2308U, 2644U,
11505 2328U, 2651U, 1337U, 2203U, 2583U, 1554U, 1269U, 20739U,
11506 3068U, 8772U, 17572U, 12118U, 11898U, 7262U, 7404U, 21149U,
11507 18506U, 12148U, 8905U, 21279U, 15484U,
11508};
11509
11510static inline void InitSystemZMCInstrInfo(MCInstrInfo *II) {
11511 II->InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3285);
11512}
11513
11514} // end namespace llvm
11515#endif // GET_INSTRINFO_MC_DESC
11516
11517#ifdef GET_INSTRINFO_HEADER
11518#undef GET_INSTRINFO_HEADER
11519namespace llvm {
11520struct SystemZGenInstrInfo : public TargetInstrInfo {
11521 explicit SystemZGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
11522 ~SystemZGenInstrInfo() override = default;
11523
11524};
11525} // end namespace llvm
11526#endif // GET_INSTRINFO_HEADER
11527
11528#ifdef GET_INSTRINFO_HELPER_DECLS
11529#undef GET_INSTRINFO_HELPER_DECLS
11530
11531
11532#endif // GET_INSTRINFO_HELPER_DECLS
11533
11534#ifdef GET_INSTRINFO_HELPERS
11535#undef GET_INSTRINFO_HELPERS
11536
11537#endif // GET_INSTRINFO_HELPERS
11538
11539#ifdef GET_INSTRINFO_CTOR_DTOR
11540#undef GET_INSTRINFO_CTOR_DTOR
11541namespace llvm {
11542extern const SystemZInstrTable SystemZDescs;
11543extern const unsigned SystemZInstrNameIndices[];
11544extern const char SystemZInstrNameData[];
11545SystemZGenInstrInfo::SystemZGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
11546 : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
11547 InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3285);
11548}
11549} // end namespace llvm
11550#endif // GET_INSTRINFO_CTOR_DTOR
11551
11552#ifdef GET_INSTRINFO_MC_HELPER_DECLS
11553#undef GET_INSTRINFO_MC_HELPER_DECLS
11554
11555namespace llvm {
11556class MCInst;
11557class FeatureBitset;
11558
11559namespace SystemZ_MC {
11560
11561void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
11562
11563} // end namespace SystemZ_MC
11564} // end namespace llvm
11565
11566#endif // GET_INSTRINFO_MC_HELPER_DECLS
11567
11568#ifdef GET_INSTRINFO_MC_HELPERS
11569#undef GET_INSTRINFO_MC_HELPERS
11570
11571namespace llvm::SystemZ_MC {
11572} // end namespace llvm::SystemZ_MC
11573#endif // GET_GENISTRINFO_MC_HELPERS
11574
11575#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
11576 defined(GET_AVAILABLE_OPCODE_CHECKER)
11577#define GET_COMPUTE_FEATURES
11578#endif
11579#ifdef GET_COMPUTE_FEATURES
11580#undef GET_COMPUTE_FEATURES
11581namespace llvm::SystemZ_MC {
11582// Bits for subtarget features that participate in instruction matching.
11583enum SubtargetFeatureBits : uint8_t {
11584 Feature_FeatureSoftFloatBit = 37,
11585 Feature_FeatureBackChainBit = 1,
11586 Feature_FeatureUnalignedSymbolsBit = 40,
11587 Feature_FeatureDistinctOpsBit = 6,
11588 Feature_FeatureFastSerializationBit = 11,
11589 Feature_FeatureFPExtensionBit = 10,
11590 Feature_FeatureHighWordBit = 13,
11591 Feature_FeatureInterlockedAccess1Bit = 15,
11592 Feature_FeatureLoadStoreOnCondBit = 18,
11593 Feature_FeaturePopulationCountBit = 32,
11594 Feature_FeatureMessageSecurityAssist3Bit = 20,
11595 Feature_FeatureMessageSecurityAssist4Bit = 21,
11596 Feature_FeatureResetReferenceBitsMultipleBit = 36,
11597 Feature_FeatureExecutionHintBit = 9,
11598 Feature_FeatureLoadAndTrapBit = 16,
11599 Feature_FeatureMiscellaneousExtensionsBit = 27,
11600 Feature_FeatureProcessorAssistBit = 34,
11601 Feature_FeatureTransactionalExecutionBit = 39,
11602 Feature_FeatureDFPZonedConversionBit = 4,
11603 Feature_FeatureEnhancedDAT2Bit = 7,
11604 Feature_FeatureLoadAndZeroRightmostByteBit = 17,
11605 Feature_FeatureLoadStoreOnCond2Bit = 19,
11606 Feature_FeatureMessageSecurityAssist5Bit = 22,
11607 Feature_FeatureDFPPackedConversionBit = 3,
11608 Feature_FeatureVectorBit = 41,
11609 Feature_FeatureMiscellaneousExtensions2Bit = 28,
11610 Feature_FeatureGuardedStorageBit = 12,
11611 Feature_FeatureMessageSecurityAssist7Bit = 23,
11612 Feature_FeatureMessageSecurityAssist8Bit = 24,
11613 Feature_FeatureVectorEnhancements1Bit = 42,
11614 Feature_FeatureVectorPackedDecimalBit = 45,
11615 Feature_FeatureInsertReferenceBitsMultipleBit = 14,
11616 Feature_FeatureTestPendingExternalInterruptionBit = 38,
11617 Feature_FeatureMiscellaneousExtensions3Bit = 29,
11618 Feature_FeatureMessageSecurityAssist9Bit = 25,
11619 Feature_FeatureVectorEnhancements2Bit = 43,
11620 Feature_FeatureVectorPackedDecimalEnhancementBit = 46,
11621 Feature_FeatureEnhancedSortBit = 8,
11622 Feature_FeatureDeflateConversionBit = 5,
11623 Feature_FeatureVectorPackedDecimalEnhancement2Bit = 47,
11624 Feature_FeatureNNPAssistBit = 31,
11625 Feature_FeatureBEAREnhancementBit = 0,
11626 Feature_FeatureResetDATProtectionBit = 35,
11627 Feature_FeatureProcessorActivityInstrumentationBit = 33,
11628 Feature_FeatureMiscellaneousExtensions4Bit = 30,
11629 Feature_FeatureVectorEnhancements3Bit = 44,
11630 Feature_FeatureVectorPackedDecimalEnhancement3Bit = 48,
11631 Feature_FeatureMessageSecurityAssist12Bit = 26,
11632 Feature_FeatureConcurrentFunctionsBit = 2,
11633};
11634
11635inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
11636 FeatureBitset Features;
11637 if (FB[SystemZ::FeatureSoftFloat])
11638 Features.set(Feature_FeatureSoftFloatBit);
11639 if (FB[SystemZ::FeatureBackChain])
11640 Features.set(Feature_FeatureBackChainBit);
11641 if (FB[SystemZ::FeatureUnalignedSymbols])
11642 Features.set(Feature_FeatureUnalignedSymbolsBit);
11643 if (FB[SystemZ::FeatureDistinctOps])
11644 Features.set(Feature_FeatureDistinctOpsBit);
11645 if (FB[SystemZ::FeatureFastSerialization])
11646 Features.set(Feature_FeatureFastSerializationBit);
11647 if (FB[SystemZ::FeatureFPExtension])
11648 Features.set(Feature_FeatureFPExtensionBit);
11649 if (FB[SystemZ::FeatureHighWord])
11650 Features.set(Feature_FeatureHighWordBit);
11651 if (FB[SystemZ::FeatureInterlockedAccess1])
11652 Features.set(Feature_FeatureInterlockedAccess1Bit);
11653 if (FB[SystemZ::FeatureLoadStoreOnCond])
11654 Features.set(Feature_FeatureLoadStoreOnCondBit);
11655 if (FB[SystemZ::FeaturePopulationCount])
11656 Features.set(Feature_FeaturePopulationCountBit);
11657 if (FB[SystemZ::FeatureMessageSecurityAssist3])
11658 Features.set(Feature_FeatureMessageSecurityAssist3Bit);
11659 if (FB[SystemZ::FeatureMessageSecurityAssist4])
11660 Features.set(Feature_FeatureMessageSecurityAssist4Bit);
11661 if (FB[SystemZ::FeatureResetReferenceBitsMultiple])
11662 Features.set(Feature_FeatureResetReferenceBitsMultipleBit);
11663 if (FB[SystemZ::FeatureExecutionHint])
11664 Features.set(Feature_FeatureExecutionHintBit);
11665 if (FB[SystemZ::FeatureLoadAndTrap])
11666 Features.set(Feature_FeatureLoadAndTrapBit);
11667 if (FB[SystemZ::FeatureMiscellaneousExtensions])
11668 Features.set(Feature_FeatureMiscellaneousExtensionsBit);
11669 if (FB[SystemZ::FeatureProcessorAssist])
11670 Features.set(Feature_FeatureProcessorAssistBit);
11671 if (FB[SystemZ::FeatureTransactionalExecution])
11672 Features.set(Feature_FeatureTransactionalExecutionBit);
11673 if (FB[SystemZ::FeatureDFPZonedConversion])
11674 Features.set(Feature_FeatureDFPZonedConversionBit);
11675 if (FB[SystemZ::FeatureEnhancedDAT2])
11676 Features.set(Feature_FeatureEnhancedDAT2Bit);
11677 if (FB[SystemZ::FeatureLoadAndZeroRightmostByte])
11678 Features.set(Feature_FeatureLoadAndZeroRightmostByteBit);
11679 if (FB[SystemZ::FeatureLoadStoreOnCond2])
11680 Features.set(Feature_FeatureLoadStoreOnCond2Bit);
11681 if (FB[SystemZ::FeatureMessageSecurityAssist5])
11682 Features.set(Feature_FeatureMessageSecurityAssist5Bit);
11683 if (FB[SystemZ::FeatureDFPPackedConversion])
11684 Features.set(Feature_FeatureDFPPackedConversionBit);
11685 if (FB[SystemZ::FeatureVector])
11686 Features.set(Feature_FeatureVectorBit);
11687 if (FB[SystemZ::FeatureMiscellaneousExtensions2])
11688 Features.set(Feature_FeatureMiscellaneousExtensions2Bit);
11689 if (FB[SystemZ::FeatureGuardedStorage])
11690 Features.set(Feature_FeatureGuardedStorageBit);
11691 if (FB[SystemZ::FeatureMessageSecurityAssist7])
11692 Features.set(Feature_FeatureMessageSecurityAssist7Bit);
11693 if (FB[SystemZ::FeatureMessageSecurityAssist8])
11694 Features.set(Feature_FeatureMessageSecurityAssist8Bit);
11695 if (FB[SystemZ::FeatureVectorEnhancements1])
11696 Features.set(Feature_FeatureVectorEnhancements1Bit);
11697 if (FB[SystemZ::FeatureVectorPackedDecimal])
11698 Features.set(Feature_FeatureVectorPackedDecimalBit);
11699 if (FB[SystemZ::FeatureInsertReferenceBitsMultiple])
11700 Features.set(Feature_FeatureInsertReferenceBitsMultipleBit);
11701 if (FB[SystemZ::FeatureTestPendingExternalInterruption])
11702 Features.set(Feature_FeatureTestPendingExternalInterruptionBit);
11703 if (FB[SystemZ::FeatureMiscellaneousExtensions3])
11704 Features.set(Feature_FeatureMiscellaneousExtensions3Bit);
11705 if (FB[SystemZ::FeatureMessageSecurityAssist9])
11706 Features.set(Feature_FeatureMessageSecurityAssist9Bit);
11707 if (FB[SystemZ::FeatureVectorEnhancements2])
11708 Features.set(Feature_FeatureVectorEnhancements2Bit);
11709 if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement])
11710 Features.set(Feature_FeatureVectorPackedDecimalEnhancementBit);
11711 if (FB[SystemZ::FeatureEnhancedSort])
11712 Features.set(Feature_FeatureEnhancedSortBit);
11713 if (FB[SystemZ::FeatureDeflateConversion])
11714 Features.set(Feature_FeatureDeflateConversionBit);
11715 if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement2])
11716 Features.set(Feature_FeatureVectorPackedDecimalEnhancement2Bit);
11717 if (FB[SystemZ::FeatureNNPAssist])
11718 Features.set(Feature_FeatureNNPAssistBit);
11719 if (FB[SystemZ::FeatureBEAREnhancement])
11720 Features.set(Feature_FeatureBEAREnhancementBit);
11721 if (FB[SystemZ::FeatureResetDATProtection])
11722 Features.set(Feature_FeatureResetDATProtectionBit);
11723 if (FB[SystemZ::FeatureProcessorActivityInstrumentation])
11724 Features.set(Feature_FeatureProcessorActivityInstrumentationBit);
11725 if (FB[SystemZ::FeatureMiscellaneousExtensions4])
11726 Features.set(Feature_FeatureMiscellaneousExtensions4Bit);
11727 if (FB[SystemZ::FeatureVectorEnhancements3])
11728 Features.set(Feature_FeatureVectorEnhancements3Bit);
11729 if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement3])
11730 Features.set(Feature_FeatureVectorPackedDecimalEnhancement3Bit);
11731 if (FB[SystemZ::FeatureMessageSecurityAssist12])
11732 Features.set(Feature_FeatureMessageSecurityAssist12Bit);
11733 if (FB[SystemZ::FeatureConcurrentFunctions])
11734 Features.set(Feature_FeatureConcurrentFunctionsBit);
11735 return Features;
11736}
11737
11738inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
11739 enum : uint8_t {
11740 CEFBS_None,
11741 CEFBS_FeatureBEAREnhancement,
11742 CEFBS_FeatureConcurrentFunctions,
11743 CEFBS_FeatureDFPPackedConversion,
11744 CEFBS_FeatureDFPZonedConversion,
11745 CEFBS_FeatureDeflateConversion,
11746 CEFBS_FeatureDistinctOps,
11747 CEFBS_FeatureEnhancedDAT2,
11748 CEFBS_FeatureEnhancedSort,
11749 CEFBS_FeatureExecutionHint,
11750 CEFBS_FeatureFPExtension,
11751 CEFBS_FeatureGuardedStorage,
11752 CEFBS_FeatureHighWord,
11753 CEFBS_FeatureInsertReferenceBitsMultiple,
11754 CEFBS_FeatureInterlockedAccess1,
11755 CEFBS_FeatureLoadAndTrap,
11756 CEFBS_FeatureLoadAndZeroRightmostByte,
11757 CEFBS_FeatureLoadStoreOnCond,
11758 CEFBS_FeatureLoadStoreOnCond2,
11759 CEFBS_FeatureMessageSecurityAssist12,
11760 CEFBS_FeatureMessageSecurityAssist3,
11761 CEFBS_FeatureMessageSecurityAssist4,
11762 CEFBS_FeatureMessageSecurityAssist5,
11763 CEFBS_FeatureMessageSecurityAssist7,
11764 CEFBS_FeatureMessageSecurityAssist8,
11765 CEFBS_FeatureMessageSecurityAssist9,
11766 CEFBS_FeatureMiscellaneousExtensions,
11767 CEFBS_FeatureMiscellaneousExtensions2,
11768 CEFBS_FeatureMiscellaneousExtensions3,
11769 CEFBS_FeatureMiscellaneousExtensions4,
11770 CEFBS_FeatureNNPAssist,
11771 CEFBS_FeaturePopulationCount,
11772 CEFBS_FeatureProcessorActivityInstrumentation,
11773 CEFBS_FeatureProcessorAssist,
11774 CEFBS_FeatureResetDATProtection,
11775 CEFBS_FeatureResetReferenceBitsMultiple,
11776 CEFBS_FeatureTestPendingExternalInterruption,
11777 CEFBS_FeatureTransactionalExecution,
11778 CEFBS_FeatureVector,
11779 CEFBS_FeatureVectorEnhancements1,
11780 CEFBS_FeatureVectorEnhancements2,
11781 CEFBS_FeatureVectorEnhancements3,
11782 CEFBS_FeatureVectorPackedDecimal,
11783 CEFBS_FeatureVectorPackedDecimalEnhancement,
11784 CEFBS_FeatureVectorPackedDecimalEnhancement2,
11785 CEFBS_FeatureVectorPackedDecimalEnhancement3,
11786 CEFBS_FeatureHighWord_FeatureDistinctOps,
11787 CEFBS_FeatureVector_FeatureNNPAssist,
11788 };
11789
11790 static constexpr FeatureBitset FeatureBitsets[] = {
11791 {}, // CEFBS_None
11792 {Feature_FeatureBEAREnhancementBit, },
11793 {Feature_FeatureConcurrentFunctionsBit, },
11794 {Feature_FeatureDFPPackedConversionBit, },
11795 {Feature_FeatureDFPZonedConversionBit, },
11796 {Feature_FeatureDeflateConversionBit, },
11797 {Feature_FeatureDistinctOpsBit, },
11798 {Feature_FeatureEnhancedDAT2Bit, },
11799 {Feature_FeatureEnhancedSortBit, },
11800 {Feature_FeatureExecutionHintBit, },
11801 {Feature_FeatureFPExtensionBit, },
11802 {Feature_FeatureGuardedStorageBit, },
11803 {Feature_FeatureHighWordBit, },
11804 {Feature_FeatureInsertReferenceBitsMultipleBit, },
11805 {Feature_FeatureInterlockedAccess1Bit, },
11806 {Feature_FeatureLoadAndTrapBit, },
11807 {Feature_FeatureLoadAndZeroRightmostByteBit, },
11808 {Feature_FeatureLoadStoreOnCondBit, },
11809 {Feature_FeatureLoadStoreOnCond2Bit, },
11810 {Feature_FeatureMessageSecurityAssist12Bit, },
11811 {Feature_FeatureMessageSecurityAssist3Bit, },
11812 {Feature_FeatureMessageSecurityAssist4Bit, },
11813 {Feature_FeatureMessageSecurityAssist5Bit, },
11814 {Feature_FeatureMessageSecurityAssist7Bit, },
11815 {Feature_FeatureMessageSecurityAssist8Bit, },
11816 {Feature_FeatureMessageSecurityAssist9Bit, },
11817 {Feature_FeatureMiscellaneousExtensionsBit, },
11818 {Feature_FeatureMiscellaneousExtensions2Bit, },
11819 {Feature_FeatureMiscellaneousExtensions3Bit, },
11820 {Feature_FeatureMiscellaneousExtensions4Bit, },
11821 {Feature_FeatureNNPAssistBit, },
11822 {Feature_FeaturePopulationCountBit, },
11823 {Feature_FeatureProcessorActivityInstrumentationBit, },
11824 {Feature_FeatureProcessorAssistBit, },
11825 {Feature_FeatureResetDATProtectionBit, },
11826 {Feature_FeatureResetReferenceBitsMultipleBit, },
11827 {Feature_FeatureTestPendingExternalInterruptionBit, },
11828 {Feature_FeatureTransactionalExecutionBit, },
11829 {Feature_FeatureVectorBit, },
11830 {Feature_FeatureVectorEnhancements1Bit, },
11831 {Feature_FeatureVectorEnhancements2Bit, },
11832 {Feature_FeatureVectorEnhancements3Bit, },
11833 {Feature_FeatureVectorPackedDecimalBit, },
11834 {Feature_FeatureVectorPackedDecimalEnhancementBit, },
11835 {Feature_FeatureVectorPackedDecimalEnhancement2Bit, },
11836 {Feature_FeatureVectorPackedDecimalEnhancement3Bit, },
11837 {Feature_FeatureHighWordBit, Feature_FeatureDistinctOpsBit, },
11838 {Feature_FeatureVectorBit, Feature_FeatureNNPAssistBit, },
11839 };
11840 static constexpr uint8_t RequiredFeaturesRefs[] = {
11841 CEFBS_None, // PHI = 0
11842 CEFBS_None, // INLINEASM = 1
11843 CEFBS_None, // INLINEASM_BR = 2
11844 CEFBS_None, // CFI_INSTRUCTION = 3
11845 CEFBS_None, // EH_LABEL = 4
11846 CEFBS_None, // GC_LABEL = 5
11847 CEFBS_None, // ANNOTATION_LABEL = 6
11848 CEFBS_None, // KILL = 7
11849 CEFBS_None, // EXTRACT_SUBREG = 8
11850 CEFBS_None, // INSERT_SUBREG = 9
11851 CEFBS_None, // IMPLICIT_DEF = 10
11852 CEFBS_None, // INIT_UNDEF = 11
11853 CEFBS_None, // SUBREG_TO_REG = 12
11854 CEFBS_None, // COPY_TO_REGCLASS = 13
11855 CEFBS_None, // DBG_VALUE = 14
11856 CEFBS_None, // DBG_VALUE_LIST = 15
11857 CEFBS_None, // DBG_INSTR_REF = 16
11858 CEFBS_None, // DBG_PHI = 17
11859 CEFBS_None, // DBG_LABEL = 18
11860 CEFBS_None, // REG_SEQUENCE = 19
11861 CEFBS_None, // COPY = 20
11862 CEFBS_None, // BUNDLE = 21
11863 CEFBS_None, // LIFETIME_START = 22
11864 CEFBS_None, // LIFETIME_END = 23
11865 CEFBS_None, // PSEUDO_PROBE = 24
11866 CEFBS_None, // ARITH_FENCE = 25
11867 CEFBS_None, // STACKMAP = 26
11868 CEFBS_None, // FENTRY_CALL = 27
11869 CEFBS_None, // PATCHPOINT = 28
11870 CEFBS_None, // LOAD_STACK_GUARD = 29
11871 CEFBS_None, // PREALLOCATED_SETUP = 30
11872 CEFBS_None, // PREALLOCATED_ARG = 31
11873 CEFBS_None, // STATEPOINT = 32
11874 CEFBS_None, // LOCAL_ESCAPE = 33
11875 CEFBS_None, // FAULTING_OP = 34
11876 CEFBS_None, // PATCHABLE_OP = 35
11877 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 36
11878 CEFBS_None, // PATCHABLE_RET = 37
11879 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 38
11880 CEFBS_None, // PATCHABLE_TAIL_CALL = 39
11881 CEFBS_None, // PATCHABLE_EVENT_CALL = 40
11882 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 41
11883 CEFBS_None, // ICALL_BRANCH_FUNNEL = 42
11884 CEFBS_None, // FAKE_USE = 43
11885 CEFBS_None, // MEMBARRIER = 44
11886 CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 45
11887 CEFBS_None, // CONVERGENCECTRL_ENTRY = 46
11888 CEFBS_None, // CONVERGENCECTRL_ANCHOR = 47
11889 CEFBS_None, // CONVERGENCECTRL_LOOP = 48
11890 CEFBS_None, // CONVERGENCECTRL_GLUE = 49
11891 CEFBS_None, // G_ASSERT_SEXT = 50
11892 CEFBS_None, // G_ASSERT_ZEXT = 51
11893 CEFBS_None, // G_ASSERT_ALIGN = 52
11894 CEFBS_None, // G_ADD = 53
11895 CEFBS_None, // G_SUB = 54
11896 CEFBS_None, // G_MUL = 55
11897 CEFBS_None, // G_SDIV = 56
11898 CEFBS_None, // G_UDIV = 57
11899 CEFBS_None, // G_SREM = 58
11900 CEFBS_None, // G_UREM = 59
11901 CEFBS_None, // G_SDIVREM = 60
11902 CEFBS_None, // G_UDIVREM = 61
11903 CEFBS_None, // G_AND = 62
11904 CEFBS_None, // G_OR = 63
11905 CEFBS_None, // G_XOR = 64
11906 CEFBS_None, // G_ABDS = 65
11907 CEFBS_None, // G_ABDU = 66
11908 CEFBS_None, // G_IMPLICIT_DEF = 67
11909 CEFBS_None, // G_PHI = 68
11910 CEFBS_None, // G_FRAME_INDEX = 69
11911 CEFBS_None, // G_GLOBAL_VALUE = 70
11912 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE = 71
11913 CEFBS_None, // G_CONSTANT_POOL = 72
11914 CEFBS_None, // G_EXTRACT = 73
11915 CEFBS_None, // G_UNMERGE_VALUES = 74
11916 CEFBS_None, // G_INSERT = 75
11917 CEFBS_None, // G_MERGE_VALUES = 76
11918 CEFBS_None, // G_BUILD_VECTOR = 77
11919 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 78
11920 CEFBS_None, // G_CONCAT_VECTORS = 79
11921 CEFBS_None, // G_PTRTOINT = 80
11922 CEFBS_None, // G_INTTOPTR = 81
11923 CEFBS_None, // G_BITCAST = 82
11924 CEFBS_None, // G_FREEZE = 83
11925 CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 84
11926 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 85
11927 CEFBS_None, // G_INTRINSIC_TRUNC = 86
11928 CEFBS_None, // G_INTRINSIC_ROUND = 87
11929 CEFBS_None, // G_INTRINSIC_LRINT = 88
11930 CEFBS_None, // G_INTRINSIC_LLRINT = 89
11931 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 90
11932 CEFBS_None, // G_READCYCLECOUNTER = 91
11933 CEFBS_None, // G_READSTEADYCOUNTER = 92
11934 CEFBS_None, // G_LOAD = 93
11935 CEFBS_None, // G_SEXTLOAD = 94
11936 CEFBS_None, // G_ZEXTLOAD = 95
11937 CEFBS_None, // G_INDEXED_LOAD = 96
11938 CEFBS_None, // G_INDEXED_SEXTLOAD = 97
11939 CEFBS_None, // G_INDEXED_ZEXTLOAD = 98
11940 CEFBS_None, // G_STORE = 99
11941 CEFBS_None, // G_INDEXED_STORE = 100
11942 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 101
11943 CEFBS_None, // G_ATOMIC_CMPXCHG = 102
11944 CEFBS_None, // G_ATOMICRMW_XCHG = 103
11945 CEFBS_None, // G_ATOMICRMW_ADD = 104
11946 CEFBS_None, // G_ATOMICRMW_SUB = 105
11947 CEFBS_None, // G_ATOMICRMW_AND = 106
11948 CEFBS_None, // G_ATOMICRMW_NAND = 107
11949 CEFBS_None, // G_ATOMICRMW_OR = 108
11950 CEFBS_None, // G_ATOMICRMW_XOR = 109
11951 CEFBS_None, // G_ATOMICRMW_MAX = 110
11952 CEFBS_None, // G_ATOMICRMW_MIN = 111
11953 CEFBS_None, // G_ATOMICRMW_UMAX = 112
11954 CEFBS_None, // G_ATOMICRMW_UMIN = 113
11955 CEFBS_None, // G_ATOMICRMW_FADD = 114
11956 CEFBS_None, // G_ATOMICRMW_FSUB = 115
11957 CEFBS_None, // G_ATOMICRMW_FMAX = 116
11958 CEFBS_None, // G_ATOMICRMW_FMIN = 117
11959 CEFBS_None, // G_ATOMICRMW_FMAXIMUM = 118
11960 CEFBS_None, // G_ATOMICRMW_FMINIMUM = 119
11961 CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 120
11962 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 121
11963 CEFBS_None, // G_ATOMICRMW_USUB_COND = 122
11964 CEFBS_None, // G_ATOMICRMW_USUB_SAT = 123
11965 CEFBS_None, // G_FENCE = 124
11966 CEFBS_None, // G_PREFETCH = 125
11967 CEFBS_None, // G_BRCOND = 126
11968 CEFBS_None, // G_BRINDIRECT = 127
11969 CEFBS_None, // G_INVOKE_REGION_START = 128
11970 CEFBS_None, // G_INTRINSIC = 129
11971 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 130
11972 CEFBS_None, // G_INTRINSIC_CONVERGENT = 131
11973 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 132
11974 CEFBS_None, // G_ANYEXT = 133
11975 CEFBS_None, // G_TRUNC = 134
11976 CEFBS_None, // G_CONSTANT = 135
11977 CEFBS_None, // G_FCONSTANT = 136
11978 CEFBS_None, // G_VASTART = 137
11979 CEFBS_None, // G_VAARG = 138
11980 CEFBS_None, // G_SEXT = 139
11981 CEFBS_None, // G_SEXT_INREG = 140
11982 CEFBS_None, // G_ZEXT = 141
11983 CEFBS_None, // G_SHL = 142
11984 CEFBS_None, // G_LSHR = 143
11985 CEFBS_None, // G_ASHR = 144
11986 CEFBS_None, // G_FSHL = 145
11987 CEFBS_None, // G_FSHR = 146
11988 CEFBS_None, // G_ROTR = 147
11989 CEFBS_None, // G_ROTL = 148
11990 CEFBS_None, // G_ICMP = 149
11991 CEFBS_None, // G_FCMP = 150
11992 CEFBS_None, // G_SCMP = 151
11993 CEFBS_None, // G_UCMP = 152
11994 CEFBS_None, // G_SELECT = 153
11995 CEFBS_None, // G_UADDO = 154
11996 CEFBS_None, // G_UADDE = 155
11997 CEFBS_None, // G_USUBO = 156
11998 CEFBS_None, // G_USUBE = 157
11999 CEFBS_None, // G_SADDO = 158
12000 CEFBS_None, // G_SADDE = 159
12001 CEFBS_None, // G_SSUBO = 160
12002 CEFBS_None, // G_SSUBE = 161
12003 CEFBS_None, // G_UMULO = 162
12004 CEFBS_None, // G_SMULO = 163
12005 CEFBS_None, // G_UMULH = 164
12006 CEFBS_None, // G_SMULH = 165
12007 CEFBS_None, // G_UADDSAT = 166
12008 CEFBS_None, // G_SADDSAT = 167
12009 CEFBS_None, // G_USUBSAT = 168
12010 CEFBS_None, // G_SSUBSAT = 169
12011 CEFBS_None, // G_USHLSAT = 170
12012 CEFBS_None, // G_SSHLSAT = 171
12013 CEFBS_None, // G_SMULFIX = 172
12014 CEFBS_None, // G_UMULFIX = 173
12015 CEFBS_None, // G_SMULFIXSAT = 174
12016 CEFBS_None, // G_UMULFIXSAT = 175
12017 CEFBS_None, // G_SDIVFIX = 176
12018 CEFBS_None, // G_UDIVFIX = 177
12019 CEFBS_None, // G_SDIVFIXSAT = 178
12020 CEFBS_None, // G_UDIVFIXSAT = 179
12021 CEFBS_None, // G_FADD = 180
12022 CEFBS_None, // G_FSUB = 181
12023 CEFBS_None, // G_FMUL = 182
12024 CEFBS_None, // G_FMA = 183
12025 CEFBS_None, // G_FMAD = 184
12026 CEFBS_None, // G_FDIV = 185
12027 CEFBS_None, // G_FREM = 186
12028 CEFBS_None, // G_FPOW = 187
12029 CEFBS_None, // G_FPOWI = 188
12030 CEFBS_None, // G_FEXP = 189
12031 CEFBS_None, // G_FEXP2 = 190
12032 CEFBS_None, // G_FEXP10 = 191
12033 CEFBS_None, // G_FLOG = 192
12034 CEFBS_None, // G_FLOG2 = 193
12035 CEFBS_None, // G_FLOG10 = 194
12036 CEFBS_None, // G_FLDEXP = 195
12037 CEFBS_None, // G_FFREXP = 196
12038 CEFBS_None, // G_FNEG = 197
12039 CEFBS_None, // G_FPEXT = 198
12040 CEFBS_None, // G_FPTRUNC = 199
12041 CEFBS_None, // G_FPTOSI = 200
12042 CEFBS_None, // G_FPTOUI = 201
12043 CEFBS_None, // G_SITOFP = 202
12044 CEFBS_None, // G_UITOFP = 203
12045 CEFBS_None, // G_FPTOSI_SAT = 204
12046 CEFBS_None, // G_FPTOUI_SAT = 205
12047 CEFBS_None, // G_FABS = 206
12048 CEFBS_None, // G_FCOPYSIGN = 207
12049 CEFBS_None, // G_IS_FPCLASS = 208
12050 CEFBS_None, // G_FCANONICALIZE = 209
12051 CEFBS_None, // G_FMINNUM = 210
12052 CEFBS_None, // G_FMAXNUM = 211
12053 CEFBS_None, // G_FMINNUM_IEEE = 212
12054 CEFBS_None, // G_FMAXNUM_IEEE = 213
12055 CEFBS_None, // G_FMINIMUM = 214
12056 CEFBS_None, // G_FMAXIMUM = 215
12057 CEFBS_None, // G_FMINIMUMNUM = 216
12058 CEFBS_None, // G_FMAXIMUMNUM = 217
12059 CEFBS_None, // G_GET_FPENV = 218
12060 CEFBS_None, // G_SET_FPENV = 219
12061 CEFBS_None, // G_RESET_FPENV = 220
12062 CEFBS_None, // G_GET_FPMODE = 221
12063 CEFBS_None, // G_SET_FPMODE = 222
12064 CEFBS_None, // G_RESET_FPMODE = 223
12065 CEFBS_None, // G_PTR_ADD = 224
12066 CEFBS_None, // G_PTRMASK = 225
12067 CEFBS_None, // G_SMIN = 226
12068 CEFBS_None, // G_SMAX = 227
12069 CEFBS_None, // G_UMIN = 228
12070 CEFBS_None, // G_UMAX = 229
12071 CEFBS_None, // G_ABS = 230
12072 CEFBS_None, // G_LROUND = 231
12073 CEFBS_None, // G_LLROUND = 232
12074 CEFBS_None, // G_BR = 233
12075 CEFBS_None, // G_BRJT = 234
12076 CEFBS_None, // G_VSCALE = 235
12077 CEFBS_None, // G_INSERT_SUBVECTOR = 236
12078 CEFBS_None, // G_EXTRACT_SUBVECTOR = 237
12079 CEFBS_None, // G_INSERT_VECTOR_ELT = 238
12080 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 239
12081 CEFBS_None, // G_SHUFFLE_VECTOR = 240
12082 CEFBS_None, // G_SPLAT_VECTOR = 241
12083 CEFBS_None, // G_STEP_VECTOR = 242
12084 CEFBS_None, // G_VECTOR_COMPRESS = 243
12085 CEFBS_None, // G_CTTZ = 244
12086 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 245
12087 CEFBS_None, // G_CTLZ = 246
12088 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 247
12089 CEFBS_None, // G_CTPOP = 248
12090 CEFBS_None, // G_BSWAP = 249
12091 CEFBS_None, // G_BITREVERSE = 250
12092 CEFBS_None, // G_FCEIL = 251
12093 CEFBS_None, // G_FCOS = 252
12094 CEFBS_None, // G_FSIN = 253
12095 CEFBS_None, // G_FSINCOS = 254
12096 CEFBS_None, // G_FTAN = 255
12097 CEFBS_None, // G_FACOS = 256
12098 CEFBS_None, // G_FASIN = 257
12099 CEFBS_None, // G_FATAN = 258
12100 CEFBS_None, // G_FATAN2 = 259
12101 CEFBS_None, // G_FCOSH = 260
12102 CEFBS_None, // G_FSINH = 261
12103 CEFBS_None, // G_FTANH = 262
12104 CEFBS_None, // G_FSQRT = 263
12105 CEFBS_None, // G_FFLOOR = 264
12106 CEFBS_None, // G_FRINT = 265
12107 CEFBS_None, // G_FNEARBYINT = 266
12108 CEFBS_None, // G_ADDRSPACE_CAST = 267
12109 CEFBS_None, // G_BLOCK_ADDR = 268
12110 CEFBS_None, // G_JUMP_TABLE = 269
12111 CEFBS_None, // G_DYN_STACKALLOC = 270
12112 CEFBS_None, // G_STACKSAVE = 271
12113 CEFBS_None, // G_STACKRESTORE = 272
12114 CEFBS_None, // G_STRICT_FADD = 273
12115 CEFBS_None, // G_STRICT_FSUB = 274
12116 CEFBS_None, // G_STRICT_FMUL = 275
12117 CEFBS_None, // G_STRICT_FDIV = 276
12118 CEFBS_None, // G_STRICT_FREM = 277
12119 CEFBS_None, // G_STRICT_FMA = 278
12120 CEFBS_None, // G_STRICT_FSQRT = 279
12121 CEFBS_None, // G_STRICT_FLDEXP = 280
12122 CEFBS_None, // G_READ_REGISTER = 281
12123 CEFBS_None, // G_WRITE_REGISTER = 282
12124 CEFBS_None, // G_MEMCPY = 283
12125 CEFBS_None, // G_MEMCPY_INLINE = 284
12126 CEFBS_None, // G_MEMMOVE = 285
12127 CEFBS_None, // G_MEMSET = 286
12128 CEFBS_None, // G_BZERO = 287
12129 CEFBS_None, // G_TRAP = 288
12130 CEFBS_None, // G_DEBUGTRAP = 289
12131 CEFBS_None, // G_UBSANTRAP = 290
12132 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 291
12133 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 292
12134 CEFBS_None, // G_VECREDUCE_FADD = 293
12135 CEFBS_None, // G_VECREDUCE_FMUL = 294
12136 CEFBS_None, // G_VECREDUCE_FMAX = 295
12137 CEFBS_None, // G_VECREDUCE_FMIN = 296
12138 CEFBS_None, // G_VECREDUCE_FMAXIMUM = 297
12139 CEFBS_None, // G_VECREDUCE_FMINIMUM = 298
12140 CEFBS_None, // G_VECREDUCE_ADD = 299
12141 CEFBS_None, // G_VECREDUCE_MUL = 300
12142 CEFBS_None, // G_VECREDUCE_AND = 301
12143 CEFBS_None, // G_VECREDUCE_OR = 302
12144 CEFBS_None, // G_VECREDUCE_XOR = 303
12145 CEFBS_None, // G_VECREDUCE_SMAX = 304
12146 CEFBS_None, // G_VECREDUCE_SMIN = 305
12147 CEFBS_None, // G_VECREDUCE_UMAX = 306
12148 CEFBS_None, // G_VECREDUCE_UMIN = 307
12149 CEFBS_None, // G_SBFX = 308
12150 CEFBS_None, // G_UBFX = 309
12151 CEFBS_None, // ADA_ENTRY = 310
12152 CEFBS_None, // ADA_ENTRY_VALUE = 311
12153 CEFBS_None, // ADB_MemFoldPseudo = 312
12154 CEFBS_None, // ADJCALLSTACKDOWN = 313
12155 CEFBS_None, // ADJCALLSTACKUP = 314
12156 CEFBS_None, // ADJDYNALLOC = 315
12157 CEFBS_None, // AEB_MemFoldPseudo = 316
12158 CEFBS_None, // AEXT128 = 317
12159 CEFBS_FeatureHighWord, // AFIMux = 318
12160 CEFBS_None, // AG_MemFoldPseudo = 319
12161 CEFBS_FeatureHighWord, // AHIMux = 320
12162 CEFBS_FeatureHighWord_FeatureDistinctOps, // AHIMuxK = 321
12163 CEFBS_None, // ALG_MemFoldPseudo = 322
12164 CEFBS_None, // AL_MemFoldPseudo = 323
12165 CEFBS_None, // ATOMIC_CMP_SWAPW = 324
12166 CEFBS_None, // ATOMIC_LOADW_AFI = 325
12167 CEFBS_None, // ATOMIC_LOADW_AR = 326
12168 CEFBS_None, // ATOMIC_LOADW_MAX = 327
12169 CEFBS_None, // ATOMIC_LOADW_MIN = 328
12170 CEFBS_None, // ATOMIC_LOADW_NILH = 329
12171 CEFBS_None, // ATOMIC_LOADW_NILHi = 330
12172 CEFBS_None, // ATOMIC_LOADW_NR = 331
12173 CEFBS_None, // ATOMIC_LOADW_NRi = 332
12174 CEFBS_None, // ATOMIC_LOADW_OILH = 333
12175 CEFBS_None, // ATOMIC_LOADW_OR = 334
12176 CEFBS_None, // ATOMIC_LOADW_SR = 335
12177 CEFBS_None, // ATOMIC_LOADW_UMAX = 336
12178 CEFBS_None, // ATOMIC_LOADW_UMIN = 337
12179 CEFBS_None, // ATOMIC_LOADW_XILF = 338
12180 CEFBS_None, // ATOMIC_LOADW_XR = 339
12181 CEFBS_None, // ATOMIC_SWAPW = 340
12182 CEFBS_None, // A_MemFoldPseudo = 341
12183 CEFBS_FeatureHighWord, // CFIMux = 342
12184 CEFBS_None, // CGIBCall = 343
12185 CEFBS_None, // CGIBReturn = 344
12186 CEFBS_None, // CGRBCall = 345
12187 CEFBS_None, // CGRBReturn = 346
12188 CEFBS_FeatureHighWord, // CHIMux = 347
12189 CEFBS_None, // CIBCall = 348
12190 CEFBS_None, // CIBReturn = 349
12191 CEFBS_None, // CLCImm = 350
12192 CEFBS_None, // CLCReg = 351
12193 CEFBS_FeatureHighWord, // CLFIMux = 352
12194 CEFBS_None, // CLGIBCall = 353
12195 CEFBS_None, // CLGIBReturn = 354
12196 CEFBS_None, // CLGRBCall = 355
12197 CEFBS_None, // CLGRBReturn = 356
12198 CEFBS_None, // CLIBCall = 357
12199 CEFBS_None, // CLIBReturn = 358
12200 CEFBS_FeatureHighWord, // CLMux = 359
12201 CEFBS_None, // CLRBCall = 360
12202 CEFBS_None, // CLRBReturn = 361
12203 CEFBS_None, // CLSTLoop = 362
12204 CEFBS_FeatureHighWord, // CMux = 363
12205 CEFBS_None, // CRBCall = 364
12206 CEFBS_None, // CRBReturn = 365
12207 CEFBS_None, // CallBASR = 366
12208 CEFBS_None, // CallBASR_STACKEXT = 367
12209 CEFBS_None, // CallBASR_XPLINK64 = 368
12210 CEFBS_None, // CallBCR = 369
12211 CEFBS_None, // CallBR = 370
12212 CEFBS_None, // CallBRASL = 371
12213 CEFBS_None, // CallBRASL_XPLINK64 = 372
12214 CEFBS_None, // CallBRCL = 373
12215 CEFBS_None, // CallJG = 374
12216 CEFBS_None, // CondReturn = 375
12217 CEFBS_None, // CondReturn_XPLINK = 376
12218 CEFBS_None, // CondStore16 = 377
12219 CEFBS_None, // CondStore16Inv = 378
12220 CEFBS_FeatureHighWord, // CondStore16Mux = 379
12221 CEFBS_FeatureHighWord, // CondStore16MuxInv = 380
12222 CEFBS_None, // CondStore32 = 381
12223 CEFBS_None, // CondStore32Inv = 382
12224 CEFBS_FeatureLoadStoreOnCond2, // CondStore32Mux = 383
12225 CEFBS_FeatureLoadStoreOnCond2, // CondStore32MuxInv = 384
12226 CEFBS_None, // CondStore64 = 385
12227 CEFBS_None, // CondStore64Inv = 386
12228 CEFBS_None, // CondStore8 = 387
12229 CEFBS_None, // CondStore8Inv = 388
12230 CEFBS_FeatureHighWord, // CondStore8Mux = 389
12231 CEFBS_FeatureHighWord, // CondStore8MuxInv = 390
12232 CEFBS_None, // CondStoreF32 = 391
12233 CEFBS_None, // CondStoreF32Inv = 392
12234 CEFBS_None, // CondStoreF64 = 393
12235 CEFBS_None, // CondStoreF64Inv = 394
12236 CEFBS_None, // CondTrap = 395
12237 CEFBS_None, // DDB_MemFoldPseudo = 396
12238 CEFBS_None, // DEB_MemFoldPseudo = 397
12239 CEFBS_None, // EH_SjLj_LongJmp = 398
12240 CEFBS_None, // EH_SjLj_SetJmp = 399
12241 CEFBS_None, // EH_SjLj_Setup = 400
12242 CEFBS_None, // EXRL_Pseudo = 401
12243 CEFBS_None, // GOT = 402
12244 CEFBS_FeatureHighWord, // IIFMux = 403
12245 CEFBS_None, // IIHF64 = 404
12246 CEFBS_None, // IIHH64 = 405
12247 CEFBS_None, // IIHL64 = 406
12248 CEFBS_FeatureHighWord, // IIHMux = 407
12249 CEFBS_None, // IILF64 = 408
12250 CEFBS_None, // IILH64 = 409
12251 CEFBS_None, // IILL64 = 410
12252 CEFBS_FeatureHighWord, // IILMux = 411
12253 CEFBS_None, // L128 = 412
12254 CEFBS_FeatureHighWord, // LBMux = 413
12255 CEFBS_FeatureVector, // LEFR = 414
12256 CEFBS_FeatureVector, // LEFR_16 = 415
12257 CEFBS_FeatureVector, // LFER = 416
12258 CEFBS_FeatureVector, // LFER_16 = 417
12259 CEFBS_FeatureHighWord, // LHIMux = 418
12260 CEFBS_FeatureHighWord, // LHMux = 419
12261 CEFBS_FeatureHighWord, // LLCMux = 420
12262 CEFBS_FeatureHighWord, // LLCRMux = 421
12263 CEFBS_FeatureHighWord, // LLHMux = 422
12264 CEFBS_FeatureHighWord, // LLHRMux = 423
12265 CEFBS_FeatureHighWord, // LMux = 424
12266 CEFBS_FeatureLoadStoreOnCond, // LOCG_MemFoldPseudo = 425
12267 CEFBS_FeatureLoadStoreOnCond2, // LOCHIMux = 426
12268 CEFBS_FeatureLoadStoreOnCond2, // LOCMux = 427
12269 CEFBS_FeatureLoadStoreOnCond2, // LOCMux_MemFoldPseudo = 428
12270 CEFBS_FeatureLoadStoreOnCond2, // LOCRMux = 429
12271 CEFBS_None, // LTDBRCompare_Pseudo = 430
12272 CEFBS_None, // LTEBRCompare_Pseudo = 431
12273 CEFBS_None, // LTXBRCompare_Pseudo = 432
12274 CEFBS_None, // LX = 433
12275 CEFBS_None, // MADB_MemFoldPseudo = 434
12276 CEFBS_None, // MAEB_MemFoldPseudo = 435
12277 CEFBS_None, // MDB_MemFoldPseudo = 436
12278 CEFBS_None, // MEEB_MemFoldPseudo = 437
12279 CEFBS_FeatureMiscellaneousExtensions2, // MSC_MemFoldPseudo = 438
12280 CEFBS_None, // MSDB_MemFoldPseudo = 439
12281 CEFBS_None, // MSEB_MemFoldPseudo = 440
12282 CEFBS_FeatureMiscellaneousExtensions2, // MSGC_MemFoldPseudo = 441
12283 CEFBS_None, // MVCImm = 442
12284 CEFBS_None, // MVCReg = 443
12285 CEFBS_None, // MVSTLoop = 444
12286 CEFBS_None, // MemsetImmImm = 445
12287 CEFBS_None, // MemsetImmReg = 446
12288 CEFBS_None, // MemsetRegImm = 447
12289 CEFBS_None, // MemsetRegReg = 448
12290 CEFBS_None, // NCImm = 449
12291 CEFBS_None, // NCReg = 450
12292 CEFBS_None, // NG_MemFoldPseudo = 451
12293 CEFBS_FeatureHighWord, // NIFMux = 452
12294 CEFBS_None, // NIHF64 = 453
12295 CEFBS_None, // NIHH64 = 454
12296 CEFBS_None, // NIHL64 = 455
12297 CEFBS_FeatureHighWord, // NIHMux = 456
12298 CEFBS_None, // NILF64 = 457
12299 CEFBS_None, // NILH64 = 458
12300 CEFBS_None, // NILL64 = 459
12301 CEFBS_FeatureHighWord, // NILMux = 460
12302 CEFBS_None, // N_MemFoldPseudo = 461
12303 CEFBS_None, // OCImm = 462
12304 CEFBS_None, // OCReg = 463
12305 CEFBS_None, // OG_MemFoldPseudo = 464
12306 CEFBS_FeatureHighWord, // OIFMux = 465
12307 CEFBS_None, // OIHF64 = 466
12308 CEFBS_None, // OIHH64 = 467
12309 CEFBS_None, // OIHL64 = 468
12310 CEFBS_FeatureHighWord, // OIHMux = 469
12311 CEFBS_None, // OILF64 = 470
12312 CEFBS_None, // OILH64 = 471
12313 CEFBS_None, // OILL64 = 472
12314 CEFBS_FeatureHighWord, // OILMux = 473
12315 CEFBS_None, // O_MemFoldPseudo = 474
12316 CEFBS_None, // PAIR128 = 475
12317 CEFBS_None, // PROBED_ALLOCA = 476
12318 CEFBS_None, // PROBED_STACKALLOC = 477
12319 CEFBS_FeatureHighWord, // RISBHH = 478
12320 CEFBS_FeatureHighWord, // RISBHHOpt = 479
12321 CEFBS_FeatureHighWord, // RISBHL = 480
12322 CEFBS_FeatureHighWord, // RISBHLOpt = 481
12323 CEFBS_FeatureHighWord, // RISBLH = 482
12324 CEFBS_FeatureHighWord, // RISBLHOpt = 483
12325 CEFBS_FeatureHighWord, // RISBLL = 484
12326 CEFBS_FeatureHighWord, // RISBLLOpt = 485
12327 CEFBS_FeatureHighWord, // RISBMux = 486
12328 CEFBS_None, // Return = 487
12329 CEFBS_None, // Return_XPLINK = 488
12330 CEFBS_FeatureVector, // SCmp128Hi = 489
12331 CEFBS_None, // SDB_MemFoldPseudo = 490
12332 CEFBS_None, // SEB_MemFoldPseudo = 491
12333 CEFBS_FeatureMiscellaneousExtensions3, // SELRMux = 492
12334 CEFBS_None, // SG_MemFoldPseudo = 493
12335 CEFBS_None, // SLG_MemFoldPseudo = 494
12336 CEFBS_None, // SL_MemFoldPseudo = 495
12337 CEFBS_None, // SRSTLoop = 496
12338 CEFBS_None, // ST128 = 497
12339 CEFBS_FeatureHighWord, // STCMux = 498
12340 CEFBS_FeatureHighWord, // STHMux = 499
12341 CEFBS_FeatureHighWord, // STMux = 500
12342 CEFBS_FeatureLoadStoreOnCond2, // STOCMux = 501
12343 CEFBS_None, // STX = 502
12344 CEFBS_None, // S_MemFoldPseudo = 503
12345 CEFBS_FeatureVector, // Select128 = 504
12346 CEFBS_None, // Select32 = 505
12347 CEFBS_None, // Select64 = 506
12348 CEFBS_None, // SelectF128 = 507
12349 CEFBS_None, // SelectF32 = 508
12350 CEFBS_None, // SelectF64 = 509
12351 CEFBS_FeatureVectorEnhancements1, // SelectVR128 = 510
12352 CEFBS_FeatureVector, // SelectVR32 = 511
12353 CEFBS_FeatureVector, // SelectVR64 = 512
12354 CEFBS_None, // Serialize = 513
12355 CEFBS_FeatureTransactionalExecution, // TBEGIN_nofloat = 514
12356 CEFBS_None, // TLS_GDCALL = 515
12357 CEFBS_None, // TLS_LDCALL = 516
12358 CEFBS_None, // TMHH64 = 517
12359 CEFBS_None, // TMHL64 = 518
12360 CEFBS_FeatureHighWord, // TMHMux = 519
12361 CEFBS_None, // TMLH64 = 520
12362 CEFBS_None, // TMLL64 = 521
12363 CEFBS_FeatureHighWord, // TMLMux = 522
12364 CEFBS_None, // Trap = 523
12365 CEFBS_FeatureVector, // UCmp128Hi = 524
12366 CEFBS_FeatureVector, // VL16 = 525
12367 CEFBS_FeatureVector, // VL32 = 526
12368 CEFBS_FeatureVector, // VL64 = 527
12369 CEFBS_FeatureVector, // VLR32 = 528
12370 CEFBS_FeatureVector, // VLR64 = 529
12371 CEFBS_FeatureVector, // VLVGP32 = 530
12372 CEFBS_FeatureVector, // VST16 = 531
12373 CEFBS_FeatureVector, // VST32 = 532
12374 CEFBS_FeatureVector, // VST64 = 533
12375 CEFBS_None, // XCImm = 534
12376 CEFBS_None, // XCReg = 535
12377 CEFBS_None, // XG_MemFoldPseudo = 536
12378 CEFBS_FeatureHighWord, // XIFMux = 537
12379 CEFBS_None, // XIHF64 = 538
12380 CEFBS_None, // XILF64 = 539
12381 CEFBS_None, // XPLINK_STACKALLOC = 540
12382 CEFBS_None, // X_MemFoldPseudo = 541
12383 CEFBS_None, // ZEXT128 = 542
12384 CEFBS_None, // A = 543
12385 CEFBS_None, // AD = 544
12386 CEFBS_None, // ADB = 545
12387 CEFBS_None, // ADBR = 546
12388 CEFBS_None, // ADR = 547
12389 CEFBS_None, // ADTR = 548
12390 CEFBS_FeatureFPExtension, // ADTRA = 549
12391 CEFBS_None, // AE = 550
12392 CEFBS_None, // AEB = 551
12393 CEFBS_None, // AEBR = 552
12394 CEFBS_None, // AER = 553
12395 CEFBS_None, // AFI = 554
12396 CEFBS_None, // AG = 555
12397 CEFBS_None, // AGF = 556
12398 CEFBS_None, // AGFI = 557
12399 CEFBS_None, // AGFR = 558
12400 CEFBS_FeatureMiscellaneousExtensions2, // AGH = 559
12401 CEFBS_None, // AGHI = 560
12402 CEFBS_FeatureDistinctOps, // AGHIK = 561
12403 CEFBS_None, // AGR = 562
12404 CEFBS_FeatureDistinctOps, // AGRK = 563
12405 CEFBS_None, // AGSI = 564
12406 CEFBS_None, // AH = 565
12407 CEFBS_FeatureHighWord, // AHHHR = 566
12408 CEFBS_FeatureHighWord, // AHHLR = 567
12409 CEFBS_None, // AHI = 568
12410 CEFBS_FeatureDistinctOps, // AHIK = 569
12411 CEFBS_None, // AHY = 570
12412 CEFBS_FeatureHighWord, // AIH = 571
12413 CEFBS_None, // AL = 572
12414 CEFBS_None, // ALC = 573
12415 CEFBS_None, // ALCG = 574
12416 CEFBS_None, // ALCGR = 575
12417 CEFBS_None, // ALCR = 576
12418 CEFBS_None, // ALFI = 577
12419 CEFBS_None, // ALG = 578
12420 CEFBS_None, // ALGF = 579
12421 CEFBS_None, // ALGFI = 580
12422 CEFBS_None, // ALGFR = 581
12423 CEFBS_FeatureDistinctOps, // ALGHSIK = 582
12424 CEFBS_None, // ALGR = 583
12425 CEFBS_FeatureDistinctOps, // ALGRK = 584
12426 CEFBS_None, // ALGSI = 585
12427 CEFBS_FeatureHighWord, // ALHHHR = 586
12428 CEFBS_FeatureHighWord, // ALHHLR = 587
12429 CEFBS_FeatureDistinctOps, // ALHSIK = 588
12430 CEFBS_None, // ALR = 589
12431 CEFBS_FeatureDistinctOps, // ALRK = 590
12432 CEFBS_None, // ALSI = 591
12433 CEFBS_FeatureHighWord, // ALSIH = 592
12434 CEFBS_FeatureHighWord, // ALSIHN = 593
12435 CEFBS_None, // ALY = 594
12436 CEFBS_None, // AP = 595
12437 CEFBS_None, // AR = 596
12438 CEFBS_FeatureDistinctOps, // ARK = 597
12439 CEFBS_None, // ASI = 598
12440 CEFBS_None, // AU = 599
12441 CEFBS_None, // AUR = 600
12442 CEFBS_None, // AW = 601
12443 CEFBS_None, // AWR = 602
12444 CEFBS_None, // AXBR = 603
12445 CEFBS_None, // AXR = 604
12446 CEFBS_None, // AXTR = 605
12447 CEFBS_FeatureFPExtension, // AXTRA = 606
12448 CEFBS_None, // AY = 607
12449 CEFBS_None, // B = 608
12450 CEFBS_None, // BAKR = 609
12451 CEFBS_None, // BAL = 610
12452 CEFBS_None, // BALR = 611
12453 CEFBS_None, // BAS = 612
12454 CEFBS_None, // BASR = 613
12455 CEFBS_None, // BASSM = 614
12456 CEFBS_None, // BAsmE = 615
12457 CEFBS_None, // BAsmH = 616
12458 CEFBS_None, // BAsmHE = 617
12459 CEFBS_None, // BAsmL = 618
12460 CEFBS_None, // BAsmLE = 619
12461 CEFBS_None, // BAsmLH = 620
12462 CEFBS_None, // BAsmM = 621
12463 CEFBS_None, // BAsmNE = 622
12464 CEFBS_None, // BAsmNH = 623
12465 CEFBS_None, // BAsmNHE = 624
12466 CEFBS_None, // BAsmNL = 625
12467 CEFBS_None, // BAsmNLE = 626
12468 CEFBS_None, // BAsmNLH = 627
12469 CEFBS_None, // BAsmNM = 628
12470 CEFBS_None, // BAsmNO = 629
12471 CEFBS_None, // BAsmNP = 630
12472 CEFBS_None, // BAsmNZ = 631
12473 CEFBS_None, // BAsmO = 632
12474 CEFBS_None, // BAsmP = 633
12475 CEFBS_None, // BAsmZ = 634
12476 CEFBS_None, // BC = 635
12477 CEFBS_None, // BCAsm = 636
12478 CEFBS_None, // BCR = 637
12479 CEFBS_None, // BCRAsm = 638
12480 CEFBS_None, // BCT = 639
12481 CEFBS_None, // BCTG = 640
12482 CEFBS_None, // BCTGR = 641
12483 CEFBS_None, // BCTR = 642
12484 CEFBS_FeatureMiscellaneousExtensions4, // BDEPG = 643
12485 CEFBS_FeatureMiscellaneousExtensions4, // BEXTG = 644
12486 CEFBS_FeatureMiscellaneousExtensions2, // BI = 645
12487 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmE = 646
12488 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmH = 647
12489 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmHE = 648
12490 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmL = 649
12491 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLE = 650
12492 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLH = 651
12493 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmM = 652
12494 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNE = 653
12495 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNH = 654
12496 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNHE = 655
12497 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNL = 656
12498 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLE = 657
12499 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLH = 658
12500 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNM = 659
12501 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNO = 660
12502 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNP = 661
12503 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNZ = 662
12504 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmO = 663
12505 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmP = 664
12506 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmZ = 665
12507 CEFBS_FeatureMiscellaneousExtensions2, // BIC = 666
12508 CEFBS_FeatureMiscellaneousExtensions2, // BICAsm = 667
12509 CEFBS_FeatureExecutionHint, // BPP = 668
12510 CEFBS_FeatureExecutionHint, // BPRP = 669
12511 CEFBS_None, // BR = 670
12512 CEFBS_None, // BRAS = 671
12513 CEFBS_None, // BRASL = 672
12514 CEFBS_None, // BRAsmE = 673
12515 CEFBS_None, // BRAsmH = 674
12516 CEFBS_None, // BRAsmHE = 675
12517 CEFBS_None, // BRAsmL = 676
12518 CEFBS_None, // BRAsmLE = 677
12519 CEFBS_None, // BRAsmLH = 678
12520 CEFBS_None, // BRAsmM = 679
12521 CEFBS_None, // BRAsmNE = 680
12522 CEFBS_None, // BRAsmNH = 681
12523 CEFBS_None, // BRAsmNHE = 682
12524 CEFBS_None, // BRAsmNL = 683
12525 CEFBS_None, // BRAsmNLE = 684
12526 CEFBS_None, // BRAsmNLH = 685
12527 CEFBS_None, // BRAsmNM = 686
12528 CEFBS_None, // BRAsmNO = 687
12529 CEFBS_None, // BRAsmNP = 688
12530 CEFBS_None, // BRAsmNZ = 689
12531 CEFBS_None, // BRAsmO = 690
12532 CEFBS_None, // BRAsmP = 691
12533 CEFBS_None, // BRAsmZ = 692
12534 CEFBS_None, // BRC = 693
12535 CEFBS_None, // BRCAsm = 694
12536 CEFBS_None, // BRCL = 695
12537 CEFBS_None, // BRCLAsm = 696
12538 CEFBS_None, // BRCT = 697
12539 CEFBS_None, // BRCTG = 698
12540 CEFBS_FeatureHighWord, // BRCTH = 699
12541 CEFBS_None, // BRXH = 700
12542 CEFBS_None, // BRXHG = 701
12543 CEFBS_None, // BRXLE = 702
12544 CEFBS_None, // BRXLG = 703
12545 CEFBS_None, // BSA = 704
12546 CEFBS_None, // BSG = 705
12547 CEFBS_None, // BSM = 706
12548 CEFBS_None, // BXH = 707
12549 CEFBS_None, // BXHG = 708
12550 CEFBS_None, // BXLE = 709
12551 CEFBS_None, // BXLEG = 710
12552 CEFBS_None, // C = 711
12553 CEFBS_FeatureConcurrentFunctions, // CAL = 712
12554 CEFBS_FeatureConcurrentFunctions, // CALG = 713
12555 CEFBS_FeatureConcurrentFunctions, // CALGF = 714
12556 CEFBS_None, // CD = 715
12557 CEFBS_None, // CDB = 716
12558 CEFBS_None, // CDBR = 717
12559 CEFBS_None, // CDFBR = 718
12560 CEFBS_FeatureFPExtension, // CDFBRA = 719
12561 CEFBS_None, // CDFR = 720
12562 CEFBS_FeatureFPExtension, // CDFTR = 721
12563 CEFBS_None, // CDGBR = 722
12564 CEFBS_FeatureFPExtension, // CDGBRA = 723
12565 CEFBS_None, // CDGR = 724
12566 CEFBS_None, // CDGTR = 725
12567 CEFBS_FeatureFPExtension, // CDGTRA = 726
12568 CEFBS_FeatureFPExtension, // CDLFBR = 727
12569 CEFBS_FeatureFPExtension, // CDLFTR = 728
12570 CEFBS_FeatureFPExtension, // CDLGBR = 729
12571 CEFBS_FeatureFPExtension, // CDLGTR = 730
12572 CEFBS_FeatureDFPPackedConversion, // CDPT = 731
12573 CEFBS_None, // CDR = 732
12574 CEFBS_None, // CDS = 733
12575 CEFBS_None, // CDSG = 734
12576 CEFBS_None, // CDSTR = 735
12577 CEFBS_None, // CDSY = 736
12578 CEFBS_None, // CDTR = 737
12579 CEFBS_None, // CDUTR = 738
12580 CEFBS_FeatureDFPZonedConversion, // CDZT = 739
12581 CEFBS_None, // CE = 740
12582 CEFBS_None, // CEB = 741
12583 CEFBS_None, // CEBR = 742
12584 CEFBS_None, // CEDTR = 743
12585 CEFBS_None, // CEFBR = 744
12586 CEFBS_FeatureFPExtension, // CEFBRA = 745
12587 CEFBS_None, // CEFR = 746
12588 CEFBS_None, // CEGBR = 747
12589 CEFBS_FeatureFPExtension, // CEGBRA = 748
12590 CEFBS_None, // CEGR = 749
12591 CEFBS_FeatureFPExtension, // CELFBR = 750
12592 CEFBS_FeatureFPExtension, // CELGBR = 751
12593 CEFBS_None, // CER = 752
12594 CEFBS_None, // CEXTR = 753
12595 CEFBS_None, // CFC = 754
12596 CEFBS_None, // CFDBR = 755
12597 CEFBS_FeatureFPExtension, // CFDBRA = 756
12598 CEFBS_None, // CFDR = 757
12599 CEFBS_FeatureFPExtension, // CFDTR = 758
12600 CEFBS_None, // CFEBR = 759
12601 CEFBS_FeatureFPExtension, // CFEBRA = 760
12602 CEFBS_None, // CFER = 761
12603 CEFBS_None, // CFI = 762
12604 CEFBS_None, // CFXBR = 763
12605 CEFBS_FeatureFPExtension, // CFXBRA = 764
12606 CEFBS_None, // CFXR = 765
12607 CEFBS_FeatureFPExtension, // CFXTR = 766
12608 CEFBS_None, // CG = 767
12609 CEFBS_None, // CGDBR = 768
12610 CEFBS_FeatureFPExtension, // CGDBRA = 769
12611 CEFBS_None, // CGDR = 770
12612 CEFBS_None, // CGDTR = 771
12613 CEFBS_FeatureFPExtension, // CGDTRA = 772
12614 CEFBS_None, // CGEBR = 773
12615 CEFBS_FeatureFPExtension, // CGEBRA = 774
12616 CEFBS_None, // CGER = 775
12617 CEFBS_None, // CGF = 776
12618 CEFBS_None, // CGFI = 777
12619 CEFBS_None, // CGFR = 778
12620 CEFBS_None, // CGFRL = 779
12621 CEFBS_None, // CGH = 780
12622 CEFBS_None, // CGHI = 781
12623 CEFBS_None, // CGHRL = 782
12624 CEFBS_None, // CGHSI = 783
12625 CEFBS_None, // CGIB = 784
12626 CEFBS_None, // CGIBAsm = 785
12627 CEFBS_None, // CGIBAsmE = 786
12628 CEFBS_None, // CGIBAsmH = 787
12629 CEFBS_None, // CGIBAsmHE = 788
12630 CEFBS_None, // CGIBAsmL = 789
12631 CEFBS_None, // CGIBAsmLE = 790
12632 CEFBS_None, // CGIBAsmLH = 791
12633 CEFBS_None, // CGIBAsmNE = 792
12634 CEFBS_None, // CGIBAsmNH = 793
12635 CEFBS_None, // CGIBAsmNHE = 794
12636 CEFBS_None, // CGIBAsmNL = 795
12637 CEFBS_None, // CGIBAsmNLE = 796
12638 CEFBS_None, // CGIBAsmNLH = 797
12639 CEFBS_None, // CGIJ = 798
12640 CEFBS_None, // CGIJAsm = 799
12641 CEFBS_None, // CGIJAsmE = 800
12642 CEFBS_None, // CGIJAsmH = 801
12643 CEFBS_None, // CGIJAsmHE = 802
12644 CEFBS_None, // CGIJAsmL = 803
12645 CEFBS_None, // CGIJAsmLE = 804
12646 CEFBS_None, // CGIJAsmLH = 805
12647 CEFBS_None, // CGIJAsmNE = 806
12648 CEFBS_None, // CGIJAsmNH = 807
12649 CEFBS_None, // CGIJAsmNHE = 808
12650 CEFBS_None, // CGIJAsmNL = 809
12651 CEFBS_None, // CGIJAsmNLE = 810
12652 CEFBS_None, // CGIJAsmNLH = 811
12653 CEFBS_None, // CGIT = 812
12654 CEFBS_None, // CGITAsm = 813
12655 CEFBS_None, // CGITAsmE = 814
12656 CEFBS_None, // CGITAsmH = 815
12657 CEFBS_None, // CGITAsmHE = 816
12658 CEFBS_None, // CGITAsmL = 817
12659 CEFBS_None, // CGITAsmLE = 818
12660 CEFBS_None, // CGITAsmLH = 819
12661 CEFBS_None, // CGITAsmNE = 820
12662 CEFBS_None, // CGITAsmNH = 821
12663 CEFBS_None, // CGITAsmNHE = 822
12664 CEFBS_None, // CGITAsmNL = 823
12665 CEFBS_None, // CGITAsmNLE = 824
12666 CEFBS_None, // CGITAsmNLH = 825
12667 CEFBS_None, // CGR = 826
12668 CEFBS_None, // CGRB = 827
12669 CEFBS_None, // CGRBAsm = 828
12670 CEFBS_None, // CGRBAsmE = 829
12671 CEFBS_None, // CGRBAsmH = 830
12672 CEFBS_None, // CGRBAsmHE = 831
12673 CEFBS_None, // CGRBAsmL = 832
12674 CEFBS_None, // CGRBAsmLE = 833
12675 CEFBS_None, // CGRBAsmLH = 834
12676 CEFBS_None, // CGRBAsmNE = 835
12677 CEFBS_None, // CGRBAsmNH = 836
12678 CEFBS_None, // CGRBAsmNHE = 837
12679 CEFBS_None, // CGRBAsmNL = 838
12680 CEFBS_None, // CGRBAsmNLE = 839
12681 CEFBS_None, // CGRBAsmNLH = 840
12682 CEFBS_None, // CGRJ = 841
12683 CEFBS_None, // CGRJAsm = 842
12684 CEFBS_None, // CGRJAsmE = 843
12685 CEFBS_None, // CGRJAsmH = 844
12686 CEFBS_None, // CGRJAsmHE = 845
12687 CEFBS_None, // CGRJAsmL = 846
12688 CEFBS_None, // CGRJAsmLE = 847
12689 CEFBS_None, // CGRJAsmLH = 848
12690 CEFBS_None, // CGRJAsmNE = 849
12691 CEFBS_None, // CGRJAsmNH = 850
12692 CEFBS_None, // CGRJAsmNHE = 851
12693 CEFBS_None, // CGRJAsmNL = 852
12694 CEFBS_None, // CGRJAsmNLE = 853
12695 CEFBS_None, // CGRJAsmNLH = 854
12696 CEFBS_None, // CGRL = 855
12697 CEFBS_None, // CGRT = 856
12698 CEFBS_None, // CGRTAsm = 857
12699 CEFBS_None, // CGRTAsmE = 858
12700 CEFBS_None, // CGRTAsmH = 859
12701 CEFBS_None, // CGRTAsmHE = 860
12702 CEFBS_None, // CGRTAsmL = 861
12703 CEFBS_None, // CGRTAsmLE = 862
12704 CEFBS_None, // CGRTAsmLH = 863
12705 CEFBS_None, // CGRTAsmNE = 864
12706 CEFBS_None, // CGRTAsmNH = 865
12707 CEFBS_None, // CGRTAsmNHE = 866
12708 CEFBS_None, // CGRTAsmNL = 867
12709 CEFBS_None, // CGRTAsmNLE = 868
12710 CEFBS_None, // CGRTAsmNLH = 869
12711 CEFBS_None, // CGXBR = 870
12712 CEFBS_FeatureFPExtension, // CGXBRA = 871
12713 CEFBS_None, // CGXR = 872
12714 CEFBS_None, // CGXTR = 873
12715 CEFBS_FeatureFPExtension, // CGXTRA = 874
12716 CEFBS_None, // CH = 875
12717 CEFBS_FeatureHighWord, // CHF = 876
12718 CEFBS_FeatureHighWord, // CHHR = 877
12719 CEFBS_None, // CHHSI = 878
12720 CEFBS_None, // CHI = 879
12721 CEFBS_FeatureHighWord, // CHLR = 880
12722 CEFBS_None, // CHRL = 881
12723 CEFBS_None, // CHSI = 882
12724 CEFBS_None, // CHY = 883
12725 CEFBS_None, // CIB = 884
12726 CEFBS_None, // CIBAsm = 885
12727 CEFBS_None, // CIBAsmE = 886
12728 CEFBS_None, // CIBAsmH = 887
12729 CEFBS_None, // CIBAsmHE = 888
12730 CEFBS_None, // CIBAsmL = 889
12731 CEFBS_None, // CIBAsmLE = 890
12732 CEFBS_None, // CIBAsmLH = 891
12733 CEFBS_None, // CIBAsmNE = 892
12734 CEFBS_None, // CIBAsmNH = 893
12735 CEFBS_None, // CIBAsmNHE = 894
12736 CEFBS_None, // CIBAsmNL = 895
12737 CEFBS_None, // CIBAsmNLE = 896
12738 CEFBS_None, // CIBAsmNLH = 897
12739 CEFBS_FeatureHighWord, // CIH = 898
12740 CEFBS_None, // CIJ = 899
12741 CEFBS_None, // CIJAsm = 900
12742 CEFBS_None, // CIJAsmE = 901
12743 CEFBS_None, // CIJAsmH = 902
12744 CEFBS_None, // CIJAsmHE = 903
12745 CEFBS_None, // CIJAsmL = 904
12746 CEFBS_None, // CIJAsmLE = 905
12747 CEFBS_None, // CIJAsmLH = 906
12748 CEFBS_None, // CIJAsmNE = 907
12749 CEFBS_None, // CIJAsmNH = 908
12750 CEFBS_None, // CIJAsmNHE = 909
12751 CEFBS_None, // CIJAsmNL = 910
12752 CEFBS_None, // CIJAsmNLE = 911
12753 CEFBS_None, // CIJAsmNLH = 912
12754 CEFBS_None, // CIT = 913
12755 CEFBS_None, // CITAsm = 914
12756 CEFBS_None, // CITAsmE = 915
12757 CEFBS_None, // CITAsmH = 916
12758 CEFBS_None, // CITAsmHE = 917
12759 CEFBS_None, // CITAsmL = 918
12760 CEFBS_None, // CITAsmLE = 919
12761 CEFBS_None, // CITAsmLH = 920
12762 CEFBS_None, // CITAsmNE = 921
12763 CEFBS_None, // CITAsmNH = 922
12764 CEFBS_None, // CITAsmNHE = 923
12765 CEFBS_None, // CITAsmNL = 924
12766 CEFBS_None, // CITAsmNLE = 925
12767 CEFBS_None, // CITAsmNLH = 926
12768 CEFBS_None, // CKSM = 927
12769 CEFBS_None, // CL = 928
12770 CEFBS_None, // CLC = 929
12771 CEFBS_None, // CLCL = 930
12772 CEFBS_None, // CLCLE = 931
12773 CEFBS_None, // CLCLU = 932
12774 CEFBS_FeatureFPExtension, // CLFDBR = 933
12775 CEFBS_FeatureFPExtension, // CLFDTR = 934
12776 CEFBS_FeatureFPExtension, // CLFEBR = 935
12777 CEFBS_None, // CLFHSI = 936
12778 CEFBS_None, // CLFI = 937
12779 CEFBS_None, // CLFIT = 938
12780 CEFBS_None, // CLFITAsm = 939
12781 CEFBS_None, // CLFITAsmE = 940
12782 CEFBS_None, // CLFITAsmH = 941
12783 CEFBS_None, // CLFITAsmHE = 942
12784 CEFBS_None, // CLFITAsmL = 943
12785 CEFBS_None, // CLFITAsmLE = 944
12786 CEFBS_None, // CLFITAsmLH = 945
12787 CEFBS_None, // CLFITAsmNE = 946
12788 CEFBS_None, // CLFITAsmNH = 947
12789 CEFBS_None, // CLFITAsmNHE = 948
12790 CEFBS_None, // CLFITAsmNL = 949
12791 CEFBS_None, // CLFITAsmNLE = 950
12792 CEFBS_None, // CLFITAsmNLH = 951
12793 CEFBS_FeatureFPExtension, // CLFXBR = 952
12794 CEFBS_FeatureFPExtension, // CLFXTR = 953
12795 CEFBS_None, // CLG = 954
12796 CEFBS_FeatureFPExtension, // CLGDBR = 955
12797 CEFBS_FeatureFPExtension, // CLGDTR = 956
12798 CEFBS_FeatureFPExtension, // CLGEBR = 957
12799 CEFBS_None, // CLGF = 958
12800 CEFBS_None, // CLGFI = 959
12801 CEFBS_None, // CLGFR = 960
12802 CEFBS_None, // CLGFRL = 961
12803 CEFBS_None, // CLGHRL = 962
12804 CEFBS_None, // CLGHSI = 963
12805 CEFBS_None, // CLGIB = 964
12806 CEFBS_None, // CLGIBAsm = 965
12807 CEFBS_None, // CLGIBAsmE = 966
12808 CEFBS_None, // CLGIBAsmH = 967
12809 CEFBS_None, // CLGIBAsmHE = 968
12810 CEFBS_None, // CLGIBAsmL = 969
12811 CEFBS_None, // CLGIBAsmLE = 970
12812 CEFBS_None, // CLGIBAsmLH = 971
12813 CEFBS_None, // CLGIBAsmNE = 972
12814 CEFBS_None, // CLGIBAsmNH = 973
12815 CEFBS_None, // CLGIBAsmNHE = 974
12816 CEFBS_None, // CLGIBAsmNL = 975
12817 CEFBS_None, // CLGIBAsmNLE = 976
12818 CEFBS_None, // CLGIBAsmNLH = 977
12819 CEFBS_None, // CLGIJ = 978
12820 CEFBS_None, // CLGIJAsm = 979
12821 CEFBS_None, // CLGIJAsmE = 980
12822 CEFBS_None, // CLGIJAsmH = 981
12823 CEFBS_None, // CLGIJAsmHE = 982
12824 CEFBS_None, // CLGIJAsmL = 983
12825 CEFBS_None, // CLGIJAsmLE = 984
12826 CEFBS_None, // CLGIJAsmLH = 985
12827 CEFBS_None, // CLGIJAsmNE = 986
12828 CEFBS_None, // CLGIJAsmNH = 987
12829 CEFBS_None, // CLGIJAsmNHE = 988
12830 CEFBS_None, // CLGIJAsmNL = 989
12831 CEFBS_None, // CLGIJAsmNLE = 990
12832 CEFBS_None, // CLGIJAsmNLH = 991
12833 CEFBS_None, // CLGIT = 992
12834 CEFBS_None, // CLGITAsm = 993
12835 CEFBS_None, // CLGITAsmE = 994
12836 CEFBS_None, // CLGITAsmH = 995
12837 CEFBS_None, // CLGITAsmHE = 996
12838 CEFBS_None, // CLGITAsmL = 997
12839 CEFBS_None, // CLGITAsmLE = 998
12840 CEFBS_None, // CLGITAsmLH = 999
12841 CEFBS_None, // CLGITAsmNE = 1000
12842 CEFBS_None, // CLGITAsmNH = 1001
12843 CEFBS_None, // CLGITAsmNHE = 1002
12844 CEFBS_None, // CLGITAsmNL = 1003
12845 CEFBS_None, // CLGITAsmNLE = 1004
12846 CEFBS_None, // CLGITAsmNLH = 1005
12847 CEFBS_None, // CLGR = 1006
12848 CEFBS_None, // CLGRB = 1007
12849 CEFBS_None, // CLGRBAsm = 1008
12850 CEFBS_None, // CLGRBAsmE = 1009
12851 CEFBS_None, // CLGRBAsmH = 1010
12852 CEFBS_None, // CLGRBAsmHE = 1011
12853 CEFBS_None, // CLGRBAsmL = 1012
12854 CEFBS_None, // CLGRBAsmLE = 1013
12855 CEFBS_None, // CLGRBAsmLH = 1014
12856 CEFBS_None, // CLGRBAsmNE = 1015
12857 CEFBS_None, // CLGRBAsmNH = 1016
12858 CEFBS_None, // CLGRBAsmNHE = 1017
12859 CEFBS_None, // CLGRBAsmNL = 1018
12860 CEFBS_None, // CLGRBAsmNLE = 1019
12861 CEFBS_None, // CLGRBAsmNLH = 1020
12862 CEFBS_None, // CLGRJ = 1021
12863 CEFBS_None, // CLGRJAsm = 1022
12864 CEFBS_None, // CLGRJAsmE = 1023
12865 CEFBS_None, // CLGRJAsmH = 1024
12866 CEFBS_None, // CLGRJAsmHE = 1025
12867 CEFBS_None, // CLGRJAsmL = 1026
12868 CEFBS_None, // CLGRJAsmLE = 1027
12869 CEFBS_None, // CLGRJAsmLH = 1028
12870 CEFBS_None, // CLGRJAsmNE = 1029
12871 CEFBS_None, // CLGRJAsmNH = 1030
12872 CEFBS_None, // CLGRJAsmNHE = 1031
12873 CEFBS_None, // CLGRJAsmNL = 1032
12874 CEFBS_None, // CLGRJAsmNLE = 1033
12875 CEFBS_None, // CLGRJAsmNLH = 1034
12876 CEFBS_None, // CLGRL = 1035
12877 CEFBS_None, // CLGRT = 1036
12878 CEFBS_None, // CLGRTAsm = 1037
12879 CEFBS_None, // CLGRTAsmE = 1038
12880 CEFBS_None, // CLGRTAsmH = 1039
12881 CEFBS_None, // CLGRTAsmHE = 1040
12882 CEFBS_None, // CLGRTAsmL = 1041
12883 CEFBS_None, // CLGRTAsmLE = 1042
12884 CEFBS_None, // CLGRTAsmLH = 1043
12885 CEFBS_None, // CLGRTAsmNE = 1044
12886 CEFBS_None, // CLGRTAsmNH = 1045
12887 CEFBS_None, // CLGRTAsmNHE = 1046
12888 CEFBS_None, // CLGRTAsmNL = 1047
12889 CEFBS_None, // CLGRTAsmNLE = 1048
12890 CEFBS_None, // CLGRTAsmNLH = 1049
12891 CEFBS_FeatureMiscellaneousExtensions, // CLGT = 1050
12892 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsm = 1051
12893 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmE = 1052
12894 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmH = 1053
12895 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmHE = 1054
12896 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmL = 1055
12897 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLE = 1056
12898 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLH = 1057
12899 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNE = 1058
12900 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNH = 1059
12901 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNHE = 1060
12902 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNL = 1061
12903 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLE = 1062
12904 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLH = 1063
12905 CEFBS_FeatureFPExtension, // CLGXBR = 1064
12906 CEFBS_FeatureFPExtension, // CLGXTR = 1065
12907 CEFBS_FeatureHighWord, // CLHF = 1066
12908 CEFBS_FeatureHighWord, // CLHHR = 1067
12909 CEFBS_None, // CLHHSI = 1068
12910 CEFBS_FeatureHighWord, // CLHLR = 1069
12911 CEFBS_None, // CLHRL = 1070
12912 CEFBS_None, // CLI = 1071
12913 CEFBS_None, // CLIB = 1072
12914 CEFBS_None, // CLIBAsm = 1073
12915 CEFBS_None, // CLIBAsmE = 1074
12916 CEFBS_None, // CLIBAsmH = 1075
12917 CEFBS_None, // CLIBAsmHE = 1076
12918 CEFBS_None, // CLIBAsmL = 1077
12919 CEFBS_None, // CLIBAsmLE = 1078
12920 CEFBS_None, // CLIBAsmLH = 1079
12921 CEFBS_None, // CLIBAsmNE = 1080
12922 CEFBS_None, // CLIBAsmNH = 1081
12923 CEFBS_None, // CLIBAsmNHE = 1082
12924 CEFBS_None, // CLIBAsmNL = 1083
12925 CEFBS_None, // CLIBAsmNLE = 1084
12926 CEFBS_None, // CLIBAsmNLH = 1085
12927 CEFBS_FeatureHighWord, // CLIH = 1086
12928 CEFBS_None, // CLIJ = 1087
12929 CEFBS_None, // CLIJAsm = 1088
12930 CEFBS_None, // CLIJAsmE = 1089
12931 CEFBS_None, // CLIJAsmH = 1090
12932 CEFBS_None, // CLIJAsmHE = 1091
12933 CEFBS_None, // CLIJAsmL = 1092
12934 CEFBS_None, // CLIJAsmLE = 1093
12935 CEFBS_None, // CLIJAsmLH = 1094
12936 CEFBS_None, // CLIJAsmNE = 1095
12937 CEFBS_None, // CLIJAsmNH = 1096
12938 CEFBS_None, // CLIJAsmNHE = 1097
12939 CEFBS_None, // CLIJAsmNL = 1098
12940 CEFBS_None, // CLIJAsmNLE = 1099
12941 CEFBS_None, // CLIJAsmNLH = 1100
12942 CEFBS_None, // CLIY = 1101
12943 CEFBS_None, // CLM = 1102
12944 CEFBS_None, // CLMH = 1103
12945 CEFBS_None, // CLMY = 1104
12946 CEFBS_None, // CLR = 1105
12947 CEFBS_None, // CLRB = 1106
12948 CEFBS_None, // CLRBAsm = 1107
12949 CEFBS_None, // CLRBAsmE = 1108
12950 CEFBS_None, // CLRBAsmH = 1109
12951 CEFBS_None, // CLRBAsmHE = 1110
12952 CEFBS_None, // CLRBAsmL = 1111
12953 CEFBS_None, // CLRBAsmLE = 1112
12954 CEFBS_None, // CLRBAsmLH = 1113
12955 CEFBS_None, // CLRBAsmNE = 1114
12956 CEFBS_None, // CLRBAsmNH = 1115
12957 CEFBS_None, // CLRBAsmNHE = 1116
12958 CEFBS_None, // CLRBAsmNL = 1117
12959 CEFBS_None, // CLRBAsmNLE = 1118
12960 CEFBS_None, // CLRBAsmNLH = 1119
12961 CEFBS_None, // CLRJ = 1120
12962 CEFBS_None, // CLRJAsm = 1121
12963 CEFBS_None, // CLRJAsmE = 1122
12964 CEFBS_None, // CLRJAsmH = 1123
12965 CEFBS_None, // CLRJAsmHE = 1124
12966 CEFBS_None, // CLRJAsmL = 1125
12967 CEFBS_None, // CLRJAsmLE = 1126
12968 CEFBS_None, // CLRJAsmLH = 1127
12969 CEFBS_None, // CLRJAsmNE = 1128
12970 CEFBS_None, // CLRJAsmNH = 1129
12971 CEFBS_None, // CLRJAsmNHE = 1130
12972 CEFBS_None, // CLRJAsmNL = 1131
12973 CEFBS_None, // CLRJAsmNLE = 1132
12974 CEFBS_None, // CLRJAsmNLH = 1133
12975 CEFBS_None, // CLRL = 1134
12976 CEFBS_None, // CLRT = 1135
12977 CEFBS_None, // CLRTAsm = 1136
12978 CEFBS_None, // CLRTAsmE = 1137
12979 CEFBS_None, // CLRTAsmH = 1138
12980 CEFBS_None, // CLRTAsmHE = 1139
12981 CEFBS_None, // CLRTAsmL = 1140
12982 CEFBS_None, // CLRTAsmLE = 1141
12983 CEFBS_None, // CLRTAsmLH = 1142
12984 CEFBS_None, // CLRTAsmNE = 1143
12985 CEFBS_None, // CLRTAsmNH = 1144
12986 CEFBS_None, // CLRTAsmNHE = 1145
12987 CEFBS_None, // CLRTAsmNL = 1146
12988 CEFBS_None, // CLRTAsmNLE = 1147
12989 CEFBS_None, // CLRTAsmNLH = 1148
12990 CEFBS_None, // CLST = 1149
12991 CEFBS_FeatureMiscellaneousExtensions, // CLT = 1150
12992 CEFBS_FeatureMiscellaneousExtensions, // CLTAsm = 1151
12993 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmE = 1152
12994 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmH = 1153
12995 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmHE = 1154
12996 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmL = 1155
12997 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLE = 1156
12998 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLH = 1157
12999 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNE = 1158
13000 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNH = 1159
13001 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNHE = 1160
13002 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNL = 1161
13003 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLE = 1162
13004 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLH = 1163
13005 CEFBS_None, // CLY = 1164
13006 CEFBS_FeatureMiscellaneousExtensions4, // CLZG = 1165
13007 CEFBS_None, // CMPSC = 1166
13008 CEFBS_None, // CP = 1167
13009 CEFBS_FeatureDFPPackedConversion, // CPDT = 1168
13010 CEFBS_None, // CPSDRdd = 1169
13011 CEFBS_None, // CPSDRdh = 1170
13012 CEFBS_None, // CPSDRds = 1171
13013 CEFBS_None, // CPSDRhd = 1172
13014 CEFBS_None, // CPSDRhh = 1173
13015 CEFBS_None, // CPSDRhs = 1174
13016 CEFBS_None, // CPSDRsd = 1175
13017 CEFBS_None, // CPSDRsh = 1176
13018 CEFBS_None, // CPSDRss = 1177
13019 CEFBS_FeatureDFPPackedConversion, // CPXT = 1178
13020 CEFBS_None, // CPYA = 1179
13021 CEFBS_None, // CR = 1180
13022 CEFBS_None, // CRB = 1181
13023 CEFBS_None, // CRBAsm = 1182
13024 CEFBS_None, // CRBAsmE = 1183
13025 CEFBS_None, // CRBAsmH = 1184
13026 CEFBS_None, // CRBAsmHE = 1185
13027 CEFBS_None, // CRBAsmL = 1186
13028 CEFBS_None, // CRBAsmLE = 1187
13029 CEFBS_None, // CRBAsmLH = 1188
13030 CEFBS_None, // CRBAsmNE = 1189
13031 CEFBS_None, // CRBAsmNH = 1190
13032 CEFBS_None, // CRBAsmNHE = 1191
13033 CEFBS_None, // CRBAsmNL = 1192
13034 CEFBS_None, // CRBAsmNLE = 1193
13035 CEFBS_None, // CRBAsmNLH = 1194
13036 CEFBS_FeatureEnhancedDAT2, // CRDTE = 1195
13037 CEFBS_FeatureEnhancedDAT2, // CRDTEOpt = 1196
13038 CEFBS_None, // CRJ = 1197
13039 CEFBS_None, // CRJAsm = 1198
13040 CEFBS_None, // CRJAsmE = 1199
13041 CEFBS_None, // CRJAsmH = 1200
13042 CEFBS_None, // CRJAsmHE = 1201
13043 CEFBS_None, // CRJAsmL = 1202
13044 CEFBS_None, // CRJAsmLE = 1203
13045 CEFBS_None, // CRJAsmLH = 1204
13046 CEFBS_None, // CRJAsmNE = 1205
13047 CEFBS_None, // CRJAsmNH = 1206
13048 CEFBS_None, // CRJAsmNHE = 1207
13049 CEFBS_None, // CRJAsmNL = 1208
13050 CEFBS_None, // CRJAsmNLE = 1209
13051 CEFBS_None, // CRJAsmNLH = 1210
13052 CEFBS_None, // CRL = 1211
13053 CEFBS_None, // CRT = 1212
13054 CEFBS_None, // CRTAsm = 1213
13055 CEFBS_None, // CRTAsmE = 1214
13056 CEFBS_None, // CRTAsmH = 1215
13057 CEFBS_None, // CRTAsmHE = 1216
13058 CEFBS_None, // CRTAsmL = 1217
13059 CEFBS_None, // CRTAsmLE = 1218
13060 CEFBS_None, // CRTAsmLH = 1219
13061 CEFBS_None, // CRTAsmNE = 1220
13062 CEFBS_None, // CRTAsmNH = 1221
13063 CEFBS_None, // CRTAsmNHE = 1222
13064 CEFBS_None, // CRTAsmNL = 1223
13065 CEFBS_None, // CRTAsmNLE = 1224
13066 CEFBS_None, // CRTAsmNLH = 1225
13067 CEFBS_None, // CS = 1226
13068 CEFBS_None, // CSCH = 1227
13069 CEFBS_None, // CSDTR = 1228
13070 CEFBS_None, // CSG = 1229
13071 CEFBS_None, // CSP = 1230
13072 CEFBS_None, // CSPG = 1231
13073 CEFBS_None, // CSST = 1232
13074 CEFBS_None, // CSXTR = 1233
13075 CEFBS_None, // CSY = 1234
13076 CEFBS_FeatureMiscellaneousExtensions4, // CTZG = 1235
13077 CEFBS_None, // CU12 = 1236
13078 CEFBS_None, // CU12Opt = 1237
13079 CEFBS_None, // CU14 = 1238
13080 CEFBS_None, // CU14Opt = 1239
13081 CEFBS_None, // CU21 = 1240
13082 CEFBS_None, // CU21Opt = 1241
13083 CEFBS_None, // CU24 = 1242
13084 CEFBS_None, // CU24Opt = 1243
13085 CEFBS_None, // CU41 = 1244
13086 CEFBS_None, // CU42 = 1245
13087 CEFBS_None, // CUDTR = 1246
13088 CEFBS_None, // CUSE = 1247
13089 CEFBS_None, // CUTFU = 1248
13090 CEFBS_None, // CUTFUOpt = 1249
13091 CEFBS_None, // CUUTF = 1250
13092 CEFBS_None, // CUUTFOpt = 1251
13093 CEFBS_None, // CUXTR = 1252
13094 CEFBS_None, // CVB = 1253
13095 CEFBS_None, // CVBG = 1254
13096 CEFBS_None, // CVBY = 1255
13097 CEFBS_None, // CVD = 1256
13098 CEFBS_None, // CVDG = 1257
13099 CEFBS_None, // CVDY = 1258
13100 CEFBS_None, // CXBR = 1259
13101 CEFBS_None, // CXFBR = 1260
13102 CEFBS_FeatureFPExtension, // CXFBRA = 1261
13103 CEFBS_None, // CXFR = 1262
13104 CEFBS_FeatureFPExtension, // CXFTR = 1263
13105 CEFBS_None, // CXGBR = 1264
13106 CEFBS_FeatureFPExtension, // CXGBRA = 1265
13107 CEFBS_None, // CXGR = 1266
13108 CEFBS_None, // CXGTR = 1267
13109 CEFBS_FeatureFPExtension, // CXGTRA = 1268
13110 CEFBS_FeatureFPExtension, // CXLFBR = 1269
13111 CEFBS_FeatureFPExtension, // CXLFTR = 1270
13112 CEFBS_FeatureFPExtension, // CXLGBR = 1271
13113 CEFBS_FeatureFPExtension, // CXLGTR = 1272
13114 CEFBS_FeatureDFPPackedConversion, // CXPT = 1273
13115 CEFBS_None, // CXR = 1274
13116 CEFBS_None, // CXSTR = 1275
13117 CEFBS_None, // CXTR = 1276
13118 CEFBS_None, // CXUTR = 1277
13119 CEFBS_FeatureDFPZonedConversion, // CXZT = 1278
13120 CEFBS_None, // CY = 1279
13121 CEFBS_FeatureDFPZonedConversion, // CZDT = 1280
13122 CEFBS_FeatureDFPZonedConversion, // CZXT = 1281
13123 CEFBS_None, // D = 1282
13124 CEFBS_None, // DD = 1283
13125 CEFBS_None, // DDB = 1284
13126 CEFBS_None, // DDBR = 1285
13127 CEFBS_None, // DDR = 1286
13128 CEFBS_None, // DDTR = 1287
13129 CEFBS_FeatureFPExtension, // DDTRA = 1288
13130 CEFBS_None, // DE = 1289
13131 CEFBS_None, // DEB = 1290
13132 CEFBS_None, // DEBR = 1291
13133 CEFBS_None, // DER = 1292
13134 CEFBS_FeatureDeflateConversion, // DFLTCC = 1293
13135 CEFBS_None, // DIAG = 1294
13136 CEFBS_None, // DIDBR = 1295
13137 CEFBS_None, // DIEBR = 1296
13138 CEFBS_None, // DL = 1297
13139 CEFBS_None, // DLG = 1298
13140 CEFBS_None, // DLGR = 1299
13141 CEFBS_None, // DLR = 1300
13142 CEFBS_None, // DP = 1301
13143 CEFBS_None, // DR = 1302
13144 CEFBS_None, // DSG = 1303
13145 CEFBS_None, // DSGF = 1304
13146 CEFBS_None, // DSGFR = 1305
13147 CEFBS_None, // DSGR = 1306
13148 CEFBS_None, // DXBR = 1307
13149 CEFBS_None, // DXR = 1308
13150 CEFBS_None, // DXTR = 1309
13151 CEFBS_FeatureFPExtension, // DXTRA = 1310
13152 CEFBS_None, // EAR = 1311
13153 CEFBS_None, // ECAG = 1312
13154 CEFBS_None, // ECCTR = 1313
13155 CEFBS_None, // ECPGA = 1314
13156 CEFBS_None, // ECTG = 1315
13157 CEFBS_None, // ED = 1316
13158 CEFBS_None, // EDMK = 1317
13159 CEFBS_None, // EEDTR = 1318
13160 CEFBS_None, // EEXTR = 1319
13161 CEFBS_None, // EFPC = 1320
13162 CEFBS_None, // EPAIR = 1321
13163 CEFBS_None, // EPAR = 1322
13164 CEFBS_None, // EPCTR = 1323
13165 CEFBS_None, // EPSW = 1324
13166 CEFBS_None, // EREG = 1325
13167 CEFBS_None, // EREGG = 1326
13168 CEFBS_None, // ESAIR = 1327
13169 CEFBS_None, // ESAR = 1328
13170 CEFBS_None, // ESDTR = 1329
13171 CEFBS_None, // ESEA = 1330
13172 CEFBS_None, // ESTA = 1331
13173 CEFBS_None, // ESXTR = 1332
13174 CEFBS_FeatureTransactionalExecution, // ETND = 1333
13175 CEFBS_None, // EX = 1334
13176 CEFBS_None, // EXRL = 1335
13177 CEFBS_None, // FIDBR = 1336
13178 CEFBS_FeatureFPExtension, // FIDBRA = 1337
13179 CEFBS_None, // FIDR = 1338
13180 CEFBS_None, // FIDTR = 1339
13181 CEFBS_None, // FIEBR = 1340
13182 CEFBS_FeatureFPExtension, // FIEBRA = 1341
13183 CEFBS_None, // FIER = 1342
13184 CEFBS_None, // FIXBR = 1343
13185 CEFBS_FeatureFPExtension, // FIXBRA = 1344
13186 CEFBS_None, // FIXR = 1345
13187 CEFBS_None, // FIXTR = 1346
13188 CEFBS_None, // FLOGR = 1347
13189 CEFBS_None, // HDR = 1348
13190 CEFBS_None, // HER = 1349
13191 CEFBS_None, // HSCH = 1350
13192 CEFBS_None, // IAC = 1351
13193 CEFBS_None, // IC = 1352
13194 CEFBS_None, // IC32 = 1353
13195 CEFBS_None, // IC32Y = 1354
13196 CEFBS_None, // ICM = 1355
13197 CEFBS_None, // ICMH = 1356
13198 CEFBS_None, // ICMY = 1357
13199 CEFBS_None, // ICY = 1358
13200 CEFBS_None, // IDTE = 1359
13201 CEFBS_None, // IDTEOpt = 1360
13202 CEFBS_None, // IEDTR = 1361
13203 CEFBS_None, // IEXTR = 1362
13204 CEFBS_None, // IIHF = 1363
13205 CEFBS_None, // IIHH = 1364
13206 CEFBS_None, // IIHL = 1365
13207 CEFBS_None, // IILF = 1366
13208 CEFBS_None, // IILH = 1367
13209 CEFBS_None, // IILL = 1368
13210 CEFBS_None, // IPK = 1369
13211 CEFBS_None, // IPM = 1370
13212 CEFBS_None, // IPTE = 1371
13213 CEFBS_None, // IPTEOpt = 1372
13214 CEFBS_None, // IPTEOptOpt = 1373
13215 CEFBS_FeatureInsertReferenceBitsMultiple, // IRBM = 1374
13216 CEFBS_None, // ISKE = 1375
13217 CEFBS_None, // IVSK = 1376
13218 CEFBS_None, // InsnE = 1377
13219 CEFBS_None, // InsnRI = 1378
13220 CEFBS_None, // InsnRIE = 1379
13221 CEFBS_None, // InsnRIL = 1380
13222 CEFBS_None, // InsnRILU = 1381
13223 CEFBS_None, // InsnRIS = 1382
13224 CEFBS_None, // InsnRR = 1383
13225 CEFBS_None, // InsnRRE = 1384
13226 CEFBS_None, // InsnRRF = 1385
13227 CEFBS_None, // InsnRRS = 1386
13228 CEFBS_None, // InsnRS = 1387
13229 CEFBS_None, // InsnRSE = 1388
13230 CEFBS_None, // InsnRSI = 1389
13231 CEFBS_None, // InsnRSY = 1390
13232 CEFBS_None, // InsnRX = 1391
13233 CEFBS_None, // InsnRXE = 1392
13234 CEFBS_None, // InsnRXF = 1393
13235 CEFBS_None, // InsnRXY = 1394
13236 CEFBS_None, // InsnS = 1395
13237 CEFBS_None, // InsnSI = 1396
13238 CEFBS_None, // InsnSIL = 1397
13239 CEFBS_None, // InsnSIY = 1398
13240 CEFBS_None, // InsnSS = 1399
13241 CEFBS_None, // InsnSSE = 1400
13242 CEFBS_None, // InsnSSF = 1401
13243 CEFBS_None, // InsnVRI = 1402
13244 CEFBS_None, // InsnVRR = 1403
13245 CEFBS_None, // InsnVRS = 1404
13246 CEFBS_None, // InsnVRV = 1405
13247 CEFBS_None, // InsnVRX = 1406
13248 CEFBS_None, // InsnVSI = 1407
13249 CEFBS_None, // J = 1408
13250 CEFBS_None, // JAsmE = 1409
13251 CEFBS_None, // JAsmH = 1410
13252 CEFBS_None, // JAsmHE = 1411
13253 CEFBS_None, // JAsmL = 1412
13254 CEFBS_None, // JAsmLE = 1413
13255 CEFBS_None, // JAsmLH = 1414
13256 CEFBS_None, // JAsmM = 1415
13257 CEFBS_None, // JAsmNE = 1416
13258 CEFBS_None, // JAsmNH = 1417
13259 CEFBS_None, // JAsmNHE = 1418
13260 CEFBS_None, // JAsmNL = 1419
13261 CEFBS_None, // JAsmNLE = 1420
13262 CEFBS_None, // JAsmNLH = 1421
13263 CEFBS_None, // JAsmNM = 1422
13264 CEFBS_None, // JAsmNO = 1423
13265 CEFBS_None, // JAsmNP = 1424
13266 CEFBS_None, // JAsmNZ = 1425
13267 CEFBS_None, // JAsmO = 1426
13268 CEFBS_None, // JAsmP = 1427
13269 CEFBS_None, // JAsmZ = 1428
13270 CEFBS_None, // JG = 1429
13271 CEFBS_None, // JGAsmE = 1430
13272 CEFBS_None, // JGAsmH = 1431
13273 CEFBS_None, // JGAsmHE = 1432
13274 CEFBS_None, // JGAsmL = 1433
13275 CEFBS_None, // JGAsmLE = 1434
13276 CEFBS_None, // JGAsmLH = 1435
13277 CEFBS_None, // JGAsmM = 1436
13278 CEFBS_None, // JGAsmNE = 1437
13279 CEFBS_None, // JGAsmNH = 1438
13280 CEFBS_None, // JGAsmNHE = 1439
13281 CEFBS_None, // JGAsmNL = 1440
13282 CEFBS_None, // JGAsmNLE = 1441
13283 CEFBS_None, // JGAsmNLH = 1442
13284 CEFBS_None, // JGAsmNM = 1443
13285 CEFBS_None, // JGAsmNO = 1444
13286 CEFBS_None, // JGAsmNP = 1445
13287 CEFBS_None, // JGAsmNZ = 1446
13288 CEFBS_None, // JGAsmO = 1447
13289 CEFBS_None, // JGAsmP = 1448
13290 CEFBS_None, // JGAsmZ = 1449
13291 CEFBS_None, // JGNOP = 1450
13292 CEFBS_None, // JNOP = 1451
13293 CEFBS_None, // KDB = 1452
13294 CEFBS_None, // KDBR = 1453
13295 CEFBS_FeatureMessageSecurityAssist9, // KDSA = 1454
13296 CEFBS_None, // KDTR = 1455
13297 CEFBS_None, // KEB = 1456
13298 CEFBS_None, // KEBR = 1457
13299 CEFBS_None, // KIMD = 1458
13300 CEFBS_FeatureMessageSecurityAssist12, // KIMDOpt = 1459
13301 CEFBS_None, // KLMD = 1460
13302 CEFBS_FeatureMessageSecurityAssist12, // KLMDOpt = 1461
13303 CEFBS_None, // KM = 1462
13304 CEFBS_FeatureMessageSecurityAssist8, // KMA = 1463
13305 CEFBS_None, // KMAC = 1464
13306 CEFBS_None, // KMC = 1465
13307 CEFBS_FeatureMessageSecurityAssist4, // KMCTR = 1466
13308 CEFBS_FeatureMessageSecurityAssist4, // KMF = 1467
13309 CEFBS_FeatureMessageSecurityAssist4, // KMO = 1468
13310 CEFBS_None, // KXBR = 1469
13311 CEFBS_None, // KXTR = 1470
13312 CEFBS_None, // L = 1471
13313 CEFBS_None, // LA = 1472
13314 CEFBS_FeatureInterlockedAccess1, // LAA = 1473
13315 CEFBS_FeatureInterlockedAccess1, // LAAG = 1474
13316 CEFBS_FeatureInterlockedAccess1, // LAAL = 1475
13317 CEFBS_FeatureInterlockedAccess1, // LAALG = 1476
13318 CEFBS_None, // LAE = 1477
13319 CEFBS_None, // LAEY = 1478
13320 CEFBS_None, // LAM = 1479
13321 CEFBS_None, // LAMY = 1480
13322 CEFBS_FeatureInterlockedAccess1, // LAN = 1481
13323 CEFBS_FeatureInterlockedAccess1, // LANG = 1482
13324 CEFBS_FeatureInterlockedAccess1, // LAO = 1483
13325 CEFBS_FeatureInterlockedAccess1, // LAOG = 1484
13326 CEFBS_None, // LARL = 1485
13327 CEFBS_None, // LASP = 1486
13328 CEFBS_FeatureLoadAndTrap, // LAT = 1487
13329 CEFBS_FeatureInterlockedAccess1, // LAX = 1488
13330 CEFBS_FeatureInterlockedAccess1, // LAXG = 1489
13331 CEFBS_None, // LAY = 1490
13332 CEFBS_None, // LB = 1491
13333 CEFBS_FeatureBEAREnhancement, // LBEAR = 1492
13334 CEFBS_FeatureHighWord, // LBH = 1493
13335 CEFBS_None, // LBR = 1494
13336 CEFBS_FeatureVector, // LCBB = 1495
13337 CEFBS_None, // LCCTL = 1496
13338 CEFBS_None, // LCDBR = 1497
13339 CEFBS_None, // LCDFR = 1498
13340 CEFBS_None, // LCDFR_16 = 1499
13341 CEFBS_None, // LCDFR_32 = 1500
13342 CEFBS_None, // LCDR = 1501
13343 CEFBS_None, // LCEBR = 1502
13344 CEFBS_None, // LCER = 1503
13345 CEFBS_None, // LCGFR = 1504
13346 CEFBS_None, // LCGR = 1505
13347 CEFBS_None, // LCR = 1506
13348 CEFBS_None, // LCTL = 1507
13349 CEFBS_None, // LCTLG = 1508
13350 CEFBS_None, // LCXBR = 1509
13351 CEFBS_None, // LCXR = 1510
13352 CEFBS_None, // LD = 1511
13353 CEFBS_None, // LDE = 1512
13354 CEFBS_None, // LDE32 = 1513
13355 CEFBS_None, // LDEB = 1514
13356 CEFBS_None, // LDEBR = 1515
13357 CEFBS_None, // LDER = 1516
13358 CEFBS_None, // LDETR = 1517
13359 CEFBS_None, // LDGR = 1518
13360 CEFBS_None, // LDR = 1519
13361 CEFBS_None, // LDR16 = 1520
13362 CEFBS_None, // LDR32 = 1521
13363 CEFBS_None, // LDXBR = 1522
13364 CEFBS_FeatureFPExtension, // LDXBRA = 1523
13365 CEFBS_None, // LDXR = 1524
13366 CEFBS_None, // LDXTR = 1525
13367 CEFBS_None, // LDY = 1526
13368 CEFBS_None, // LE = 1527
13369 CEFBS_None, // LE16 = 1528
13370 CEFBS_None, // LE16Y = 1529
13371 CEFBS_None, // LEDBR = 1530
13372 CEFBS_FeatureFPExtension, // LEDBRA = 1531
13373 CEFBS_None, // LEDR = 1532
13374 CEFBS_None, // LEDTR = 1533
13375 CEFBS_None, // LER = 1534
13376 CEFBS_None, // LER16 = 1535
13377 CEFBS_None, // LEXBR = 1536
13378 CEFBS_FeatureFPExtension, // LEXBRA = 1537
13379 CEFBS_None, // LEXR = 1538
13380 CEFBS_None, // LEY = 1539
13381 CEFBS_None, // LFAS = 1540
13382 CEFBS_FeatureHighWord, // LFH = 1541
13383 CEFBS_FeatureLoadAndTrap, // LFHAT = 1542
13384 CEFBS_None, // LFPC = 1543
13385 CEFBS_None, // LG = 1544
13386 CEFBS_FeatureLoadAndTrap, // LGAT = 1545
13387 CEFBS_None, // LGB = 1546
13388 CEFBS_None, // LGBR = 1547
13389 CEFBS_None, // LGDR = 1548
13390 CEFBS_None, // LGF = 1549
13391 CEFBS_None, // LGFI = 1550
13392 CEFBS_None, // LGFR = 1551
13393 CEFBS_None, // LGFRL = 1552
13394 CEFBS_FeatureGuardedStorage, // LGG = 1553
13395 CEFBS_None, // LGH = 1554
13396 CEFBS_None, // LGHI = 1555
13397 CEFBS_None, // LGHR = 1556
13398 CEFBS_None, // LGHRL = 1557
13399 CEFBS_None, // LGR = 1558
13400 CEFBS_None, // LGRL = 1559
13401 CEFBS_FeatureGuardedStorage, // LGSC = 1560
13402 CEFBS_None, // LH = 1561
13403 CEFBS_FeatureHighWord, // LHH = 1562
13404 CEFBS_None, // LHI = 1563
13405 CEFBS_None, // LHR = 1564
13406 CEFBS_None, // LHRL = 1565
13407 CEFBS_None, // LHY = 1566
13408 CEFBS_None, // LLC = 1567
13409 CEFBS_FeatureHighWord, // LLCH = 1568
13410 CEFBS_None, // LLCR = 1569
13411 CEFBS_None, // LLGC = 1570
13412 CEFBS_None, // LLGCR = 1571
13413 CEFBS_None, // LLGF = 1572
13414 CEFBS_FeatureLoadAndTrap, // LLGFAT = 1573
13415 CEFBS_None, // LLGFR = 1574
13416 CEFBS_None, // LLGFRL = 1575
13417 CEFBS_FeatureGuardedStorage, // LLGFSG = 1576
13418 CEFBS_None, // LLGH = 1577
13419 CEFBS_None, // LLGHR = 1578
13420 CEFBS_None, // LLGHRL = 1579
13421 CEFBS_None, // LLGT = 1580
13422 CEFBS_FeatureLoadAndTrap, // LLGTAT = 1581
13423 CEFBS_None, // LLGTR = 1582
13424 CEFBS_None, // LLH = 1583
13425 CEFBS_FeatureHighWord, // LLHH = 1584
13426 CEFBS_None, // LLHR = 1585
13427 CEFBS_None, // LLHRL = 1586
13428 CEFBS_None, // LLIHF = 1587
13429 CEFBS_None, // LLIHH = 1588
13430 CEFBS_None, // LLIHL = 1589
13431 CEFBS_None, // LLILF = 1590
13432 CEFBS_None, // LLILH = 1591
13433 CEFBS_None, // LLILL = 1592
13434 CEFBS_FeatureMiscellaneousExtensions4, // LLXAB = 1593
13435 CEFBS_FeatureMiscellaneousExtensions4, // LLXAF = 1594
13436 CEFBS_FeatureMiscellaneousExtensions4, // LLXAG = 1595
13437 CEFBS_FeatureMiscellaneousExtensions4, // LLXAH = 1596
13438 CEFBS_FeatureMiscellaneousExtensions4, // LLXAQ = 1597
13439 CEFBS_FeatureLoadAndZeroRightmostByte, // LLZRGF = 1598
13440 CEFBS_None, // LM = 1599
13441 CEFBS_None, // LMD = 1600
13442 CEFBS_None, // LMG = 1601
13443 CEFBS_None, // LMH = 1602
13444 CEFBS_None, // LMY = 1603
13445 CEFBS_None, // LNDBR = 1604
13446 CEFBS_None, // LNDFR = 1605
13447 CEFBS_None, // LNDFR_16 = 1606
13448 CEFBS_None, // LNDFR_32 = 1607
13449 CEFBS_None, // LNDR = 1608
13450 CEFBS_None, // LNEBR = 1609
13451 CEFBS_None, // LNER = 1610
13452 CEFBS_None, // LNGFR = 1611
13453 CEFBS_None, // LNGR = 1612
13454 CEFBS_None, // LNR = 1613
13455 CEFBS_None, // LNXBR = 1614
13456 CEFBS_None, // LNXR = 1615
13457 CEFBS_FeatureLoadStoreOnCond, // LOC = 1616
13458 CEFBS_FeatureLoadStoreOnCond, // LOCAsm = 1617
13459 CEFBS_FeatureLoadStoreOnCond, // LOCAsmE = 1618
13460 CEFBS_FeatureLoadStoreOnCond, // LOCAsmH = 1619
13461 CEFBS_FeatureLoadStoreOnCond, // LOCAsmHE = 1620
13462 CEFBS_FeatureLoadStoreOnCond, // LOCAsmL = 1621
13463 CEFBS_FeatureLoadStoreOnCond, // LOCAsmLE = 1622
13464 CEFBS_FeatureLoadStoreOnCond, // LOCAsmLH = 1623
13465 CEFBS_FeatureLoadStoreOnCond, // LOCAsmM = 1624
13466 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNE = 1625
13467 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNH = 1626
13468 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNHE = 1627
13469 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNL = 1628
13470 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLE = 1629
13471 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLH = 1630
13472 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNM = 1631
13473 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNO = 1632
13474 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNP = 1633
13475 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNZ = 1634
13476 CEFBS_FeatureLoadStoreOnCond, // LOCAsmO = 1635
13477 CEFBS_FeatureLoadStoreOnCond, // LOCAsmP = 1636
13478 CEFBS_FeatureLoadStoreOnCond, // LOCAsmZ = 1637
13479 CEFBS_FeatureLoadStoreOnCond2, // LOCFH = 1638
13480 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsm = 1639
13481 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmE = 1640
13482 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmH = 1641
13483 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmHE = 1642
13484 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmL = 1643
13485 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLE = 1644
13486 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLH = 1645
13487 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmM = 1646
13488 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNE = 1647
13489 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNH = 1648
13490 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNHE = 1649
13491 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNL = 1650
13492 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLE = 1651
13493 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLH = 1652
13494 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNM = 1653
13495 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNO = 1654
13496 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNP = 1655
13497 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNZ = 1656
13498 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmO = 1657
13499 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmP = 1658
13500 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmZ = 1659
13501 CEFBS_FeatureLoadStoreOnCond2, // LOCFHR = 1660
13502 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsm = 1661
13503 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmE = 1662
13504 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmH = 1663
13505 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmHE = 1664
13506 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmL = 1665
13507 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLE = 1666
13508 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLH = 1667
13509 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmM = 1668
13510 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNE = 1669
13511 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNH = 1670
13512 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNHE = 1671
13513 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNL = 1672
13514 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLE = 1673
13515 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLH = 1674
13516 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNM = 1675
13517 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNO = 1676
13518 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNP = 1677
13519 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNZ = 1678
13520 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmO = 1679
13521 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmP = 1680
13522 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmZ = 1681
13523 CEFBS_FeatureLoadStoreOnCond, // LOCG = 1682
13524 CEFBS_FeatureLoadStoreOnCond, // LOCGAsm = 1683
13525 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmE = 1684
13526 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmH = 1685
13527 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmHE = 1686
13528 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmL = 1687
13529 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLE = 1688
13530 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLH = 1689
13531 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmM = 1690
13532 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNE = 1691
13533 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNH = 1692
13534 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNHE = 1693
13535 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNL = 1694
13536 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLE = 1695
13537 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLH = 1696
13538 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNM = 1697
13539 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNO = 1698
13540 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNP = 1699
13541 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNZ = 1700
13542 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmO = 1701
13543 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmP = 1702
13544 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmZ = 1703
13545 CEFBS_FeatureLoadStoreOnCond2, // LOCGHI = 1704
13546 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsm = 1705
13547 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmE = 1706
13548 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmH = 1707
13549 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmHE = 1708
13550 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmL = 1709
13551 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLE = 1710
13552 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLH = 1711
13553 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmM = 1712
13554 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNE = 1713
13555 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNH = 1714
13556 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNHE = 1715
13557 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNL = 1716
13558 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLE = 1717
13559 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLH = 1718
13560 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNM = 1719
13561 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNO = 1720
13562 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNP = 1721
13563 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNZ = 1722
13564 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmO = 1723
13565 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmP = 1724
13566 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmZ = 1725
13567 CEFBS_FeatureLoadStoreOnCond, // LOCGR = 1726
13568 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsm = 1727
13569 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmE = 1728
13570 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmH = 1729
13571 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmHE = 1730
13572 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmL = 1731
13573 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLE = 1732
13574 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLH = 1733
13575 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmM = 1734
13576 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNE = 1735
13577 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNH = 1736
13578 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNHE = 1737
13579 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNL = 1738
13580 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLE = 1739
13581 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLH = 1740
13582 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNM = 1741
13583 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNO = 1742
13584 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNP = 1743
13585 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNZ = 1744
13586 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmO = 1745
13587 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmP = 1746
13588 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmZ = 1747
13589 CEFBS_FeatureLoadStoreOnCond2, // LOCHHI = 1748
13590 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsm = 1749
13591 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmE = 1750
13592 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmH = 1751
13593 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmHE = 1752
13594 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmL = 1753
13595 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLE = 1754
13596 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLH = 1755
13597 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmM = 1756
13598 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNE = 1757
13599 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNH = 1758
13600 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNHE = 1759
13601 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNL = 1760
13602 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLE = 1761
13603 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLH = 1762
13604 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNM = 1763
13605 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNO = 1764
13606 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNP = 1765
13607 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNZ = 1766
13608 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmO = 1767
13609 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmP = 1768
13610 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmZ = 1769
13611 CEFBS_FeatureLoadStoreOnCond2, // LOCHI = 1770
13612 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsm = 1771
13613 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmE = 1772
13614 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmH = 1773
13615 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmHE = 1774
13616 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmL = 1775
13617 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLE = 1776
13618 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLH = 1777
13619 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmM = 1778
13620 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNE = 1779
13621 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNH = 1780
13622 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNHE = 1781
13623 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNL = 1782
13624 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLE = 1783
13625 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLH = 1784
13626 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNM = 1785
13627 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNO = 1786
13628 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNP = 1787
13629 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNZ = 1788
13630 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmO = 1789
13631 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmP = 1790
13632 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmZ = 1791
13633 CEFBS_FeatureLoadStoreOnCond, // LOCR = 1792
13634 CEFBS_FeatureLoadStoreOnCond, // LOCRAsm = 1793
13635 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmE = 1794
13636 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmH = 1795
13637 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmHE = 1796
13638 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmL = 1797
13639 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLE = 1798
13640 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLH = 1799
13641 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmM = 1800
13642 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNE = 1801
13643 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNH = 1802
13644 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNHE = 1803
13645 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNL = 1804
13646 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLE = 1805
13647 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLH = 1806
13648 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNM = 1807
13649 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNO = 1808
13650 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNP = 1809
13651 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNZ = 1810
13652 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmO = 1811
13653 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmP = 1812
13654 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmZ = 1813
13655 CEFBS_None, // LPCTL = 1814
13656 CEFBS_FeatureInterlockedAccess1, // LPD = 1815
13657 CEFBS_None, // LPDBR = 1816
13658 CEFBS_None, // LPDFR = 1817
13659 CEFBS_None, // LPDFR_16 = 1818
13660 CEFBS_None, // LPDFR_32 = 1819
13661 CEFBS_FeatureInterlockedAccess1, // LPDG = 1820
13662 CEFBS_None, // LPDR = 1821
13663 CEFBS_None, // LPEBR = 1822
13664 CEFBS_None, // LPER = 1823
13665 CEFBS_None, // LPGFR = 1824
13666 CEFBS_None, // LPGR = 1825
13667 CEFBS_None, // LPP = 1826
13668 CEFBS_None, // LPQ = 1827
13669 CEFBS_None, // LPR = 1828
13670 CEFBS_None, // LPSW = 1829
13671 CEFBS_None, // LPSWE = 1830
13672 CEFBS_FeatureBEAREnhancement, // LPSWEY = 1831
13673 CEFBS_None, // LPTEA = 1832
13674 CEFBS_None, // LPXBR = 1833
13675 CEFBS_None, // LPXR = 1834
13676 CEFBS_None, // LR = 1835
13677 CEFBS_None, // LRA = 1836
13678 CEFBS_None, // LRAG = 1837
13679 CEFBS_None, // LRAY = 1838
13680 CEFBS_None, // LRDR = 1839
13681 CEFBS_None, // LRER = 1840
13682 CEFBS_None, // LRL = 1841
13683 CEFBS_None, // LRV = 1842
13684 CEFBS_None, // LRVG = 1843
13685 CEFBS_None, // LRVGR = 1844
13686 CEFBS_None, // LRVH = 1845
13687 CEFBS_None, // LRVR = 1846
13688 CEFBS_None, // LSCTL = 1847
13689 CEFBS_None, // LT = 1848
13690 CEFBS_None, // LTDBR = 1849
13691 CEFBS_None, // LTDR = 1850
13692 CEFBS_None, // LTDTR = 1851
13693 CEFBS_None, // LTEBR = 1852
13694 CEFBS_None, // LTER = 1853
13695 CEFBS_None, // LTG = 1854
13696 CEFBS_None, // LTGF = 1855
13697 CEFBS_None, // LTGFR = 1856
13698 CEFBS_None, // LTGR = 1857
13699 CEFBS_None, // LTR = 1858
13700 CEFBS_None, // LTXBR = 1859
13701 CEFBS_None, // LTXR = 1860
13702 CEFBS_None, // LTXTR = 1861
13703 CEFBS_None, // LURA = 1862
13704 CEFBS_None, // LURAG = 1863
13705 CEFBS_FeatureMiscellaneousExtensions4, // LXAB = 1864
13706 CEFBS_FeatureMiscellaneousExtensions4, // LXAF = 1865
13707 CEFBS_FeatureMiscellaneousExtensions4, // LXAG = 1866
13708 CEFBS_FeatureMiscellaneousExtensions4, // LXAH = 1867
13709 CEFBS_FeatureMiscellaneousExtensions4, // LXAQ = 1868
13710 CEFBS_None, // LXD = 1869
13711 CEFBS_None, // LXDB = 1870
13712 CEFBS_None, // LXDBR = 1871
13713 CEFBS_None, // LXDR = 1872
13714 CEFBS_None, // LXDTR = 1873
13715 CEFBS_None, // LXE = 1874
13716 CEFBS_None, // LXEB = 1875
13717 CEFBS_None, // LXEBR = 1876
13718 CEFBS_None, // LXER = 1877
13719 CEFBS_None, // LXR = 1878
13720 CEFBS_None, // LY = 1879
13721 CEFBS_None, // LZDR = 1880
13722 CEFBS_None, // LZER = 1881
13723 CEFBS_None, // LZER_16 = 1882
13724 CEFBS_FeatureLoadAndZeroRightmostByte, // LZRF = 1883
13725 CEFBS_FeatureLoadAndZeroRightmostByte, // LZRG = 1884
13726 CEFBS_None, // LZXR = 1885
13727 CEFBS_None, // M = 1886
13728 CEFBS_None, // MAD = 1887
13729 CEFBS_None, // MADB = 1888
13730 CEFBS_None, // MADBR = 1889
13731 CEFBS_None, // MADR = 1890
13732 CEFBS_None, // MAE = 1891
13733 CEFBS_None, // MAEB = 1892
13734 CEFBS_None, // MAEBR = 1893
13735 CEFBS_None, // MAER = 1894
13736 CEFBS_None, // MAY = 1895
13737 CEFBS_None, // MAYH = 1896
13738 CEFBS_None, // MAYHR = 1897
13739 CEFBS_None, // MAYL = 1898
13740 CEFBS_None, // MAYLR = 1899
13741 CEFBS_None, // MAYR = 1900
13742 CEFBS_None, // MC = 1901
13743 CEFBS_None, // MD = 1902
13744 CEFBS_None, // MDB = 1903
13745 CEFBS_None, // MDBR = 1904
13746 CEFBS_None, // MDE = 1905
13747 CEFBS_None, // MDEB = 1906
13748 CEFBS_None, // MDEBR = 1907
13749 CEFBS_None, // MDER = 1908
13750 CEFBS_None, // MDR = 1909
13751 CEFBS_None, // MDTR = 1910
13752 CEFBS_FeatureFPExtension, // MDTRA = 1911
13753 CEFBS_None, // ME = 1912
13754 CEFBS_None, // MEE = 1913
13755 CEFBS_None, // MEEB = 1914
13756 CEFBS_None, // MEEBR = 1915
13757 CEFBS_None, // MEER = 1916
13758 CEFBS_None, // MER = 1917
13759 CEFBS_None, // MFY = 1918
13760 CEFBS_FeatureMiscellaneousExtensions2, // MG = 1919
13761 CEFBS_FeatureMiscellaneousExtensions2, // MGH = 1920
13762 CEFBS_None, // MGHI = 1921
13763 CEFBS_FeatureMiscellaneousExtensions2, // MGRK = 1922
13764 CEFBS_None, // MH = 1923
13765 CEFBS_None, // MHI = 1924
13766 CEFBS_None, // MHY = 1925
13767 CEFBS_None, // ML = 1926
13768 CEFBS_None, // MLG = 1927
13769 CEFBS_None, // MLGR = 1928
13770 CEFBS_None, // MLR = 1929
13771 CEFBS_None, // MP = 1930
13772 CEFBS_None, // MR = 1931
13773 CEFBS_None, // MS = 1932
13774 CEFBS_FeatureMiscellaneousExtensions2, // MSC = 1933
13775 CEFBS_None, // MSCH = 1934
13776 CEFBS_None, // MSD = 1935
13777 CEFBS_None, // MSDB = 1936
13778 CEFBS_None, // MSDBR = 1937
13779 CEFBS_None, // MSDR = 1938
13780 CEFBS_None, // MSE = 1939
13781 CEFBS_None, // MSEB = 1940
13782 CEFBS_None, // MSEBR = 1941
13783 CEFBS_None, // MSER = 1942
13784 CEFBS_None, // MSFI = 1943
13785 CEFBS_None, // MSG = 1944
13786 CEFBS_FeatureMiscellaneousExtensions2, // MSGC = 1945
13787 CEFBS_None, // MSGF = 1946
13788 CEFBS_None, // MSGFI = 1947
13789 CEFBS_None, // MSGFR = 1948
13790 CEFBS_None, // MSGR = 1949
13791 CEFBS_FeatureMiscellaneousExtensions2, // MSGRKC = 1950
13792 CEFBS_None, // MSR = 1951
13793 CEFBS_FeatureMiscellaneousExtensions2, // MSRKC = 1952
13794 CEFBS_None, // MSTA = 1953
13795 CEFBS_None, // MSY = 1954
13796 CEFBS_None, // MVC = 1955
13797 CEFBS_None, // MVCDK = 1956
13798 CEFBS_None, // MVCIN = 1957
13799 CEFBS_None, // MVCK = 1958
13800 CEFBS_None, // MVCL = 1959
13801 CEFBS_None, // MVCLE = 1960
13802 CEFBS_None, // MVCLU = 1961
13803 CEFBS_None, // MVCOS = 1962
13804 CEFBS_None, // MVCP = 1963
13805 CEFBS_FeatureMiscellaneousExtensions3, // MVCRL = 1964
13806 CEFBS_None, // MVCS = 1965
13807 CEFBS_None, // MVCSK = 1966
13808 CEFBS_None, // MVGHI = 1967
13809 CEFBS_None, // MVHHI = 1968
13810 CEFBS_None, // MVHI = 1969
13811 CEFBS_None, // MVI = 1970
13812 CEFBS_None, // MVIY = 1971
13813 CEFBS_None, // MVN = 1972
13814 CEFBS_None, // MVO = 1973
13815 CEFBS_None, // MVPG = 1974
13816 CEFBS_None, // MVST = 1975
13817 CEFBS_None, // MVZ = 1976
13818 CEFBS_None, // MXBR = 1977
13819 CEFBS_None, // MXD = 1978
13820 CEFBS_None, // MXDB = 1979
13821 CEFBS_None, // MXDBR = 1980
13822 CEFBS_None, // MXDR = 1981
13823 CEFBS_None, // MXR = 1982
13824 CEFBS_None, // MXTR = 1983
13825 CEFBS_FeatureFPExtension, // MXTRA = 1984
13826 CEFBS_None, // MY = 1985
13827 CEFBS_None, // MYH = 1986
13828 CEFBS_None, // MYHR = 1987
13829 CEFBS_None, // MYL = 1988
13830 CEFBS_None, // MYLR = 1989
13831 CEFBS_None, // MYR = 1990
13832 CEFBS_None, // N = 1991
13833 CEFBS_None, // NC = 1992
13834 CEFBS_FeatureMiscellaneousExtensions3, // NCGRK = 1993
13835 CEFBS_FeatureMiscellaneousExtensions3, // NCRK = 1994
13836 CEFBS_None, // NG = 1995
13837 CEFBS_None, // NGR = 1996
13838 CEFBS_FeatureDistinctOps, // NGRK = 1997
13839 CEFBS_None, // NI = 1998
13840 CEFBS_FeatureExecutionHint, // NIAI = 1999
13841 CEFBS_None, // NIHF = 2000
13842 CEFBS_None, // NIHH = 2001
13843 CEFBS_None, // NIHL = 2002
13844 CEFBS_None, // NILF = 2003
13845 CEFBS_None, // NILH = 2004
13846 CEFBS_None, // NILL = 2005
13847 CEFBS_None, // NIY = 2006
13848 CEFBS_FeatureMiscellaneousExtensions3, // NNGRK = 2007
13849 CEFBS_FeatureNNPAssist, // NNPA = 2008
13850 CEFBS_FeatureMiscellaneousExtensions3, // NNRK = 2009
13851 CEFBS_FeatureMiscellaneousExtensions3, // NOGRK = 2010
13852 CEFBS_None, // NOP = 2011
13853 CEFBS_None, // NOPOpt = 2012
13854 CEFBS_None, // NOPR = 2013
13855 CEFBS_None, // NOPROpt = 2014
13856 CEFBS_FeatureMiscellaneousExtensions3, // NORK = 2015
13857 CEFBS_FeatureMiscellaneousExtensions3, // NOTGR = 2016
13858 CEFBS_FeatureMiscellaneousExtensions3, // NOTR = 2017
13859 CEFBS_None, // NR = 2018
13860 CEFBS_FeatureDistinctOps, // NRK = 2019
13861 CEFBS_FeatureTransactionalExecution, // NTSTG = 2020
13862 CEFBS_FeatureMiscellaneousExtensions3, // NXGRK = 2021
13863 CEFBS_FeatureMiscellaneousExtensions3, // NXRK = 2022
13864 CEFBS_None, // NY = 2023
13865 CEFBS_None, // O = 2024
13866 CEFBS_None, // OC = 2025
13867 CEFBS_FeatureMiscellaneousExtensions3, // OCGRK = 2026
13868 CEFBS_FeatureMiscellaneousExtensions3, // OCRK = 2027
13869 CEFBS_None, // OG = 2028
13870 CEFBS_None, // OGR = 2029
13871 CEFBS_FeatureDistinctOps, // OGRK = 2030
13872 CEFBS_None, // OI = 2031
13873 CEFBS_None, // OIHF = 2032
13874 CEFBS_None, // OIHH = 2033
13875 CEFBS_None, // OIHL = 2034
13876 CEFBS_None, // OILF = 2035
13877 CEFBS_None, // OILH = 2036
13878 CEFBS_None, // OILL = 2037
13879 CEFBS_None, // OIY = 2038
13880 CEFBS_None, // OR = 2039
13881 CEFBS_FeatureDistinctOps, // ORK = 2040
13882 CEFBS_None, // OY = 2041
13883 CEFBS_None, // PACK = 2042
13884 CEFBS_None, // PALB = 2043
13885 CEFBS_None, // PC = 2044
13886 CEFBS_FeatureMessageSecurityAssist4, // PCC = 2045
13887 CEFBS_FeatureMessageSecurityAssist3, // PCKMO = 2046
13888 CEFBS_FeatureConcurrentFunctions, // PFCR = 2047
13889 CEFBS_None, // PFD = 2048
13890 CEFBS_None, // PFDRL = 2049
13891 CEFBS_None, // PFMF = 2050
13892 CEFBS_None, // PFPO = 2051
13893 CEFBS_None, // PGIN = 2052
13894 CEFBS_None, // PGOUT = 2053
13895 CEFBS_None, // PKA = 2054
13896 CEFBS_None, // PKU = 2055
13897 CEFBS_None, // PLO = 2056
13898 CEFBS_FeaturePopulationCount, // POPCNT = 2057
13899 CEFBS_FeatureMiscellaneousExtensions3, // POPCNTOpt = 2058
13900 CEFBS_FeatureProcessorAssist, // PPA = 2059
13901 CEFBS_FeatureMessageSecurityAssist5, // PPNO = 2060
13902 CEFBS_None, // PR = 2061
13903 CEFBS_FeatureMessageSecurityAssist7, // PRNO = 2062
13904 CEFBS_None, // PT = 2063
13905 CEFBS_None, // PTF = 2064
13906 CEFBS_None, // PTFF = 2065
13907 CEFBS_None, // PTI = 2066
13908 CEFBS_None, // PTLB = 2067
13909 CEFBS_None, // QADTR = 2068
13910 CEFBS_None, // QAXTR = 2069
13911 CEFBS_None, // QCTRI = 2070
13912 CEFBS_FeatureProcessorActivityInstrumentation, // QPACI = 2071
13913 CEFBS_None, // QSI = 2072
13914 CEFBS_None, // RCHP = 2073
13915 CEFBS_FeatureResetDATProtection, // RDP = 2074
13916 CEFBS_FeatureResetDATProtection, // RDPOpt = 2075
13917 CEFBS_None, // RISBG = 2076
13918 CEFBS_None, // RISBG32 = 2077
13919 CEFBS_None, // RISBG32Opt = 2078
13920 CEFBS_FeatureMiscellaneousExtensions, // RISBGN = 2079
13921 CEFBS_FeatureMiscellaneousExtensions, // RISBGNOpt = 2080
13922 CEFBS_FeatureMiscellaneousExtensions, // RISBGNZ = 2081
13923 CEFBS_FeatureMiscellaneousExtensions, // RISBGNZOpt = 2082
13924 CEFBS_None, // RISBGOpt = 2083
13925 CEFBS_None, // RISBGZ = 2084
13926 CEFBS_None, // RISBGZOpt = 2085
13927 CEFBS_FeatureHighWord, // RISBHG = 2086
13928 CEFBS_FeatureHighWord, // RISBHGOpt = 2087
13929 CEFBS_FeatureHighWord, // RISBLG = 2088
13930 CEFBS_FeatureHighWord, // RISBLGOpt = 2089
13931 CEFBS_None, // RLL = 2090
13932 CEFBS_None, // RLLG = 2091
13933 CEFBS_None, // RNSBG = 2092
13934 CEFBS_None, // RNSBGOpt = 2093
13935 CEFBS_None, // ROSBG = 2094
13936 CEFBS_None, // ROSBGOpt = 2095
13937 CEFBS_None, // RP = 2096
13938 CEFBS_None, // RRBE = 2097
13939 CEFBS_FeatureResetReferenceBitsMultiple, // RRBM = 2098
13940 CEFBS_None, // RRDTR = 2099
13941 CEFBS_None, // RRXTR = 2100
13942 CEFBS_None, // RSCH = 2101
13943 CEFBS_None, // RXSBG = 2102
13944 CEFBS_None, // RXSBGOpt = 2103
13945 CEFBS_None, // S = 2104
13946 CEFBS_None, // SAC = 2105
13947 CEFBS_None, // SACF = 2106
13948 CEFBS_None, // SAL = 2107
13949 CEFBS_None, // SAM24 = 2108
13950 CEFBS_None, // SAM31 = 2109
13951 CEFBS_None, // SAM64 = 2110
13952 CEFBS_None, // SAR = 2111
13953 CEFBS_None, // SCCTR = 2112
13954 CEFBS_None, // SCHM = 2113
13955 CEFBS_None, // SCK = 2114
13956 CEFBS_None, // SCKC = 2115
13957 CEFBS_None, // SCKPF = 2116
13958 CEFBS_None, // SD = 2117
13959 CEFBS_None, // SDB = 2118
13960 CEFBS_None, // SDBR = 2119
13961 CEFBS_None, // SDR = 2120
13962 CEFBS_None, // SDTR = 2121
13963 CEFBS_FeatureFPExtension, // SDTRA = 2122
13964 CEFBS_None, // SE = 2123
13965 CEFBS_None, // SEB = 2124
13966 CEFBS_None, // SEBR = 2125
13967 CEFBS_FeatureMiscellaneousExtensions3, // SELFHR = 2126
13968 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsm = 2127
13969 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmE = 2128
13970 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmH = 2129
13971 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmHE = 2130
13972 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmL = 2131
13973 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLE = 2132
13974 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLH = 2133
13975 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmM = 2134
13976 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNE = 2135
13977 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNH = 2136
13978 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNHE = 2137
13979 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNL = 2138
13980 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLE = 2139
13981 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLH = 2140
13982 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNM = 2141
13983 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNO = 2142
13984 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNP = 2143
13985 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNZ = 2144
13986 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmO = 2145
13987 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmP = 2146
13988 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmZ = 2147
13989 CEFBS_FeatureMiscellaneousExtensions3, // SELGR = 2148
13990 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsm = 2149
13991 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmE = 2150
13992 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmH = 2151
13993 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmHE = 2152
13994 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmL = 2153
13995 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLE = 2154
13996 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLH = 2155
13997 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmM = 2156
13998 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNE = 2157
13999 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNH = 2158
14000 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNHE = 2159
14001 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNL = 2160
14002 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLE = 2161
14003 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLH = 2162
14004 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNM = 2163
14005 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNO = 2164
14006 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNP = 2165
14007 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNZ = 2166
14008 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmO = 2167
14009 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmP = 2168
14010 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmZ = 2169
14011 CEFBS_FeatureMiscellaneousExtensions3, // SELR = 2170
14012 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsm = 2171
14013 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmE = 2172
14014 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmH = 2173
14015 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmHE = 2174
14016 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmL = 2175
14017 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLE = 2176
14018 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLH = 2177
14019 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmM = 2178
14020 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNE = 2179
14021 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNH = 2180
14022 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNHE = 2181
14023 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNL = 2182
14024 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLE = 2183
14025 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLH = 2184
14026 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNM = 2185
14027 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNO = 2186
14028 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNP = 2187
14029 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNZ = 2188
14030 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmO = 2189
14031 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmP = 2190
14032 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmZ = 2191
14033 CEFBS_None, // SER = 2192
14034 CEFBS_None, // SFASR = 2193
14035 CEFBS_None, // SFPC = 2194
14036 CEFBS_None, // SG = 2195
14037 CEFBS_None, // SGF = 2196
14038 CEFBS_None, // SGFR = 2197
14039 CEFBS_FeatureMiscellaneousExtensions2, // SGH = 2198
14040 CEFBS_None, // SGR = 2199
14041 CEFBS_FeatureDistinctOps, // SGRK = 2200
14042 CEFBS_None, // SH = 2201
14043 CEFBS_FeatureHighWord, // SHHHR = 2202
14044 CEFBS_FeatureHighWord, // SHHLR = 2203
14045 CEFBS_None, // SHY = 2204
14046 CEFBS_None, // SIE = 2205
14047 CEFBS_None, // SIGA = 2206
14048 CEFBS_None, // SIGP = 2207
14049 CEFBS_None, // SL = 2208
14050 CEFBS_None, // SLA = 2209
14051 CEFBS_None, // SLAG = 2210
14052 CEFBS_FeatureDistinctOps, // SLAK = 2211
14053 CEFBS_None, // SLB = 2212
14054 CEFBS_None, // SLBG = 2213
14055 CEFBS_None, // SLBGR = 2214
14056 CEFBS_None, // SLBR = 2215
14057 CEFBS_None, // SLDA = 2216
14058 CEFBS_None, // SLDL = 2217
14059 CEFBS_None, // SLDT = 2218
14060 CEFBS_None, // SLFI = 2219
14061 CEFBS_None, // SLG = 2220
14062 CEFBS_None, // SLGF = 2221
14063 CEFBS_None, // SLGFI = 2222
14064 CEFBS_None, // SLGFR = 2223
14065 CEFBS_None, // SLGR = 2224
14066 CEFBS_FeatureDistinctOps, // SLGRK = 2225
14067 CEFBS_FeatureHighWord, // SLHHHR = 2226
14068 CEFBS_FeatureHighWord, // SLHHLR = 2227
14069 CEFBS_None, // SLL = 2228
14070 CEFBS_None, // SLLG = 2229
14071 CEFBS_FeatureDistinctOps, // SLLK = 2230
14072 CEFBS_None, // SLR = 2231
14073 CEFBS_FeatureDistinctOps, // SLRK = 2232
14074 CEFBS_None, // SLXT = 2233
14075 CEFBS_None, // SLY = 2234
14076 CEFBS_FeatureEnhancedSort, // SORTL = 2235
14077 CEFBS_None, // SP = 2236
14078 CEFBS_None, // SPCTR = 2237
14079 CEFBS_None, // SPKA = 2238
14080 CEFBS_None, // SPM = 2239
14081 CEFBS_None, // SPT = 2240
14082 CEFBS_None, // SPX = 2241
14083 CEFBS_None, // SQD = 2242
14084 CEFBS_None, // SQDB = 2243
14085 CEFBS_None, // SQDBR = 2244
14086 CEFBS_None, // SQDR = 2245
14087 CEFBS_None, // SQE = 2246
14088 CEFBS_None, // SQEB = 2247
14089 CEFBS_None, // SQEBR = 2248
14090 CEFBS_None, // SQER = 2249
14091 CEFBS_None, // SQXBR = 2250
14092 CEFBS_None, // SQXR = 2251
14093 CEFBS_None, // SR = 2252
14094 CEFBS_None, // SRA = 2253
14095 CEFBS_None, // SRAG = 2254
14096 CEFBS_FeatureDistinctOps, // SRAK = 2255
14097 CEFBS_None, // SRDA = 2256
14098 CEFBS_None, // SRDL = 2257
14099 CEFBS_None, // SRDT = 2258
14100 CEFBS_FeatureDistinctOps, // SRK = 2259
14101 CEFBS_None, // SRL = 2260
14102 CEFBS_None, // SRLG = 2261
14103 CEFBS_FeatureDistinctOps, // SRLK = 2262
14104 CEFBS_None, // SRNM = 2263
14105 CEFBS_FeatureFPExtension, // SRNMB = 2264
14106 CEFBS_None, // SRNMT = 2265
14107 CEFBS_None, // SRP = 2266
14108 CEFBS_None, // SRST = 2267
14109 CEFBS_None, // SRSTU = 2268
14110 CEFBS_None, // SRXT = 2269
14111 CEFBS_None, // SSAIR = 2270
14112 CEFBS_None, // SSAR = 2271
14113 CEFBS_None, // SSCH = 2272
14114 CEFBS_None, // SSKE = 2273
14115 CEFBS_None, // SSKEOpt = 2274
14116 CEFBS_None, // SSM = 2275
14117 CEFBS_None, // ST = 2276
14118 CEFBS_None, // STAM = 2277
14119 CEFBS_None, // STAMY = 2278
14120 CEFBS_None, // STAP = 2279
14121 CEFBS_FeatureBEAREnhancement, // STBEAR = 2280
14122 CEFBS_None, // STC = 2281
14123 CEFBS_FeatureHighWord, // STCH = 2282
14124 CEFBS_None, // STCK = 2283
14125 CEFBS_None, // STCKC = 2284
14126 CEFBS_None, // STCKE = 2285
14127 CEFBS_None, // STCKF = 2286
14128 CEFBS_None, // STCM = 2287
14129 CEFBS_None, // STCMH = 2288
14130 CEFBS_None, // STCMY = 2289
14131 CEFBS_None, // STCPS = 2290
14132 CEFBS_None, // STCRW = 2291
14133 CEFBS_None, // STCTG = 2292
14134 CEFBS_None, // STCTL = 2293
14135 CEFBS_None, // STCY = 2294
14136 CEFBS_None, // STD = 2295
14137 CEFBS_None, // STDY = 2296
14138 CEFBS_None, // STE = 2297
14139 CEFBS_None, // STE16 = 2298
14140 CEFBS_None, // STE16Y = 2299
14141 CEFBS_None, // STEY = 2300
14142 CEFBS_FeatureHighWord, // STFH = 2301
14143 CEFBS_None, // STFL = 2302
14144 CEFBS_None, // STFLE = 2303
14145 CEFBS_None, // STFPC = 2304
14146 CEFBS_None, // STG = 2305
14147 CEFBS_None, // STGRL = 2306
14148 CEFBS_FeatureGuardedStorage, // STGSC = 2307
14149 CEFBS_None, // STH = 2308
14150 CEFBS_FeatureHighWord, // STHH = 2309
14151 CEFBS_None, // STHRL = 2310
14152 CEFBS_None, // STHY = 2311
14153 CEFBS_None, // STIDP = 2312
14154 CEFBS_None, // STM = 2313
14155 CEFBS_None, // STMG = 2314
14156 CEFBS_None, // STMH = 2315
14157 CEFBS_None, // STMY = 2316
14158 CEFBS_None, // STNSM = 2317
14159 CEFBS_FeatureLoadStoreOnCond, // STOC = 2318
14160 CEFBS_FeatureLoadStoreOnCond, // STOCAsm = 2319
14161 CEFBS_FeatureLoadStoreOnCond, // STOCAsmE = 2320
14162 CEFBS_FeatureLoadStoreOnCond, // STOCAsmH = 2321
14163 CEFBS_FeatureLoadStoreOnCond, // STOCAsmHE = 2322
14164 CEFBS_FeatureLoadStoreOnCond, // STOCAsmL = 2323
14165 CEFBS_FeatureLoadStoreOnCond, // STOCAsmLE = 2324
14166 CEFBS_FeatureLoadStoreOnCond, // STOCAsmLH = 2325
14167 CEFBS_FeatureLoadStoreOnCond, // STOCAsmM = 2326
14168 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNE = 2327
14169 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNH = 2328
14170 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNHE = 2329
14171 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNL = 2330
14172 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLE = 2331
14173 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLH = 2332
14174 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNM = 2333
14175 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNO = 2334
14176 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNP = 2335
14177 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNZ = 2336
14178 CEFBS_FeatureLoadStoreOnCond, // STOCAsmO = 2337
14179 CEFBS_FeatureLoadStoreOnCond, // STOCAsmP = 2338
14180 CEFBS_FeatureLoadStoreOnCond, // STOCAsmZ = 2339
14181 CEFBS_FeatureLoadStoreOnCond2, // STOCFH = 2340
14182 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsm = 2341
14183 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmE = 2342
14184 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmH = 2343
14185 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmHE = 2344
14186 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmL = 2345
14187 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLE = 2346
14188 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLH = 2347
14189 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmM = 2348
14190 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNE = 2349
14191 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNH = 2350
14192 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNHE = 2351
14193 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNL = 2352
14194 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLE = 2353
14195 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLH = 2354
14196 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNM = 2355
14197 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNO = 2356
14198 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNP = 2357
14199 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNZ = 2358
14200 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmO = 2359
14201 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmP = 2360
14202 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmZ = 2361
14203 CEFBS_FeatureLoadStoreOnCond, // STOCG = 2362
14204 CEFBS_FeatureLoadStoreOnCond, // STOCGAsm = 2363
14205 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmE = 2364
14206 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmH = 2365
14207 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmHE = 2366
14208 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmL = 2367
14209 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLE = 2368
14210 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLH = 2369
14211 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmM = 2370
14212 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNE = 2371
14213 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNH = 2372
14214 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNHE = 2373
14215 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNL = 2374
14216 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLE = 2375
14217 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLH = 2376
14218 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNM = 2377
14219 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNO = 2378
14220 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNP = 2379
14221 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNZ = 2380
14222 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmO = 2381
14223 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmP = 2382
14224 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmZ = 2383
14225 CEFBS_None, // STOSM = 2384
14226 CEFBS_None, // STPQ = 2385
14227 CEFBS_None, // STPT = 2386
14228 CEFBS_None, // STPX = 2387
14229 CEFBS_None, // STRAG = 2388
14230 CEFBS_None, // STRL = 2389
14231 CEFBS_None, // STRV = 2390
14232 CEFBS_None, // STRVG = 2391
14233 CEFBS_None, // STRVH = 2392
14234 CEFBS_None, // STSCH = 2393
14235 CEFBS_None, // STSI = 2394
14236 CEFBS_None, // STURA = 2395
14237 CEFBS_None, // STURG = 2396
14238 CEFBS_None, // STY = 2397
14239 CEFBS_None, // SU = 2398
14240 CEFBS_None, // SUR = 2399
14241 CEFBS_None, // SVC = 2400
14242 CEFBS_None, // SW = 2401
14243 CEFBS_None, // SWR = 2402
14244 CEFBS_None, // SXBR = 2403
14245 CEFBS_None, // SXR = 2404
14246 CEFBS_None, // SXTR = 2405
14247 CEFBS_FeatureFPExtension, // SXTRA = 2406
14248 CEFBS_None, // SY = 2407
14249 CEFBS_FeatureTransactionalExecution, // TABORT = 2408
14250 CEFBS_None, // TAM = 2409
14251 CEFBS_None, // TAR = 2410
14252 CEFBS_None, // TB = 2411
14253 CEFBS_None, // TBDR = 2412
14254 CEFBS_None, // TBEDR = 2413
14255 CEFBS_FeatureTransactionalExecution, // TBEGIN = 2414
14256 CEFBS_FeatureTransactionalExecution, // TBEGINC = 2415
14257 CEFBS_None, // TCDB = 2416
14258 CEFBS_None, // TCEB = 2417
14259 CEFBS_None, // TCXB = 2418
14260 CEFBS_None, // TDCDT = 2419
14261 CEFBS_None, // TDCET = 2420
14262 CEFBS_None, // TDCXT = 2421
14263 CEFBS_None, // TDGDT = 2422
14264 CEFBS_None, // TDGET = 2423
14265 CEFBS_None, // TDGXT = 2424
14266 CEFBS_FeatureTransactionalExecution, // TEND = 2425
14267 CEFBS_None, // THDER = 2426
14268 CEFBS_None, // THDR = 2427
14269 CEFBS_None, // TM = 2428
14270 CEFBS_None, // TMHH = 2429
14271 CEFBS_None, // TMHL = 2430
14272 CEFBS_None, // TMLH = 2431
14273 CEFBS_None, // TMLL = 2432
14274 CEFBS_None, // TMY = 2433
14275 CEFBS_None, // TP = 2434
14276 CEFBS_FeatureTestPendingExternalInterruption, // TPEI = 2435
14277 CEFBS_None, // TPI = 2436
14278 CEFBS_None, // TPROT = 2437
14279 CEFBS_None, // TR = 2438
14280 CEFBS_None, // TRACE = 2439
14281 CEFBS_None, // TRACG = 2440
14282 CEFBS_None, // TRAP2 = 2441
14283 CEFBS_None, // TRAP4 = 2442
14284 CEFBS_None, // TRE = 2443
14285 CEFBS_None, // TROO = 2444
14286 CEFBS_None, // TROOOpt = 2445
14287 CEFBS_None, // TROT = 2446
14288 CEFBS_None, // TROTOpt = 2447
14289 CEFBS_None, // TRT = 2448
14290 CEFBS_None, // TRTE = 2449
14291 CEFBS_None, // TRTEOpt = 2450
14292 CEFBS_None, // TRTO = 2451
14293 CEFBS_None, // TRTOOpt = 2452
14294 CEFBS_None, // TRTR = 2453
14295 CEFBS_None, // TRTRE = 2454
14296 CEFBS_None, // TRTREOpt = 2455
14297 CEFBS_None, // TRTT = 2456
14298 CEFBS_None, // TRTTOpt = 2457
14299 CEFBS_None, // TS = 2458
14300 CEFBS_None, // TSCH = 2459
14301 CEFBS_None, // UNPK = 2460
14302 CEFBS_None, // UNPKA = 2461
14303 CEFBS_None, // UNPKU = 2462
14304 CEFBS_None, // UPT = 2463
14305 CEFBS_FeatureVector, // VA = 2464
14306 CEFBS_FeatureVector, // VAB = 2465
14307 CEFBS_FeatureVector, // VAC = 2466
14308 CEFBS_FeatureVector, // VACC = 2467
14309 CEFBS_FeatureVector, // VACCB = 2468
14310 CEFBS_FeatureVector, // VACCC = 2469
14311 CEFBS_FeatureVector, // VACCCQ = 2470
14312 CEFBS_FeatureVector, // VACCF = 2471
14313 CEFBS_FeatureVector, // VACCG = 2472
14314 CEFBS_FeatureVector, // VACCH = 2473
14315 CEFBS_FeatureVector, // VACCQ = 2474
14316 CEFBS_FeatureVector, // VACQ = 2475
14317 CEFBS_FeatureVector, // VAF = 2476
14318 CEFBS_FeatureVector, // VAG = 2477
14319 CEFBS_FeatureVector, // VAH = 2478
14320 CEFBS_FeatureVectorPackedDecimal, // VAP = 2479
14321 CEFBS_FeatureVector, // VAQ = 2480
14322 CEFBS_FeatureVector, // VAVG = 2481
14323 CEFBS_FeatureVector, // VAVGB = 2482
14324 CEFBS_FeatureVector, // VAVGF = 2483
14325 CEFBS_FeatureVector, // VAVGG = 2484
14326 CEFBS_FeatureVector, // VAVGH = 2485
14327 CEFBS_FeatureVector, // VAVGL = 2486
14328 CEFBS_FeatureVector, // VAVGLB = 2487
14329 CEFBS_FeatureVector, // VAVGLF = 2488
14330 CEFBS_FeatureVector, // VAVGLG = 2489
14331 CEFBS_FeatureVector, // VAVGLH = 2490
14332 CEFBS_FeatureVectorEnhancements3, // VAVGLQ = 2491
14333 CEFBS_FeatureVectorEnhancements3, // VAVGQ = 2492
14334 CEFBS_FeatureVectorEnhancements3, // VBLEND = 2493
14335 CEFBS_FeatureVectorEnhancements3, // VBLENDB = 2494
14336 CEFBS_FeatureVectorEnhancements3, // VBLENDF = 2495
14337 CEFBS_FeatureVectorEnhancements3, // VBLENDG = 2496
14338 CEFBS_FeatureVectorEnhancements3, // VBLENDH = 2497
14339 CEFBS_FeatureVectorEnhancements3, // VBLENDQ = 2498
14340 CEFBS_FeatureVectorEnhancements1, // VBPERM = 2499
14341 CEFBS_FeatureVector, // VCDG = 2500
14342 CEFBS_FeatureVector, // VCDGB = 2501
14343 CEFBS_FeatureVector, // VCDLG = 2502
14344 CEFBS_FeatureVector, // VCDLGB = 2503
14345 CEFBS_FeatureVectorEnhancements2, // VCEFB = 2504
14346 CEFBS_FeatureVectorEnhancements2, // VCELFB = 2505
14347 CEFBS_FeatureVector, // VCEQ = 2506
14348 CEFBS_FeatureVector, // VCEQB = 2507
14349 CEFBS_FeatureVector, // VCEQBS = 2508
14350 CEFBS_FeatureVector, // VCEQF = 2509
14351 CEFBS_FeatureVector, // VCEQFS = 2510
14352 CEFBS_FeatureVector, // VCEQG = 2511
14353 CEFBS_FeatureVector, // VCEQGS = 2512
14354 CEFBS_FeatureVector, // VCEQH = 2513
14355 CEFBS_FeatureVector, // VCEQHS = 2514
14356 CEFBS_FeatureVectorEnhancements3, // VCEQQ = 2515
14357 CEFBS_FeatureVectorEnhancements3, // VCEQQS = 2516
14358 CEFBS_FeatureVectorEnhancements2, // VCFEB = 2517
14359 CEFBS_FeatureVector_FeatureNNPAssist, // VCFN = 2518
14360 CEFBS_FeatureVectorEnhancements2, // VCFPL = 2519
14361 CEFBS_FeatureVectorEnhancements2, // VCFPS = 2520
14362 CEFBS_FeatureVector, // VCGD = 2521
14363 CEFBS_FeatureVector, // VCGDB = 2522
14364 CEFBS_FeatureVector, // VCH = 2523
14365 CEFBS_FeatureVector, // VCHB = 2524
14366 CEFBS_FeatureVector, // VCHBS = 2525
14367 CEFBS_FeatureVector, // VCHF = 2526
14368 CEFBS_FeatureVector, // VCHFS = 2527
14369 CEFBS_FeatureVector, // VCHG = 2528
14370 CEFBS_FeatureVector, // VCHGS = 2529
14371 CEFBS_FeatureVector, // VCHH = 2530
14372 CEFBS_FeatureVector, // VCHHS = 2531
14373 CEFBS_FeatureVector, // VCHL = 2532
14374 CEFBS_FeatureVector, // VCHLB = 2533
14375 CEFBS_FeatureVector, // VCHLBS = 2534
14376 CEFBS_FeatureVector, // VCHLF = 2535
14377 CEFBS_FeatureVector, // VCHLFS = 2536
14378 CEFBS_FeatureVector, // VCHLG = 2537
14379 CEFBS_FeatureVector, // VCHLGS = 2538
14380 CEFBS_FeatureVector, // VCHLH = 2539
14381 CEFBS_FeatureVector, // VCHLHS = 2540
14382 CEFBS_FeatureVectorEnhancements3, // VCHLQ = 2541
14383 CEFBS_FeatureVectorEnhancements3, // VCHLQS = 2542
14384 CEFBS_FeatureVectorEnhancements3, // VCHQ = 2543
14385 CEFBS_FeatureVectorEnhancements3, // VCHQS = 2544
14386 CEFBS_FeatureVector, // VCKSM = 2545
14387 CEFBS_FeatureVectorEnhancements2, // VCLFEB = 2546
14388 CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNH = 2547
14389 CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNL = 2548
14390 CEFBS_FeatureVectorEnhancements2, // VCLFP = 2549
14391 CEFBS_FeatureVector, // VCLGD = 2550
14392 CEFBS_FeatureVector, // VCLGDB = 2551
14393 CEFBS_FeatureVector, // VCLZ = 2552
14394 CEFBS_FeatureVector, // VCLZB = 2553
14395 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCLZDP = 2554
14396 CEFBS_FeatureVector, // VCLZF = 2555
14397 CEFBS_FeatureVector, // VCLZG = 2556
14398 CEFBS_FeatureVector, // VCLZH = 2557
14399 CEFBS_FeatureVectorEnhancements3, // VCLZQ = 2558
14400 CEFBS_FeatureVector_FeatureNNPAssist, // VCNF = 2559
14401 CEFBS_FeatureVectorPackedDecimal, // VCP = 2560
14402 CEFBS_FeatureVector_FeatureNNPAssist, // VCRNF = 2561
14403 CEFBS_FeatureVectorEnhancements2, // VCSFP = 2562
14404 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCSPH = 2563
14405 CEFBS_FeatureVector, // VCTZ = 2564
14406 CEFBS_FeatureVector, // VCTZB = 2565
14407 CEFBS_FeatureVector, // VCTZF = 2566
14408 CEFBS_FeatureVector, // VCTZG = 2567
14409 CEFBS_FeatureVector, // VCTZH = 2568
14410 CEFBS_FeatureVectorEnhancements3, // VCTZQ = 2569
14411 CEFBS_FeatureVectorPackedDecimal, // VCVB = 2570
14412 CEFBS_FeatureVectorPackedDecimal, // VCVBG = 2571
14413 CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBGOpt = 2572
14414 CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBOpt = 2573
14415 CEFBS_FeatureVectorPackedDecimalEnhancement3, // VCVBQ = 2574
14416 CEFBS_FeatureVectorPackedDecimal, // VCVD = 2575
14417 CEFBS_FeatureVectorPackedDecimal, // VCVDG = 2576
14418 CEFBS_FeatureVectorPackedDecimalEnhancement3, // VCVDQ = 2577
14419 CEFBS_FeatureVectorEnhancements3, // VD = 2578
14420 CEFBS_FeatureVectorEnhancements3, // VDF = 2579
14421 CEFBS_FeatureVectorEnhancements3, // VDG = 2580
14422 CEFBS_FeatureVectorEnhancements3, // VDL = 2581
14423 CEFBS_FeatureVectorEnhancements3, // VDLF = 2582
14424 CEFBS_FeatureVectorEnhancements3, // VDLG = 2583
14425 CEFBS_FeatureVectorEnhancements3, // VDLQ = 2584
14426 CEFBS_FeatureVectorPackedDecimal, // VDP = 2585
14427 CEFBS_FeatureVectorEnhancements3, // VDQ = 2586
14428 CEFBS_FeatureVector, // VEC = 2587
14429 CEFBS_FeatureVector, // VECB = 2588
14430 CEFBS_FeatureVector, // VECF = 2589
14431 CEFBS_FeatureVector, // VECG = 2590
14432 CEFBS_FeatureVector, // VECH = 2591
14433 CEFBS_FeatureVector, // VECL = 2592
14434 CEFBS_FeatureVector, // VECLB = 2593
14435 CEFBS_FeatureVector, // VECLF = 2594
14436 CEFBS_FeatureVector, // VECLG = 2595
14437 CEFBS_FeatureVector, // VECLH = 2596
14438 CEFBS_FeatureVectorEnhancements3, // VECLQ = 2597
14439 CEFBS_FeatureVectorEnhancements3, // VECQ = 2598
14440 CEFBS_FeatureVector, // VERIM = 2599
14441 CEFBS_FeatureVector, // VERIMB = 2600
14442 CEFBS_FeatureVector, // VERIMF = 2601
14443 CEFBS_FeatureVector, // VERIMG = 2602
14444 CEFBS_FeatureVector, // VERIMH = 2603
14445 CEFBS_FeatureVector, // VERLL = 2604
14446 CEFBS_FeatureVector, // VERLLB = 2605
14447 CEFBS_FeatureVector, // VERLLF = 2606
14448 CEFBS_FeatureVector, // VERLLG = 2607
14449 CEFBS_FeatureVector, // VERLLH = 2608
14450 CEFBS_FeatureVector, // VERLLV = 2609
14451 CEFBS_FeatureVector, // VERLLVB = 2610
14452 CEFBS_FeatureVector, // VERLLVF = 2611
14453 CEFBS_FeatureVector, // VERLLVG = 2612
14454 CEFBS_FeatureVector, // VERLLVH = 2613
14455 CEFBS_FeatureVector, // VESL = 2614
14456 CEFBS_FeatureVector, // VESLB = 2615
14457 CEFBS_FeatureVector, // VESLF = 2616
14458 CEFBS_FeatureVector, // VESLG = 2617
14459 CEFBS_FeatureVector, // VESLH = 2618
14460 CEFBS_FeatureVector, // VESLV = 2619
14461 CEFBS_FeatureVector, // VESLVB = 2620
14462 CEFBS_FeatureVector, // VESLVF = 2621
14463 CEFBS_FeatureVector, // VESLVG = 2622
14464 CEFBS_FeatureVector, // VESLVH = 2623
14465 CEFBS_FeatureVector, // VESRA = 2624
14466 CEFBS_FeatureVector, // VESRAB = 2625
14467 CEFBS_FeatureVector, // VESRAF = 2626
14468 CEFBS_FeatureVector, // VESRAG = 2627
14469 CEFBS_FeatureVector, // VESRAH = 2628
14470 CEFBS_FeatureVector, // VESRAV = 2629
14471 CEFBS_FeatureVector, // VESRAVB = 2630
14472 CEFBS_FeatureVector, // VESRAVF = 2631
14473 CEFBS_FeatureVector, // VESRAVG = 2632
14474 CEFBS_FeatureVector, // VESRAVH = 2633
14475 CEFBS_FeatureVector, // VESRL = 2634
14476 CEFBS_FeatureVector, // VESRLB = 2635
14477 CEFBS_FeatureVector, // VESRLF = 2636
14478 CEFBS_FeatureVector, // VESRLG = 2637
14479 CEFBS_FeatureVector, // VESRLH = 2638
14480 CEFBS_FeatureVector, // VESRLV = 2639
14481 CEFBS_FeatureVector, // VESRLVB = 2640
14482 CEFBS_FeatureVector, // VESRLVF = 2641
14483 CEFBS_FeatureVector, // VESRLVG = 2642
14484 CEFBS_FeatureVector, // VESRLVH = 2643
14485 CEFBS_FeatureVectorEnhancements3, // VEVAL = 2644
14486 CEFBS_FeatureVector, // VFA = 2645
14487 CEFBS_FeatureVector, // VFADB = 2646
14488 CEFBS_FeatureVector, // VFAE = 2647
14489 CEFBS_FeatureVector, // VFAEB = 2648
14490 CEFBS_FeatureVector, // VFAEBS = 2649
14491 CEFBS_FeatureVector, // VFAEF = 2650
14492 CEFBS_FeatureVector, // VFAEFS = 2651
14493 CEFBS_FeatureVector, // VFAEH = 2652
14494 CEFBS_FeatureVector, // VFAEHS = 2653
14495 CEFBS_FeatureVector, // VFAEZB = 2654
14496 CEFBS_FeatureVector, // VFAEZBS = 2655
14497 CEFBS_FeatureVector, // VFAEZF = 2656
14498 CEFBS_FeatureVector, // VFAEZFS = 2657
14499 CEFBS_FeatureVector, // VFAEZH = 2658
14500 CEFBS_FeatureVector, // VFAEZHS = 2659
14501 CEFBS_FeatureVectorEnhancements1, // VFASB = 2660
14502 CEFBS_FeatureVector, // VFCE = 2661
14503 CEFBS_FeatureVector, // VFCEDB = 2662
14504 CEFBS_FeatureVector, // VFCEDBS = 2663
14505 CEFBS_FeatureVectorEnhancements1, // VFCESB = 2664
14506 CEFBS_FeatureVectorEnhancements1, // VFCESBS = 2665
14507 CEFBS_FeatureVector, // VFCH = 2666
14508 CEFBS_FeatureVector, // VFCHDB = 2667
14509 CEFBS_FeatureVector, // VFCHDBS = 2668
14510 CEFBS_FeatureVector, // VFCHE = 2669
14511 CEFBS_FeatureVector, // VFCHEDB = 2670
14512 CEFBS_FeatureVector, // VFCHEDBS = 2671
14513 CEFBS_FeatureVectorEnhancements1, // VFCHESB = 2672
14514 CEFBS_FeatureVectorEnhancements1, // VFCHESBS = 2673
14515 CEFBS_FeatureVectorEnhancements1, // VFCHSB = 2674
14516 CEFBS_FeatureVectorEnhancements1, // VFCHSBS = 2675
14517 CEFBS_FeatureVector, // VFD = 2676
14518 CEFBS_FeatureVector, // VFDDB = 2677
14519 CEFBS_FeatureVectorEnhancements1, // VFDSB = 2678
14520 CEFBS_FeatureVector, // VFEE = 2679
14521 CEFBS_FeatureVector, // VFEEB = 2680
14522 CEFBS_FeatureVector, // VFEEBS = 2681
14523 CEFBS_FeatureVector, // VFEEF = 2682
14524 CEFBS_FeatureVector, // VFEEFS = 2683
14525 CEFBS_FeatureVector, // VFEEH = 2684
14526 CEFBS_FeatureVector, // VFEEHS = 2685
14527 CEFBS_FeatureVector, // VFEEZB = 2686
14528 CEFBS_FeatureVector, // VFEEZBS = 2687
14529 CEFBS_FeatureVector, // VFEEZF = 2688
14530 CEFBS_FeatureVector, // VFEEZFS = 2689
14531 CEFBS_FeatureVector, // VFEEZH = 2690
14532 CEFBS_FeatureVector, // VFEEZHS = 2691
14533 CEFBS_FeatureVector, // VFENE = 2692
14534 CEFBS_FeatureVector, // VFENEB = 2693
14535 CEFBS_FeatureVector, // VFENEBS = 2694
14536 CEFBS_FeatureVector, // VFENEF = 2695
14537 CEFBS_FeatureVector, // VFENEFS = 2696
14538 CEFBS_FeatureVector, // VFENEH = 2697
14539 CEFBS_FeatureVector, // VFENEHS = 2698
14540 CEFBS_FeatureVector, // VFENEZB = 2699
14541 CEFBS_FeatureVector, // VFENEZBS = 2700
14542 CEFBS_FeatureVector, // VFENEZF = 2701
14543 CEFBS_FeatureVector, // VFENEZFS = 2702
14544 CEFBS_FeatureVector, // VFENEZH = 2703
14545 CEFBS_FeatureVector, // VFENEZHS = 2704
14546 CEFBS_FeatureVector, // VFI = 2705
14547 CEFBS_FeatureVector, // VFIDB = 2706
14548 CEFBS_FeatureVectorEnhancements1, // VFISB = 2707
14549 CEFBS_FeatureVectorEnhancements1, // VFKEDB = 2708
14550 CEFBS_FeatureVectorEnhancements1, // VFKEDBS = 2709
14551 CEFBS_FeatureVectorEnhancements1, // VFKESB = 2710
14552 CEFBS_FeatureVectorEnhancements1, // VFKESBS = 2711
14553 CEFBS_FeatureVectorEnhancements1, // VFKHDB = 2712
14554 CEFBS_FeatureVectorEnhancements1, // VFKHDBS = 2713
14555 CEFBS_FeatureVectorEnhancements1, // VFKHEDB = 2714
14556 CEFBS_FeatureVectorEnhancements1, // VFKHEDBS = 2715
14557 CEFBS_FeatureVectorEnhancements1, // VFKHESB = 2716
14558 CEFBS_FeatureVectorEnhancements1, // VFKHESBS = 2717
14559 CEFBS_FeatureVectorEnhancements1, // VFKHSB = 2718
14560 CEFBS_FeatureVectorEnhancements1, // VFKHSBS = 2719
14561 CEFBS_FeatureVector, // VFLCDB = 2720
14562 CEFBS_FeatureVectorEnhancements1, // VFLCSB = 2721
14563 CEFBS_FeatureVectorEnhancements1, // VFLL = 2722
14564 CEFBS_FeatureVectorEnhancements1, // VFLLS = 2723
14565 CEFBS_FeatureVector, // VFLNDB = 2724
14566 CEFBS_FeatureVectorEnhancements1, // VFLNSB = 2725
14567 CEFBS_FeatureVector, // VFLPDB = 2726
14568 CEFBS_FeatureVectorEnhancements1, // VFLPSB = 2727
14569 CEFBS_FeatureVectorEnhancements1, // VFLR = 2728
14570 CEFBS_FeatureVectorEnhancements1, // VFLRD = 2729
14571 CEFBS_FeatureVector, // VFM = 2730
14572 CEFBS_FeatureVector, // VFMA = 2731
14573 CEFBS_FeatureVector, // VFMADB = 2732
14574 CEFBS_FeatureVectorEnhancements1, // VFMASB = 2733
14575 CEFBS_FeatureVectorEnhancements1, // VFMAX = 2734
14576 CEFBS_FeatureVectorEnhancements1, // VFMAXDB = 2735
14577 CEFBS_FeatureVectorEnhancements1, // VFMAXSB = 2736
14578 CEFBS_FeatureVector, // VFMDB = 2737
14579 CEFBS_FeatureVectorEnhancements1, // VFMIN = 2738
14580 CEFBS_FeatureVectorEnhancements1, // VFMINDB = 2739
14581 CEFBS_FeatureVectorEnhancements1, // VFMINSB = 2740
14582 CEFBS_FeatureVector, // VFMS = 2741
14583 CEFBS_FeatureVectorEnhancements1, // VFMSB = 2742
14584 CEFBS_FeatureVector, // VFMSDB = 2743
14585 CEFBS_FeatureVectorEnhancements1, // VFMSSB = 2744
14586 CEFBS_FeatureVectorEnhancements1, // VFNMA = 2745
14587 CEFBS_FeatureVectorEnhancements1, // VFNMADB = 2746
14588 CEFBS_FeatureVectorEnhancements1, // VFNMASB = 2747
14589 CEFBS_FeatureVectorEnhancements1, // VFNMS = 2748
14590 CEFBS_FeatureVectorEnhancements1, // VFNMSDB = 2749
14591 CEFBS_FeatureVectorEnhancements1, // VFNMSSB = 2750
14592 CEFBS_FeatureVector, // VFPSO = 2751
14593 CEFBS_FeatureVector, // VFPSODB = 2752
14594 CEFBS_FeatureVectorEnhancements1, // VFPSOSB = 2753
14595 CEFBS_FeatureVector, // VFS = 2754
14596 CEFBS_FeatureVector, // VFSDB = 2755
14597 CEFBS_FeatureVector, // VFSQ = 2756
14598 CEFBS_FeatureVector, // VFSQDB = 2757
14599 CEFBS_FeatureVectorEnhancements1, // VFSQSB = 2758
14600 CEFBS_FeatureVectorEnhancements1, // VFSSB = 2759
14601 CEFBS_FeatureVector, // VFTCI = 2760
14602 CEFBS_FeatureVector, // VFTCIDB = 2761
14603 CEFBS_FeatureVectorEnhancements1, // VFTCISB = 2762
14604 CEFBS_FeatureVector, // VGBM = 2763
14605 CEFBS_FeatureVector, // VGEF = 2764
14606 CEFBS_FeatureVector, // VGEG = 2765
14607 CEFBS_FeatureVectorEnhancements3, // VGEM = 2766
14608 CEFBS_FeatureVectorEnhancements3, // VGEMB = 2767
14609 CEFBS_FeatureVectorEnhancements3, // VGEMF = 2768
14610 CEFBS_FeatureVectorEnhancements3, // VGEMG = 2769
14611 CEFBS_FeatureVectorEnhancements3, // VGEMH = 2770
14612 CEFBS_FeatureVectorEnhancements3, // VGEMQ = 2771
14613 CEFBS_FeatureVector, // VGFM = 2772
14614 CEFBS_FeatureVector, // VGFMA = 2773
14615 CEFBS_FeatureVector, // VGFMAB = 2774
14616 CEFBS_FeatureVector, // VGFMAF = 2775
14617 CEFBS_FeatureVector, // VGFMAG = 2776
14618 CEFBS_FeatureVector, // VGFMAH = 2777
14619 CEFBS_FeatureVector, // VGFMB = 2778
14620 CEFBS_FeatureVector, // VGFMF = 2779
14621 CEFBS_FeatureVector, // VGFMG = 2780
14622 CEFBS_FeatureVector, // VGFMH = 2781
14623 CEFBS_FeatureVector, // VGM = 2782
14624 CEFBS_FeatureVector, // VGMB = 2783
14625 CEFBS_FeatureVector, // VGMF = 2784
14626 CEFBS_FeatureVector, // VGMG = 2785
14627 CEFBS_FeatureVector, // VGMH = 2786
14628 CEFBS_FeatureVector, // VISTR = 2787
14629 CEFBS_FeatureVector, // VISTRB = 2788
14630 CEFBS_FeatureVector, // VISTRBS = 2789
14631 CEFBS_FeatureVector, // VISTRF = 2790
14632 CEFBS_FeatureVector, // VISTRFS = 2791
14633 CEFBS_FeatureVector, // VISTRH = 2792
14634 CEFBS_FeatureVector, // VISTRHS = 2793
14635 CEFBS_FeatureVector, // VL = 2794
14636 CEFBS_FeatureVector, // VLAlign = 2795
14637 CEFBS_FeatureVector, // VLBB = 2796
14638 CEFBS_FeatureVectorEnhancements2, // VLBR = 2797
14639 CEFBS_FeatureVectorEnhancements2, // VLBRF = 2798
14640 CEFBS_FeatureVectorEnhancements2, // VLBRG = 2799
14641 CEFBS_FeatureVectorEnhancements2, // VLBRH = 2800
14642 CEFBS_FeatureVectorEnhancements2, // VLBRQ = 2801
14643 CEFBS_FeatureVectorEnhancements2, // VLBRREP = 2802
14644 CEFBS_FeatureVectorEnhancements2, // VLBRREPF = 2803
14645 CEFBS_FeatureVectorEnhancements2, // VLBRREPG = 2804
14646 CEFBS_FeatureVectorEnhancements2, // VLBRREPH = 2805
14647 CEFBS_FeatureVector, // VLC = 2806
14648 CEFBS_FeatureVector, // VLCB = 2807
14649 CEFBS_FeatureVector, // VLCF = 2808
14650 CEFBS_FeatureVector, // VLCG = 2809
14651 CEFBS_FeatureVector, // VLCH = 2810
14652 CEFBS_FeatureVectorEnhancements3, // VLCQ = 2811
14653 CEFBS_FeatureVector, // VLDE = 2812
14654 CEFBS_FeatureVector, // VLDEB = 2813
14655 CEFBS_FeatureVector, // VLEB = 2814
14656 CEFBS_FeatureVectorEnhancements2, // VLEBRF = 2815
14657 CEFBS_FeatureVectorEnhancements2, // VLEBRG = 2816
14658 CEFBS_FeatureVectorEnhancements2, // VLEBRH = 2817
14659 CEFBS_FeatureVector, // VLED = 2818
14660 CEFBS_FeatureVector, // VLEDB = 2819
14661 CEFBS_FeatureVector, // VLEF = 2820
14662 CEFBS_FeatureVector, // VLEG = 2821
14663 CEFBS_FeatureVector, // VLEH = 2822
14664 CEFBS_FeatureVector, // VLEIB = 2823
14665 CEFBS_FeatureVector, // VLEIF = 2824
14666 CEFBS_FeatureVector, // VLEIG = 2825
14667 CEFBS_FeatureVector, // VLEIH = 2826
14668 CEFBS_FeatureVectorEnhancements2, // VLER = 2827
14669 CEFBS_FeatureVectorEnhancements2, // VLERF = 2828
14670 CEFBS_FeatureVectorEnhancements2, // VLERG = 2829
14671 CEFBS_FeatureVectorEnhancements2, // VLERH = 2830
14672 CEFBS_FeatureVector, // VLGV = 2831
14673 CEFBS_FeatureVector, // VLGVB = 2832
14674 CEFBS_FeatureVector, // VLGVF = 2833
14675 CEFBS_FeatureVector, // VLGVG = 2834
14676 CEFBS_FeatureVector, // VLGVH = 2835
14677 CEFBS_FeatureVectorPackedDecimal, // VLIP = 2836
14678 CEFBS_FeatureVector, // VLL = 2837
14679 CEFBS_FeatureVectorEnhancements2, // VLLEBRZ = 2838
14680 CEFBS_FeatureVectorEnhancements2, // VLLEBRZE = 2839
14681 CEFBS_FeatureVectorEnhancements2, // VLLEBRZF = 2840
14682 CEFBS_FeatureVectorEnhancements2, // VLLEBRZG = 2841
14683 CEFBS_FeatureVectorEnhancements2, // VLLEBRZH = 2842
14684 CEFBS_FeatureVector, // VLLEZ = 2843
14685 CEFBS_FeatureVector, // VLLEZB = 2844
14686 CEFBS_FeatureVector, // VLLEZF = 2845
14687 CEFBS_FeatureVector, // VLLEZG = 2846
14688 CEFBS_FeatureVector, // VLLEZH = 2847
14689 CEFBS_FeatureVectorEnhancements1, // VLLEZLF = 2848
14690 CEFBS_FeatureVector, // VLM = 2849
14691 CEFBS_FeatureVector, // VLMAlign = 2850
14692 CEFBS_FeatureVector, // VLP = 2851
14693 CEFBS_FeatureVector, // VLPB = 2852
14694 CEFBS_FeatureVector, // VLPF = 2853
14695 CEFBS_FeatureVector, // VLPG = 2854
14696 CEFBS_FeatureVector, // VLPH = 2855
14697 CEFBS_FeatureVectorEnhancements3, // VLPQ = 2856
14698 CEFBS_FeatureVector, // VLR = 2857
14699 CEFBS_FeatureVector, // VLREP = 2858
14700 CEFBS_FeatureVector, // VLREPB = 2859
14701 CEFBS_FeatureVector, // VLREPF = 2860
14702 CEFBS_FeatureVector, // VLREPG = 2861
14703 CEFBS_FeatureVector, // VLREPH = 2862
14704 CEFBS_FeatureVectorPackedDecimal, // VLRL = 2863
14705 CEFBS_FeatureVectorPackedDecimal, // VLRLR = 2864
14706 CEFBS_FeatureVector, // VLVG = 2865
14707 CEFBS_FeatureVector, // VLVGB = 2866
14708 CEFBS_FeatureVector, // VLVGF = 2867
14709 CEFBS_FeatureVector, // VLVGG = 2868
14710 CEFBS_FeatureVector, // VLVGH = 2869
14711 CEFBS_FeatureVector, // VLVGP = 2870
14712 CEFBS_FeatureVector, // VMAE = 2871
14713 CEFBS_FeatureVector, // VMAEB = 2872
14714 CEFBS_FeatureVector, // VMAEF = 2873
14715 CEFBS_FeatureVectorEnhancements3, // VMAEG = 2874
14716 CEFBS_FeatureVector, // VMAEH = 2875
14717 CEFBS_FeatureVector, // VMAH = 2876
14718 CEFBS_FeatureVector, // VMAHB = 2877
14719 CEFBS_FeatureVector, // VMAHF = 2878
14720 CEFBS_FeatureVectorEnhancements3, // VMAHG = 2879
14721 CEFBS_FeatureVector, // VMAHH = 2880
14722 CEFBS_FeatureVectorEnhancements3, // VMAHQ = 2881
14723 CEFBS_FeatureVector, // VMAL = 2882
14724 CEFBS_FeatureVector, // VMALB = 2883
14725 CEFBS_FeatureVector, // VMALE = 2884
14726 CEFBS_FeatureVector, // VMALEB = 2885
14727 CEFBS_FeatureVector, // VMALEF = 2886
14728 CEFBS_FeatureVectorEnhancements3, // VMALEG = 2887
14729 CEFBS_FeatureVector, // VMALEH = 2888
14730 CEFBS_FeatureVector, // VMALF = 2889
14731 CEFBS_FeatureVectorEnhancements3, // VMALG = 2890
14732 CEFBS_FeatureVector, // VMALH = 2891
14733 CEFBS_FeatureVector, // VMALHB = 2892
14734 CEFBS_FeatureVector, // VMALHF = 2893
14735 CEFBS_FeatureVectorEnhancements3, // VMALHG = 2894
14736 CEFBS_FeatureVector, // VMALHH = 2895
14737 CEFBS_FeatureVectorEnhancements3, // VMALHQ = 2896
14738 CEFBS_FeatureVector, // VMALHW = 2897
14739 CEFBS_FeatureVector, // VMALO = 2898
14740 CEFBS_FeatureVector, // VMALOB = 2899
14741 CEFBS_FeatureVector, // VMALOF = 2900
14742 CEFBS_FeatureVectorEnhancements3, // VMALOG = 2901
14743 CEFBS_FeatureVector, // VMALOH = 2902
14744 CEFBS_FeatureVectorEnhancements3, // VMALQ = 2903
14745 CEFBS_FeatureVector, // VMAO = 2904
14746 CEFBS_FeatureVector, // VMAOB = 2905
14747 CEFBS_FeatureVector, // VMAOF = 2906
14748 CEFBS_FeatureVectorEnhancements3, // VMAOG = 2907
14749 CEFBS_FeatureVector, // VMAOH = 2908
14750 CEFBS_FeatureVector, // VME = 2909
14751 CEFBS_FeatureVector, // VMEB = 2910
14752 CEFBS_FeatureVector, // VMEF = 2911
14753 CEFBS_FeatureVectorEnhancements3, // VMEG = 2912
14754 CEFBS_FeatureVector, // VMEH = 2913
14755 CEFBS_FeatureVector, // VMH = 2914
14756 CEFBS_FeatureVector, // VMHB = 2915
14757 CEFBS_FeatureVector, // VMHF = 2916
14758 CEFBS_FeatureVectorEnhancements3, // VMHG = 2917
14759 CEFBS_FeatureVector, // VMHH = 2918
14760 CEFBS_FeatureVectorEnhancements3, // VMHQ = 2919
14761 CEFBS_FeatureVector, // VML = 2920
14762 CEFBS_FeatureVector, // VMLB = 2921
14763 CEFBS_FeatureVector, // VMLE = 2922
14764 CEFBS_FeatureVector, // VMLEB = 2923
14765 CEFBS_FeatureVector, // VMLEF = 2924
14766 CEFBS_FeatureVectorEnhancements3, // VMLEG = 2925
14767 CEFBS_FeatureVector, // VMLEH = 2926
14768 CEFBS_FeatureVector, // VMLF = 2927
14769 CEFBS_FeatureVectorEnhancements3, // VMLG = 2928
14770 CEFBS_FeatureVector, // VMLH = 2929
14771 CEFBS_FeatureVector, // VMLHB = 2930
14772 CEFBS_FeatureVector, // VMLHF = 2931
14773 CEFBS_FeatureVectorEnhancements3, // VMLHG = 2932
14774 CEFBS_FeatureVector, // VMLHH = 2933
14775 CEFBS_FeatureVectorEnhancements3, // VMLHQ = 2934
14776 CEFBS_FeatureVector, // VMLHW = 2935
14777 CEFBS_FeatureVector, // VMLO = 2936
14778 CEFBS_FeatureVector, // VMLOB = 2937
14779 CEFBS_FeatureVector, // VMLOF = 2938
14780 CEFBS_FeatureVectorEnhancements3, // VMLOG = 2939
14781 CEFBS_FeatureVector, // VMLOH = 2940
14782 CEFBS_FeatureVectorEnhancements3, // VMLQ = 2941
14783 CEFBS_FeatureVector, // VMN = 2942
14784 CEFBS_FeatureVector, // VMNB = 2943
14785 CEFBS_FeatureVector, // VMNF = 2944
14786 CEFBS_FeatureVector, // VMNG = 2945
14787 CEFBS_FeatureVector, // VMNH = 2946
14788 CEFBS_FeatureVector, // VMNL = 2947
14789 CEFBS_FeatureVector, // VMNLB = 2948
14790 CEFBS_FeatureVector, // VMNLF = 2949
14791 CEFBS_FeatureVector, // VMNLG = 2950
14792 CEFBS_FeatureVector, // VMNLH = 2951
14793 CEFBS_FeatureVectorEnhancements3, // VMNLQ = 2952
14794 CEFBS_FeatureVectorEnhancements3, // VMNQ = 2953
14795 CEFBS_FeatureVector, // VMO = 2954
14796 CEFBS_FeatureVector, // VMOB = 2955
14797 CEFBS_FeatureVector, // VMOF = 2956
14798 CEFBS_FeatureVectorEnhancements3, // VMOG = 2957
14799 CEFBS_FeatureVector, // VMOH = 2958
14800 CEFBS_FeatureVectorPackedDecimal, // VMP = 2959
14801 CEFBS_FeatureVector, // VMRH = 2960
14802 CEFBS_FeatureVector, // VMRHB = 2961
14803 CEFBS_FeatureVector, // VMRHF = 2962
14804 CEFBS_FeatureVector, // VMRHG = 2963
14805 CEFBS_FeatureVector, // VMRHH = 2964
14806 CEFBS_FeatureVector, // VMRL = 2965
14807 CEFBS_FeatureVector, // VMRLB = 2966
14808 CEFBS_FeatureVector, // VMRLF = 2967
14809 CEFBS_FeatureVector, // VMRLG = 2968
14810 CEFBS_FeatureVector, // VMRLH = 2969
14811 CEFBS_FeatureVectorEnhancements1, // VMSL = 2970
14812 CEFBS_FeatureVectorEnhancements1, // VMSLG = 2971
14813 CEFBS_FeatureVectorPackedDecimal, // VMSP = 2972
14814 CEFBS_FeatureVector, // VMX = 2973
14815 CEFBS_FeatureVector, // VMXB = 2974
14816 CEFBS_FeatureVector, // VMXF = 2975
14817 CEFBS_FeatureVector, // VMXG = 2976
14818 CEFBS_FeatureVector, // VMXH = 2977
14819 CEFBS_FeatureVector, // VMXL = 2978
14820 CEFBS_FeatureVector, // VMXLB = 2979
14821 CEFBS_FeatureVector, // VMXLF = 2980
14822 CEFBS_FeatureVector, // VMXLG = 2981
14823 CEFBS_FeatureVector, // VMXLH = 2982
14824 CEFBS_FeatureVectorEnhancements3, // VMXLQ = 2983
14825 CEFBS_FeatureVectorEnhancements3, // VMXQ = 2984
14826 CEFBS_FeatureVector, // VN = 2985
14827 CEFBS_FeatureVector, // VNC = 2986
14828 CEFBS_FeatureVectorEnhancements1, // VNN = 2987
14829 CEFBS_FeatureVector, // VNO = 2988
14830 CEFBS_FeatureVectorEnhancements1, // VNX = 2989
14831 CEFBS_FeatureVector, // VO = 2990
14832 CEFBS_FeatureVectorEnhancements1, // VOC = 2991
14833 CEFBS_FeatureVector, // VONE = 2992
14834 CEFBS_FeatureVector, // VPDI = 2993
14835 CEFBS_FeatureVector, // VPERM = 2994
14836 CEFBS_FeatureVector, // VPK = 2995
14837 CEFBS_FeatureVector, // VPKF = 2996
14838 CEFBS_FeatureVector, // VPKG = 2997
14839 CEFBS_FeatureVector, // VPKH = 2998
14840 CEFBS_FeatureVector, // VPKLS = 2999
14841 CEFBS_FeatureVector, // VPKLSF = 3000
14842 CEFBS_FeatureVector, // VPKLSFS = 3001
14843 CEFBS_FeatureVector, // VPKLSG = 3002
14844 CEFBS_FeatureVector, // VPKLSGS = 3003
14845 CEFBS_FeatureVector, // VPKLSH = 3004
14846 CEFBS_FeatureVector, // VPKLSHS = 3005
14847 CEFBS_FeatureVector, // VPKS = 3006
14848 CEFBS_FeatureVector, // VPKSF = 3007
14849 CEFBS_FeatureVector, // VPKSFS = 3008
14850 CEFBS_FeatureVector, // VPKSG = 3009
14851 CEFBS_FeatureVector, // VPKSGS = 3010
14852 CEFBS_FeatureVector, // VPKSH = 3011
14853 CEFBS_FeatureVector, // VPKSHS = 3012
14854 CEFBS_FeatureVectorPackedDecimal, // VPKZ = 3013
14855 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VPKZR = 3014
14856 CEFBS_FeatureVector, // VPOPCT = 3015
14857 CEFBS_FeatureVectorEnhancements1, // VPOPCTB = 3016
14858 CEFBS_FeatureVectorEnhancements1, // VPOPCTF = 3017
14859 CEFBS_FeatureVectorEnhancements1, // VPOPCTG = 3018
14860 CEFBS_FeatureVectorEnhancements1, // VPOPCTH = 3019
14861 CEFBS_FeatureVectorPackedDecimal, // VPSOP = 3020
14862 CEFBS_FeatureVectorEnhancements3, // VR = 3021
14863 CEFBS_FeatureVector, // VREP = 3022
14864 CEFBS_FeatureVector, // VREPB = 3023
14865 CEFBS_FeatureVector, // VREPF = 3024
14866 CEFBS_FeatureVector, // VREPG = 3025
14867 CEFBS_FeatureVector, // VREPH = 3026
14868 CEFBS_FeatureVector, // VREPI = 3027
14869 CEFBS_FeatureVector, // VREPIB = 3028
14870 CEFBS_FeatureVector, // VREPIF = 3029
14871 CEFBS_FeatureVector, // VREPIG = 3030
14872 CEFBS_FeatureVector, // VREPIH = 3031
14873 CEFBS_FeatureVectorEnhancements3, // VRF = 3032
14874 CEFBS_FeatureVectorEnhancements3, // VRG = 3033
14875 CEFBS_FeatureVectorEnhancements3, // VRL = 3034
14876 CEFBS_FeatureVectorEnhancements3, // VRLF = 3035
14877 CEFBS_FeatureVectorEnhancements3, // VRLG = 3036
14878 CEFBS_FeatureVectorEnhancements3, // VRLQ = 3037
14879 CEFBS_FeatureVectorPackedDecimal, // VRP = 3038
14880 CEFBS_FeatureVectorEnhancements3, // VRQ = 3039
14881 CEFBS_FeatureVector, // VS = 3040
14882 CEFBS_FeatureVector, // VSB = 3041
14883 CEFBS_FeatureVector, // VSBCBI = 3042
14884 CEFBS_FeatureVector, // VSBCBIQ = 3043
14885 CEFBS_FeatureVector, // VSBI = 3044
14886 CEFBS_FeatureVector, // VSBIQ = 3045
14887 CEFBS_FeatureVector, // VSCBI = 3046
14888 CEFBS_FeatureVector, // VSCBIB = 3047
14889 CEFBS_FeatureVector, // VSCBIF = 3048
14890 CEFBS_FeatureVector, // VSCBIG = 3049
14891 CEFBS_FeatureVector, // VSCBIH = 3050
14892 CEFBS_FeatureVector, // VSCBIQ = 3051
14893 CEFBS_FeatureVector, // VSCEF = 3052
14894 CEFBS_FeatureVector, // VSCEG = 3053
14895 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHDP = 3054
14896 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHP = 3055
14897 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHSP = 3056
14898 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHXP = 3057
14899 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCSHP = 3058
14900 CEFBS_FeatureVectorPackedDecimal, // VSDP = 3059
14901 CEFBS_FeatureVector, // VSEG = 3060
14902 CEFBS_FeatureVector, // VSEGB = 3061
14903 CEFBS_FeatureVector, // VSEGF = 3062
14904 CEFBS_FeatureVector, // VSEGH = 3063
14905 CEFBS_FeatureVector, // VSEL = 3064
14906 CEFBS_FeatureVector, // VSF = 3065
14907 CEFBS_FeatureVector, // VSG = 3066
14908 CEFBS_FeatureVector, // VSH = 3067
14909 CEFBS_FeatureVector, // VSL = 3068
14910 CEFBS_FeatureVector, // VSLB = 3069
14911 CEFBS_FeatureVectorEnhancements2, // VSLD = 3070
14912 CEFBS_FeatureVector, // VSLDB = 3071
14913 CEFBS_FeatureVectorPackedDecimal, // VSP = 3072
14914 CEFBS_FeatureVector, // VSQ = 3073
14915 CEFBS_FeatureVector, // VSRA = 3074
14916 CEFBS_FeatureVector, // VSRAB = 3075
14917 CEFBS_FeatureVectorEnhancements2, // VSRD = 3076
14918 CEFBS_FeatureVector, // VSRL = 3077
14919 CEFBS_FeatureVector, // VSRLB = 3078
14920 CEFBS_FeatureVectorPackedDecimal, // VSRP = 3079
14921 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSRPR = 3080
14922 CEFBS_FeatureVector, // VST = 3081
14923 CEFBS_FeatureVector, // VSTAlign = 3082
14924 CEFBS_FeatureVectorEnhancements2, // VSTBR = 3083
14925 CEFBS_FeatureVectorEnhancements2, // VSTBRF = 3084
14926 CEFBS_FeatureVectorEnhancements2, // VSTBRG = 3085
14927 CEFBS_FeatureVectorEnhancements2, // VSTBRH = 3086
14928 CEFBS_FeatureVectorEnhancements2, // VSTBRQ = 3087
14929 CEFBS_FeatureVector, // VSTEB = 3088
14930 CEFBS_FeatureVectorEnhancements2, // VSTEBRF = 3089
14931 CEFBS_FeatureVectorEnhancements2, // VSTEBRG = 3090
14932 CEFBS_FeatureVectorEnhancements2, // VSTEBRH = 3091
14933 CEFBS_FeatureVector, // VSTEF = 3092
14934 CEFBS_FeatureVector, // VSTEG = 3093
14935 CEFBS_FeatureVector, // VSTEH = 3094
14936 CEFBS_FeatureVectorEnhancements2, // VSTER = 3095
14937 CEFBS_FeatureVectorEnhancements2, // VSTERF = 3096
14938 CEFBS_FeatureVectorEnhancements2, // VSTERG = 3097
14939 CEFBS_FeatureVectorEnhancements2, // VSTERH = 3098
14940 CEFBS_FeatureVector, // VSTL = 3099
14941 CEFBS_FeatureVector, // VSTM = 3100
14942 CEFBS_FeatureVector, // VSTMAlign = 3101
14943 CEFBS_FeatureVector, // VSTRC = 3102
14944 CEFBS_FeatureVector, // VSTRCB = 3103
14945 CEFBS_FeatureVector, // VSTRCBS = 3104
14946 CEFBS_FeatureVector, // VSTRCF = 3105
14947 CEFBS_FeatureVector, // VSTRCFS = 3106
14948 CEFBS_FeatureVector, // VSTRCH = 3107
14949 CEFBS_FeatureVector, // VSTRCHS = 3108
14950 CEFBS_FeatureVector, // VSTRCZB = 3109
14951 CEFBS_FeatureVector, // VSTRCZBS = 3110
14952 CEFBS_FeatureVector, // VSTRCZF = 3111
14953 CEFBS_FeatureVector, // VSTRCZFS = 3112
14954 CEFBS_FeatureVector, // VSTRCZH = 3113
14955 CEFBS_FeatureVector, // VSTRCZHS = 3114
14956 CEFBS_FeatureVectorPackedDecimal, // VSTRL = 3115
14957 CEFBS_FeatureVectorPackedDecimal, // VSTRLR = 3116
14958 CEFBS_FeatureVectorEnhancements2, // VSTRS = 3117
14959 CEFBS_FeatureVectorEnhancements2, // VSTRSB = 3118
14960 CEFBS_FeatureVectorEnhancements2, // VSTRSF = 3119
14961 CEFBS_FeatureVectorEnhancements2, // VSTRSH = 3120
14962 CEFBS_FeatureVectorEnhancements2, // VSTRSZB = 3121
14963 CEFBS_FeatureVectorEnhancements2, // VSTRSZF = 3122
14964 CEFBS_FeatureVectorEnhancements2, // VSTRSZH = 3123
14965 CEFBS_FeatureVector, // VSUM = 3124
14966 CEFBS_FeatureVector, // VSUMB = 3125
14967 CEFBS_FeatureVector, // VSUMG = 3126
14968 CEFBS_FeatureVector, // VSUMGF = 3127
14969 CEFBS_FeatureVector, // VSUMGH = 3128
14970 CEFBS_FeatureVector, // VSUMH = 3129
14971 CEFBS_FeatureVector, // VSUMQ = 3130
14972 CEFBS_FeatureVector, // VSUMQF = 3131
14973 CEFBS_FeatureVector, // VSUMQG = 3132
14974 CEFBS_FeatureVector, // VTM = 3133
14975 CEFBS_FeatureVectorPackedDecimal, // VTP = 3134
14976 CEFBS_FeatureVectorPackedDecimalEnhancement3, // VTPOpt = 3135
14977 CEFBS_FeatureVectorPackedDecimalEnhancement3, // VTZ = 3136
14978 CEFBS_FeatureVector, // VUPH = 3137
14979 CEFBS_FeatureVector, // VUPHB = 3138
14980 CEFBS_FeatureVector, // VUPHF = 3139
14981 CEFBS_FeatureVectorEnhancements3, // VUPHG = 3140
14982 CEFBS_FeatureVector, // VUPHH = 3141
14983 CEFBS_FeatureVectorPackedDecimal, // VUPKZ = 3142
14984 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZH = 3143
14985 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZL = 3144
14986 CEFBS_FeatureVector, // VUPL = 3145
14987 CEFBS_FeatureVector, // VUPLB = 3146
14988 CEFBS_FeatureVector, // VUPLF = 3147
14989 CEFBS_FeatureVectorEnhancements3, // VUPLG = 3148
14990 CEFBS_FeatureVector, // VUPLH = 3149
14991 CEFBS_FeatureVector, // VUPLHB = 3150
14992 CEFBS_FeatureVector, // VUPLHF = 3151
14993 CEFBS_FeatureVectorEnhancements3, // VUPLHG = 3152
14994 CEFBS_FeatureVector, // VUPLHH = 3153
14995 CEFBS_FeatureVector, // VUPLHW = 3154
14996 CEFBS_FeatureVector, // VUPLL = 3155
14997 CEFBS_FeatureVector, // VUPLLB = 3156
14998 CEFBS_FeatureVector, // VUPLLF = 3157
14999 CEFBS_FeatureVectorEnhancements3, // VUPLLG = 3158
15000 CEFBS_FeatureVector, // VUPLLH = 3159
15001 CEFBS_FeatureVector, // VX = 3160
15002 CEFBS_FeatureVector, // VZERO = 3161
15003 CEFBS_FeatureVector, // WCDGB = 3162
15004 CEFBS_FeatureVector, // WCDLGB = 3163
15005 CEFBS_FeatureVectorEnhancements2, // WCEFB = 3164
15006 CEFBS_FeatureVectorEnhancements2, // WCELFB = 3165
15007 CEFBS_FeatureVectorEnhancements2, // WCFEB = 3166
15008 CEFBS_FeatureVector, // WCGDB = 3167
15009 CEFBS_FeatureVectorEnhancements2, // WCLFEB = 3168
15010 CEFBS_FeatureVector, // WCLGDB = 3169
15011 CEFBS_FeatureVector, // WFADB = 3170
15012 CEFBS_FeatureVectorEnhancements1, // WFASB = 3171
15013 CEFBS_FeatureVectorEnhancements1, // WFAXB = 3172
15014 CEFBS_FeatureVector, // WFC = 3173
15015 CEFBS_FeatureVector, // WFCDB = 3174
15016 CEFBS_FeatureVector, // WFCEDB = 3175
15017 CEFBS_FeatureVector, // WFCEDBS = 3176
15018 CEFBS_FeatureVectorEnhancements1, // WFCESB = 3177
15019 CEFBS_FeatureVectorEnhancements1, // WFCESBS = 3178
15020 CEFBS_FeatureVectorEnhancements1, // WFCEXB = 3179
15021 CEFBS_FeatureVectorEnhancements1, // WFCEXBS = 3180
15022 CEFBS_FeatureVector, // WFCHDB = 3181
15023 CEFBS_FeatureVector, // WFCHDBS = 3182
15024 CEFBS_FeatureVector, // WFCHEDB = 3183
15025 CEFBS_FeatureVector, // WFCHEDBS = 3184
15026 CEFBS_FeatureVectorEnhancements1, // WFCHESB = 3185
15027 CEFBS_FeatureVectorEnhancements1, // WFCHESBS = 3186
15028 CEFBS_FeatureVectorEnhancements1, // WFCHEXB = 3187
15029 CEFBS_FeatureVectorEnhancements1, // WFCHEXBS = 3188
15030 CEFBS_FeatureVectorEnhancements1, // WFCHSB = 3189
15031 CEFBS_FeatureVectorEnhancements1, // WFCHSBS = 3190
15032 CEFBS_FeatureVectorEnhancements1, // WFCHXB = 3191
15033 CEFBS_FeatureVectorEnhancements1, // WFCHXBS = 3192
15034 CEFBS_FeatureVectorEnhancements1, // WFCSB = 3193
15035 CEFBS_FeatureVectorEnhancements1, // WFCXB = 3194
15036 CEFBS_FeatureVector, // WFDDB = 3195
15037 CEFBS_FeatureVectorEnhancements1, // WFDSB = 3196
15038 CEFBS_FeatureVectorEnhancements1, // WFDXB = 3197
15039 CEFBS_FeatureVector, // WFIDB = 3198
15040 CEFBS_FeatureVectorEnhancements1, // WFISB = 3199
15041 CEFBS_FeatureVectorEnhancements1, // WFIXB = 3200
15042 CEFBS_FeatureVector, // WFK = 3201
15043 CEFBS_FeatureVector, // WFKDB = 3202
15044 CEFBS_FeatureVectorEnhancements1, // WFKEDB = 3203
15045 CEFBS_FeatureVectorEnhancements1, // WFKEDBS = 3204
15046 CEFBS_FeatureVectorEnhancements1, // WFKESB = 3205
15047 CEFBS_FeatureVectorEnhancements1, // WFKESBS = 3206
15048 CEFBS_FeatureVectorEnhancements1, // WFKEXB = 3207
15049 CEFBS_FeatureVectorEnhancements1, // WFKEXBS = 3208
15050 CEFBS_FeatureVectorEnhancements1, // WFKHDB = 3209
15051 CEFBS_FeatureVectorEnhancements1, // WFKHDBS = 3210
15052 CEFBS_FeatureVectorEnhancements1, // WFKHEDB = 3211
15053 CEFBS_FeatureVectorEnhancements1, // WFKHEDBS = 3212
15054 CEFBS_FeatureVectorEnhancements1, // WFKHESB = 3213
15055 CEFBS_FeatureVectorEnhancements1, // WFKHESBS = 3214
15056 CEFBS_FeatureVectorEnhancements1, // WFKHEXB = 3215
15057 CEFBS_FeatureVectorEnhancements1, // WFKHEXBS = 3216
15058 CEFBS_FeatureVectorEnhancements1, // WFKHSB = 3217
15059 CEFBS_FeatureVectorEnhancements1, // WFKHSBS = 3218
15060 CEFBS_FeatureVectorEnhancements1, // WFKHXB = 3219
15061 CEFBS_FeatureVectorEnhancements1, // WFKHXBS = 3220
15062 CEFBS_FeatureVectorEnhancements1, // WFKSB = 3221
15063 CEFBS_FeatureVectorEnhancements1, // WFKXB = 3222
15064 CEFBS_FeatureVector, // WFLCDB = 3223
15065 CEFBS_FeatureVectorEnhancements1, // WFLCSB = 3224
15066 CEFBS_FeatureVectorEnhancements1, // WFLCXB = 3225
15067 CEFBS_FeatureVectorEnhancements1, // WFLLD = 3226
15068 CEFBS_FeatureVectorEnhancements1, // WFLLS = 3227
15069 CEFBS_FeatureVector, // WFLNDB = 3228
15070 CEFBS_FeatureVectorEnhancements1, // WFLNSB = 3229
15071 CEFBS_FeatureVectorEnhancements1, // WFLNXB = 3230
15072 CEFBS_FeatureVector, // WFLPDB = 3231
15073 CEFBS_FeatureVectorEnhancements1, // WFLPSB = 3232
15074 CEFBS_FeatureVectorEnhancements1, // WFLPXB = 3233
15075 CEFBS_FeatureVectorEnhancements1, // WFLRD = 3234
15076 CEFBS_FeatureVectorEnhancements1, // WFLRX = 3235
15077 CEFBS_FeatureVector, // WFMADB = 3236
15078 CEFBS_FeatureVectorEnhancements1, // WFMASB = 3237
15079 CEFBS_FeatureVectorEnhancements1, // WFMAXB = 3238
15080 CEFBS_FeatureVectorEnhancements1, // WFMAXDB = 3239
15081 CEFBS_FeatureVectorEnhancements1, // WFMAXSB = 3240
15082 CEFBS_FeatureVectorEnhancements1, // WFMAXXB = 3241
15083 CEFBS_FeatureVector, // WFMDB = 3242
15084 CEFBS_FeatureVectorEnhancements1, // WFMINDB = 3243
15085 CEFBS_FeatureVectorEnhancements1, // WFMINSB = 3244
15086 CEFBS_FeatureVectorEnhancements1, // WFMINXB = 3245
15087 CEFBS_FeatureVectorEnhancements1, // WFMSB = 3246
15088 CEFBS_FeatureVector, // WFMSDB = 3247
15089 CEFBS_FeatureVectorEnhancements1, // WFMSSB = 3248
15090 CEFBS_FeatureVectorEnhancements1, // WFMSXB = 3249
15091 CEFBS_FeatureVectorEnhancements1, // WFMXB = 3250
15092 CEFBS_FeatureVectorEnhancements1, // WFNMADB = 3251
15093 CEFBS_FeatureVectorEnhancements1, // WFNMASB = 3252
15094 CEFBS_FeatureVectorEnhancements1, // WFNMAXB = 3253
15095 CEFBS_FeatureVectorEnhancements1, // WFNMSDB = 3254
15096 CEFBS_FeatureVectorEnhancements1, // WFNMSSB = 3255
15097 CEFBS_FeatureVectorEnhancements1, // WFNMSXB = 3256
15098 CEFBS_FeatureVector, // WFPSODB = 3257
15099 CEFBS_FeatureVectorEnhancements1, // WFPSOSB = 3258
15100 CEFBS_FeatureVectorEnhancements1, // WFPSOXB = 3259
15101 CEFBS_FeatureVector, // WFSDB = 3260
15102 CEFBS_FeatureVector, // WFSQDB = 3261
15103 CEFBS_FeatureVectorEnhancements1, // WFSQSB = 3262
15104 CEFBS_FeatureVectorEnhancements1, // WFSQXB = 3263
15105 CEFBS_FeatureVectorEnhancements1, // WFSSB = 3264
15106 CEFBS_FeatureVectorEnhancements1, // WFSXB = 3265
15107 CEFBS_FeatureVector, // WFTCIDB = 3266
15108 CEFBS_FeatureVectorEnhancements1, // WFTCISB = 3267
15109 CEFBS_FeatureVectorEnhancements1, // WFTCIXB = 3268
15110 CEFBS_FeatureVector, // WLDEB = 3269
15111 CEFBS_FeatureVector, // WLEDB = 3270
15112 CEFBS_None, // X = 3271
15113 CEFBS_None, // XC = 3272
15114 CEFBS_None, // XG = 3273
15115 CEFBS_None, // XGR = 3274
15116 CEFBS_FeatureDistinctOps, // XGRK = 3275
15117 CEFBS_None, // XI = 3276
15118 CEFBS_None, // XIHF = 3277
15119 CEFBS_None, // XILF = 3278
15120 CEFBS_None, // XIY = 3279
15121 CEFBS_None, // XR = 3280
15122 CEFBS_FeatureDistinctOps, // XRK = 3281
15123 CEFBS_None, // XSCH = 3282
15124 CEFBS_None, // XY = 3283
15125 CEFBS_None, // ZAP = 3284
15126 };
15127
15128 assert(Opcode < 3285);
15129 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
15130}
15131
15132} // end namespace llvm::SystemZ_MC
15133#endif // GET_COMPUTE_FEATURES
15134
15135#ifdef GET_AVAILABLE_OPCODE_CHECKER
15136#undef GET_AVAILABLE_OPCODE_CHECKER
15137namespace llvm::SystemZ_MC {
15138bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
15139 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
15140 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
15141 FeatureBitset MissingFeatures =
15142 (AvailableFeatures & RequiredFeatures) ^
15143 RequiredFeatures;
15144 return !MissingFeatures.any();
15145}
15146} // end namespace llvm::SystemZ_MC
15147#endif // GET_AVAILABLE_OPCODE_CHECKER
15148
15149#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
15150#undef ENABLE_INSTR_PREDICATE_VERIFIER
15151#include <sstream>
15152
15153namespace llvm::SystemZ_MC {
15154#ifndef NDEBUG
15155static const char *SubtargetFeatureNames[] = {
15156 "Feature_FeatureBEAREnhancement",
15157 "Feature_FeatureBackChain",
15158 "Feature_FeatureConcurrentFunctions",
15159 "Feature_FeatureDFPPackedConversion",
15160 "Feature_FeatureDFPZonedConversion",
15161 "Feature_FeatureDeflateConversion",
15162 "Feature_FeatureDistinctOps",
15163 "Feature_FeatureEnhancedDAT2",
15164 "Feature_FeatureEnhancedSort",
15165 "Feature_FeatureExecutionHint",
15166 "Feature_FeatureFPExtension",
15167 "Feature_FeatureFastSerialization",
15168 "Feature_FeatureGuardedStorage",
15169 "Feature_FeatureHighWord",
15170 "Feature_FeatureInsertReferenceBitsMultiple",
15171 "Feature_FeatureInterlockedAccess1",
15172 "Feature_FeatureLoadAndTrap",
15173 "Feature_FeatureLoadAndZeroRightmostByte",
15174 "Feature_FeatureLoadStoreOnCond",
15175 "Feature_FeatureLoadStoreOnCond2",
15176 "Feature_FeatureMessageSecurityAssist3",
15177 "Feature_FeatureMessageSecurityAssist4",
15178 "Feature_FeatureMessageSecurityAssist5",
15179 "Feature_FeatureMessageSecurityAssist7",
15180 "Feature_FeatureMessageSecurityAssist8",
15181 "Feature_FeatureMessageSecurityAssist9",
15182 "Feature_FeatureMessageSecurityAssist12",
15183 "Feature_FeatureMiscellaneousExtensions",
15184 "Feature_FeatureMiscellaneousExtensions2",
15185 "Feature_FeatureMiscellaneousExtensions3",
15186 "Feature_FeatureMiscellaneousExtensions4",
15187 "Feature_FeatureNNPAssist",
15188 "Feature_FeaturePopulationCount",
15189 "Feature_FeatureProcessorActivityInstrumentation",
15190 "Feature_FeatureProcessorAssist",
15191 "Feature_FeatureResetDATProtection",
15192 "Feature_FeatureResetReferenceBitsMultiple",
15193 "Feature_FeatureSoftFloat",
15194 "Feature_FeatureTestPendingExternalInterruption",
15195 "Feature_FeatureTransactionalExecution",
15196 "Feature_FeatureUnalignedSymbols",
15197 "Feature_FeatureVector",
15198 "Feature_FeatureVectorEnhancements1",
15199 "Feature_FeatureVectorEnhancements2",
15200 "Feature_FeatureVectorEnhancements3",
15201 "Feature_FeatureVectorPackedDecimal",
15202 "Feature_FeatureVectorPackedDecimalEnhancement",
15203 "Feature_FeatureVectorPackedDecimalEnhancement2",
15204 "Feature_FeatureVectorPackedDecimalEnhancement3",
15205 nullptr
15206};
15207
15208#endif // NDEBUG
15209
15210void verifyInstructionPredicates(
15211 unsigned Opcode, const FeatureBitset &Features) {
15212#ifndef NDEBUG
15213 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
15214 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
15215 FeatureBitset MissingFeatures =
15216 (AvailableFeatures & RequiredFeatures) ^
15217 RequiredFeatures;
15218 if (MissingFeatures.any()) {
15219 std::ostringstream Msg;
15220 Msg << "Attempting to emit " << &SystemZInstrNameData[SystemZInstrNameIndices[Opcode]]
15221 << " instruction but the ";
15222 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
15223 if (MissingFeatures.test(i))
15224 Msg << SubtargetFeatureNames[i] << " ";
15225 Msg << "predicate(s) are not met";
15226 report_fatal_error(Msg.str().c_str());
15227 }
15228#endif // NDEBUG
15229}
15230} // end namespace llvm::SystemZ_MC
15231#endif // ENABLE_INSTR_PREDICATE_VERIFIER
15232
15233#ifdef GET_INSTRMAP_INFO
15234#undef GET_INSTRMAP_INFO
15235namespace llvm::SystemZ {
15236
15237enum DispSize {
15238 DispSize_12,
15239 DispSize_20
15240};
15241
15242enum MemType {
15243 MemType_target
15244};
15245
15246enum NumOpsValue {
15247 NumOpsValue_2
15248};
15249
15250enum OpType {
15251 OpType_mem
15252};
15253
15254// getDisp12Opcode
15255LLVM_READONLY
15256int getDisp12Opcode(uint16_t Opcode) {
15257 using namespace SystemZ;
15258 static constexpr uint16_t Table[][2] = {
15259 { AHY, AH },
15260 { ALY, AL },
15261 { AY, A },
15262 { CDSY, CDS },
15263 { CHY, CH },
15264 { CLIY, CLI },
15265 { CLMY, CLM },
15266 { CLY, CL },
15267 { CSY, CS },
15268 { CVBY, CVB },
15269 { CVDY, CVD },
15270 { CY, C },
15271 { IC32Y, IC32 },
15272 { ICMY, ICM },
15273 { ICY, IC },
15274 { LAEY, LAE },
15275 { LAMY, LAM },
15276 { LAY, LA },
15277 { LDY, LD },
15278 { LE16Y, LE16 },
15279 { LEY, LE },
15280 { LHY, LH },
15281 { LMY, LM },
15282 { LRAY, LRA },
15283 { LY, L },
15284 { MHY, MH },
15285 { MSY, MS },
15286 { MVIY, MVI },
15287 { NIY, NI },
15288 { NY, N },
15289 { OIY, OI },
15290 { OY, O },
15291 { SHY, SH },
15292 { SLY, SL },
15293 { STAMY, STAM },
15294 { STCMY, STCM },
15295 { STCY, STC },
15296 { STDY, STD },
15297 { STE16Y, STE16 },
15298 { STEY, STE },
15299 { STHY, STH },
15300 { STMY, STM },
15301 { STY, ST },
15302 { SY, S },
15303 { TMY, TM },
15304 { XIY, XI },
15305 { XY, X },
15306 }; // End of Table
15307
15308 unsigned mid;
15309 unsigned start = 0;
15310 unsigned end = 47;
15311 while (start < end) {
15312 mid = start + (end - start) / 2;
15313 if (Opcode == Table[mid][0])
15314 break;
15315 if (Opcode < Table[mid][0])
15316 end = mid;
15317 else
15318 start = mid + 1;
15319 }
15320 if (start == end)
15321 return -1; // Instruction doesn't exist in this table.
15322
15323 return Table[mid][1];
15324}
15325
15326// getDisp20Opcode
15327LLVM_READONLY
15328int getDisp20Opcode(uint16_t Opcode) {
15329 using namespace SystemZ;
15330 static constexpr uint16_t Table[][2] = {
15331 { A, AY },
15332 { AH, AHY },
15333 { AL, ALY },
15334 { C, CY },
15335 { CDS, CDSY },
15336 { CH, CHY },
15337 { CL, CLY },
15338 { CLI, CLIY },
15339 { CLM, CLMY },
15340 { CS, CSY },
15341 { CVB, CVBY },
15342 { CVD, CVDY },
15343 { IC, ICY },
15344 { IC32, IC32Y },
15345 { ICM, ICMY },
15346 { L, LY },
15347 { LA, LAY },
15348 { LAE, LAEY },
15349 { LAM, LAMY },
15350 { LD, LDY },
15351 { LE, LEY },
15352 { LE16, LE16Y },
15353 { LH, LHY },
15354 { LM, LMY },
15355 { LRA, LRAY },
15356 { MH, MHY },
15357 { MS, MSY },
15358 { MVI, MVIY },
15359 { N, NY },
15360 { NI, NIY },
15361 { O, OY },
15362 { OI, OIY },
15363 { S, SY },
15364 { SH, SHY },
15365 { SL, SLY },
15366 { ST, STY },
15367 { STAM, STAMY },
15368 { STC, STCY },
15369 { STCM, STCMY },
15370 { STD, STDY },
15371 { STE, STEY },
15372 { STE16, STE16Y },
15373 { STH, STHY },
15374 { STM, STMY },
15375 { TM, TMY },
15376 { X, XY },
15377 { XI, XIY },
15378 }; // End of Table
15379
15380 unsigned mid;
15381 unsigned start = 0;
15382 unsigned end = 47;
15383 while (start < end) {
15384 mid = start + (end - start) / 2;
15385 if (Opcode == Table[mid][0])
15386 break;
15387 if (Opcode < Table[mid][0])
15388 end = mid;
15389 else
15390 start = mid + 1;
15391 }
15392 if (start == end)
15393 return -1; // Instruction doesn't exist in this table.
15394
15395 return Table[mid][1];
15396}
15397
15398// getMemOpcode
15399LLVM_READONLY
15400int getMemOpcode(uint16_t Opcode) {
15401 using namespace SystemZ;
15402 static constexpr uint16_t Table[][2] = {
15403 { LLCRMux, LLCMux },
15404 { LLHRMux, LLHMux },
15405 { LOCRMux, LOCMux },
15406 { SELRMux, LOCMux_MemFoldPseudo },
15407 { ADBR, ADB },
15408 { ADR, AD },
15409 { AEBR, AEB },
15410 { AER, AE },
15411 { AGFR, AGF },
15412 { AGR, AG },
15413 { AGRK, AG_MemFoldPseudo },
15414 { ALCGR, ALCG },
15415 { ALCR, ALC },
15416 { ALGFR, ALGF },
15417 { ALGR, ALG },
15418 { ALGRK, ALG_MemFoldPseudo },
15419 { ALR, AL },
15420 { ALRK, AL_MemFoldPseudo },
15421 { AR, A },
15422 { ARK, A_MemFoldPseudo },
15423 { AUR, AU },
15424 { AWR, AW },
15425 { CDBR, CDB },
15426 { CDR, CD },
15427 { CEBR, CEB },
15428 { CER, CE },
15429 { CGFR, CGF },
15430 { CGR, CG },
15431 { CLGFR, CLGF },
15432 { CLGR, CLG },
15433 { CLR, CL },
15434 { CR, C },
15435 { DDBR, DDB },
15436 { DDR, DD },
15437 { DEBR, DEB },
15438 { DER, DE },
15439 { DLGR, DLG },
15440 { DLR, DL },
15441 { DR, D },
15442 { DSGFR, DSGF },
15443 { DSGR, DSG },
15444 { KDBR, KDB },
15445 { KEBR, KEB },
15446 { LBR, LB },
15447 { LDEBR, LDEB },
15448 { LDER, LDE },
15449 { LDR, LD },
15450 { LER, LE },
15451 { LER16, LE16 },
15452 { LGBR, LGB },
15453 { LGFR, LGF },
15454 { LGHR, LGH },
15455 { LGR, LG },
15456 { LHR, LH },
15457 { LLCR, LLC },
15458 { LLGCR, LLGC },
15459 { LLGFR, LLGF },
15460 { LLGHR, LLGH },
15461 { LLGTR, LLGT },
15462 { LLHR, LLH },
15463 { LOCFHR, LOCFH },
15464 { LOCGR, LOCG },
15465 { LOCR, LOC },
15466 { LR, L },
15467 { LRVGR, LRVG },
15468 { LRVR, LRV },
15469 { LTGFR, LTGF },
15470 { LTGR, LTG },
15471 { LTR, LT },
15472 { LXDBR, LXDB },
15473 { LXDR, LXD },
15474 { LXEBR, LXEB },
15475 { LXER, LXE },
15476 { MADBR, MADB },
15477 { MADR, MAD },
15478 { MAEBR, MAEB },
15479 { MAER, MAE },
15480 { MAYHR, MAYH },
15481 { MAYLR, MAYL },
15482 { MAYR, MAY },
15483 { MDBR, MDB },
15484 { MDEBR, MDEB },
15485 { MDER, MDE },
15486 { MDR, MD },
15487 { MEEBR, MEEB },
15488 { MEER, MEE },
15489 { MER, ME },
15490 { MLGR, MLG },
15491 { MLR, ML },
15492 { MR, M },
15493 { MSDBR, MSDB },
15494 { MSDR, MSD },
15495 { MSEBR, MSEB },
15496 { MSER, MSE },
15497 { MSGFR, MSGF },
15498 { MSGR, MSG },
15499 { MSGRKC, MSGC_MemFoldPseudo },
15500 { MSR, MS },
15501 { MSRKC, MSC_MemFoldPseudo },
15502 { MXDBR, MXDB },
15503 { MXDR, MXD },
15504 { MYHR, MYH },
15505 { MYLR, MYL },
15506 { MYR, MY },
15507 { NGR, NG },
15508 { NGRK, NG_MemFoldPseudo },
15509 { NR, N },
15510 { NRK, N_MemFoldPseudo },
15511 { OGR, OG },
15512 { OGRK, OG_MemFoldPseudo },
15513 { OR, O },
15514 { ORK, O_MemFoldPseudo },
15515 { SDBR, SDB },
15516 { SDR, SD },
15517 { SEBR, SEB },
15518 { SELGR, LOCG_MemFoldPseudo },
15519 { SER, SE },
15520 { SGFR, SGF },
15521 { SGR, SG },
15522 { SGRK, SG_MemFoldPseudo },
15523 { SLBGR, SLBG },
15524 { SLBR, SLB },
15525 { SLGFR, SLGF },
15526 { SLGR, SLG },
15527 { SLGRK, SLG_MemFoldPseudo },
15528 { SLR, SL },
15529 { SLRK, SL_MemFoldPseudo },
15530 { SQDBR, SQDB },
15531 { SQDR, SQD },
15532 { SQEBR, SQEB },
15533 { SQER, SQE },
15534 { SR, S },
15535 { SRK, S_MemFoldPseudo },
15536 { SUR, SU },
15537 { SWR, SW },
15538 { WFADB, ADB_MemFoldPseudo },
15539 { WFASB, AEB_MemFoldPseudo },
15540 { WFCDB, CDB },
15541 { WFCSB, CEB },
15542 { WFDDB, DDB_MemFoldPseudo },
15543 { WFDSB, DEB_MemFoldPseudo },
15544 { WFKDB, KDB },
15545 { WFKSB, KEB },
15546 { WFMADB, MADB_MemFoldPseudo },
15547 { WFMASB, MAEB_MemFoldPseudo },
15548 { WFMDB, MDB_MemFoldPseudo },
15549 { WFMSB, MEEB_MemFoldPseudo },
15550 { WFMSDB, MSDB_MemFoldPseudo },
15551 { WFMSSB, MSEB_MemFoldPseudo },
15552 { WFSDB, SDB_MemFoldPseudo },
15553 { WFSQDB, SQDB },
15554 { WFSQSB, SQEB },
15555 { WFSSB, SEB_MemFoldPseudo },
15556 { WLDEB, LDEB },
15557 { XGR, XG },
15558 { XGRK, XG_MemFoldPseudo },
15559 { XR, X },
15560 { XRK, X_MemFoldPseudo },
15561 }; // End of Table
15562
15563 unsigned mid;
15564 unsigned start = 0;
15565 unsigned end = 158;
15566 while (start < end) {
15567 mid = start + (end - start) / 2;
15568 if (Opcode == Table[mid][0])
15569 break;
15570 if (Opcode < Table[mid][0])
15571 end = mid;
15572 else
15573 start = mid + 1;
15574 }
15575 if (start == end)
15576 return -1; // Instruction doesn't exist in this table.
15577
15578 return Table[mid][1];
15579}
15580
15581// getTargetMemOpcode
15582LLVM_READONLY
15583int getTargetMemOpcode(uint16_t Opcode) {
15584 using namespace SystemZ;
15585 static constexpr uint16_t Table[][2] = {
15586 { ADB_MemFoldPseudo, ADB },
15587 { AEB_MemFoldPseudo, AEB },
15588 { AG_MemFoldPseudo, AG },
15589 { ALG_MemFoldPseudo, ALG },
15590 { AL_MemFoldPseudo, AL },
15591 { A_MemFoldPseudo, A },
15592 { DDB_MemFoldPseudo, DDB },
15593 { DEB_MemFoldPseudo, DEB },
15594 { LOCG_MemFoldPseudo, LOCG },
15595 { LOCMux_MemFoldPseudo, LOCMux },
15596 { MADB_MemFoldPseudo, MADB },
15597 { MAEB_MemFoldPseudo, MAEB },
15598 { MDB_MemFoldPseudo, MDB },
15599 { MEEB_MemFoldPseudo, MEEB },
15600 { MSC_MemFoldPseudo, MSC },
15601 { MSDB_MemFoldPseudo, MSDB },
15602 { MSEB_MemFoldPseudo, MSEB },
15603 { MSGC_MemFoldPseudo, MSGC },
15604 { NG_MemFoldPseudo, NG },
15605 { N_MemFoldPseudo, N },
15606 { OG_MemFoldPseudo, OG },
15607 { O_MemFoldPseudo, O },
15608 { SDB_MemFoldPseudo, SDB },
15609 { SEB_MemFoldPseudo, SEB },
15610 { SG_MemFoldPseudo, SG },
15611 { SLG_MemFoldPseudo, SLG },
15612 { SL_MemFoldPseudo, SL },
15613 { S_MemFoldPseudo, S },
15614 { XG_MemFoldPseudo, XG },
15615 { X_MemFoldPseudo, X },
15616 }; // End of Table
15617
15618 unsigned mid;
15619 unsigned start = 0;
15620 unsigned end = 30;
15621 while (start < end) {
15622 mid = start + (end - start) / 2;
15623 if (Opcode == Table[mid][0])
15624 break;
15625 if (Opcode < Table[mid][0])
15626 end = mid;
15627 else
15628 start = mid + 1;
15629 }
15630 if (start == end)
15631 return -1; // Instruction doesn't exist in this table.
15632
15633 return Table[mid][1];
15634}
15635
15636// getTwoOperandOpcode
15637LLVM_READONLY
15638int getTwoOperandOpcode(uint16_t Opcode) {
15639 using namespace SystemZ;
15640 static constexpr uint16_t Table[][2] = {
15641 { AHIMuxK, AHIMux },
15642 { SELRMux, LOCRMux },
15643 { AGHIK, AGHI },
15644 { AGRK, AGR },
15645 { AHIK, AHI },
15646 { ALGRK, ALGR },
15647 { ALRK, ALR },
15648 { ARK, AR },
15649 { NGRK, NGR },
15650 { NRK, NR },
15651 { OGRK, OGR },
15652 { ORK, OR },
15653 { SELFHR, LOCFHR },
15654 { SELGR, LOCGR },
15655 { SELR, LOCR },
15656 { SGRK, SGR },
15657 { SLAK, SLA },
15658 { SLGRK, SLGR },
15659 { SLLK, SLL },
15660 { SLRK, SLR },
15661 { SRAK, SRA },
15662 { SRK, SR },
15663 { SRLK, SRL },
15664 { XGRK, XGR },
15665 { XRK, XR },
15666 }; // End of Table
15667
15668 unsigned mid;
15669 unsigned start = 0;
15670 unsigned end = 25;
15671 while (start < end) {
15672 mid = start + (end - start) / 2;
15673 if (Opcode == Table[mid][0])
15674 break;
15675 if (Opcode < Table[mid][0])
15676 end = mid;
15677 else
15678 start = mid + 1;
15679 }
15680 if (start == end)
15681 return -1; // Instruction doesn't exist in this table.
15682
15683 return Table[mid][1];
15684}
15685
15686} // end namespace llvm::SystemZ
15687#endif // GET_INSTRMAP_INFO
15688
15689